CN109614333A - Debugging interface device and server with the device - Google Patents
Debugging interface device and server with the device Download PDFInfo
- Publication number
- CN109614333A CN109614333A CN201811495853.1A CN201811495853A CN109614333A CN 109614333 A CN109614333 A CN 109614333A CN 201811495853 A CN201811495853 A CN 201811495853A CN 109614333 A CN109614333 A CN 109614333A
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- interface device
- debugging
- pin
- debugging interface
- debugged
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Prevention of errors by analysis, debugging or testing of software
- G06F11/362—Debugging of software
- G06F11/3648—Debugging of software using additional hardware
- G06F11/3656—Debugging of software using additional hardware using a specific debug interface
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
The present invention provides a kind of debugging interface device and the server with the device, and the debugging interface device with an electronic equipment to be debugged for connecting；The modulating device includes: a positive connection module, and the electronic equipment forward direction formula grafting to be debugged, for receiving data, so that debugging connector of the debugging interface device as the electronic equipment to be debugged for supporting an at least communication protocol；One reversal connection module, with the electronic equipment inverse type grafting to be debugged；For receiving data, so that debugging connector of the debugging interface device as the electronic equipment to be debugged for supporting an at least communication protocol；Wherein, the positive connection module and reversal connection module symmetry are set on the debugging interface device.Debugging interface device of the present invention had not only saved the space of plank but also can have been debugged when system-level application needs.
Description
Technical field
The invention belongs to system hardware technical fields, are related to a kind of device, more particularly to a kind of debugging interface device and
Server with the device.
Background technique
It is all that the common DB9 of selection is placed on built in edges of boards or use that debug mouthfuls are designed in existing project system
Common header is in plate, and DB9 can be very high to the requirement of the spatial design of plank, and built-in common header can save space,
But can not just be picked out to use after plank is assembled into system, influence system-level debug.
Therefore, how a kind of debugging interface device and the server with the device are provided, it can not to solve the prior art
Realize the defects of debugging of bug can be carried out when system-level application needs while saving the space of server plank,
Those skilled in the art's technical problem urgently to be resolved is had become in fact.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of debugging interface device and have
The server of the device, for solve the prior art cannot achieve save server plank space while can be in system
The problem of grade application carries out the debugging of bug when needing.
In order to achieve the above objects and other related objects, one aspect of the present invention provides a kind of debugging interface device, for
One electronic equipment connection to be debugged；The modulating device includes: a positive connection module, is inserted with the electronic equipment forward direction formula to be debugged
It connects, for receiving data, so that the debugging interface device is as the electronic equipment to be debugged for supporting an at least communication protocol
Debug connector；One reversal connection module, with the electronic equipment inverse type grafting to be debugged；For receiving data, so that the tune
Try debugging connector of the interface arrangement as the electronic equipment to be debugged for supporting an at least communication protocol；Wherein, described just to connect mould
Block and reversal connection module symmetry are set on the debugging interface device.
In one embodiment of the invention, the communication protocol includes the JTAG communication protocol for chip interior test
And/or universal asynchronous receiving-transmitting communication protocol.
In one embodiment of the invention, the positive connection module includes: at least one first test interface and at least one second
Test interface；Wherein first test interface is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported；
Second test interface is used to connect with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
In one embodiment of the invention, the reversal connection module includes: an at least third test interface and at least one the 4th
Test interface；Wherein, the third test interface is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported；
4th test interface is used to connect with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
In one embodiment of the invention, first test interface and third test interface are centrosymmetric and are set to institute
It states on debugging interface device；Second test interface and the 4th test interface, which are centrosymmetric, is set to the debugging interface dress
It sets.
In one embodiment of the invention, first test interface and the third test interface include: data input
Pin, data output pins, Clock Signal pin and test pattern select input pin.
In one embodiment of the invention, second test interface and the 4th test interface include data receiver pin and
Data send pin.
It further include selecting module on the debugging interface device in one embodiment of the invention, the selecting module packet
Include the selection pin of the selection pin and the second universal asynchronous receiving-transmitting signal of the first universal asynchronous receiving-transmitting signal, two selection pins
It is centrosymmetric and is set on the debugging interface device.
In one embodiment of the invention, the debugging interface device further includes earthing module, and the earthing module includes
The grounding pin being symmetrically disposed on the debugging interface device.
Another aspect of the present invention provides a kind of server, including a mainboard, the server further include: the debugging interface
Device is set to the edges of boards of the mainboard.
As described above, debugging interface device of the present invention and the server with the device, have below beneficial to effect
Fruit:
Debugging interface device of the present invention occupies little space, and the pin quantity of Type C can be compatible with current mainstream clothes
The debug mouth of business device plank designs application.Therefore, debugging interface device of the present invention not only saved plank space but also can be with
Debug is carried out when system-level application needs.
Detailed description of the invention
Fig. 1 is shown as the theory structure schematic diagram of debugging interface device of the invention in an embodiment.
Fig. 2 is shown as the circuit diagram of debugging interface device of the invention in an embodiment.
Fig. 3 is shown as the theory structure schematic diagram of server of the invention in an embodiment.
Component label instructions
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.It should be noted that in the absence of conflict, following embodiment and implementation
Feature in example can be combined with each other.
It should be noted that illustrating the basic structure that only the invention is illustrated in a schematic way provided in following embodiment
Think, only shown in schema then with related component in the present invention rather than component count, shape and size when according to actual implementation
Draw, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its assembly layout kenel
It is likely more complexity.
The technical principle of debugging interface device provided by the present invention and the server with the device is as follows:
Using Type C connector as debug mouthfuls, Type C's present invention occupies little space, therefore when design
Edges of boards can be placed on, the pin quantity of type C can be compatible with the debug mouth design application of current mainstream server plank, in this way
Design had not only saved the space of plank but also can carry out debug when system-level application needs.
Embodiment one
A kind of debugging interface device, which is characterized in that for being connect with an electronic equipment to be debugged；The modulating device packet
It includes:
One positive connection module, and the electronic equipment forward direction formula grafting to be debugged, for receiving data, so that the debugging connects
Debugging connector of the mouth device as the electronic equipment to be debugged for supporting an at least communication protocol；
One reversal connection module, with the electronic equipment inverse type grafting to be debugged；For receiving data, so that the debugging connects
Debugging connector of the mouth device as the electronic equipment to be debugged for supporting an at least communication protocol；
Wherein, the positive connection module and reversal connection module symmetry are set on the debugging apparatus.
Debugging interface device provided by the present embodiment is described in detail below with reference to diagram.Referring to Fig. 1, aobvious
It is shown as theory structure schematic diagram of the debugging interface device in an embodiment.The debugging interface device 1 includes: positive connection module
11, it is reversely connected module 12, selecting module 13, power module 14 and earthing module 15.
In the present embodiment, with the positive connection module 11 of the electronic equipment forward direction formula grafting to be debugged for receiving institute
The data that electronic equipment to be debugged is sent are stated, so that the debugging interface device 1 is as a support at least communication protocol wait adjust
The debugging connector of electronic equipment is tried, so that system-level application carries out debug debugging when needed.In the present embodiment, described
Communication protocol includes JTAG communication protocol and/or universal asynchronous receiving-transmitting communication protocol (the UART association for chip interior test
View).
Reversal connection module 12 with the electronic equipment inverse type grafting to be debugged is for receiving the electronic equipment to be debugged
The data of transmission, so that debugging of the debugging interface device 1 as the electronic equipment to be debugged for supporting an at least communication protocol
Connector, so that system-level application carries out debug debugging when needed.
In the present embodiment, the positive connection module 11 is symmetrically disposed on the debugging interface device 1 with reversal connection module 12.
The positive connection module 11 includes at least one first test interface 111 and at least one second test interface 112.
The reversal connection module 12 includes an at least third test interface 121 and at least one the 4th test interface 122.
Circuit diagram of the debugging interface device 1 in an embodiment is as shown in Figure 2.
Referring to Fig. 2, being shown as circuit diagram of the debugging interface device in an embodiment.As shown in Fig. 2, described just connect mould
Block 11 includes one first test interface 111 and one second test interface 112.The reversal connection module 12 includes a third test interface
121 and one the 4th test interface 122.In the present embodiment, the debugging interface device 1 has 28 pins, wherein A1 pin
It is symmetrical arranged to A12 pin and B1 pin and B12 pin, MP1 pin and MP2 pin are symmetrically set with MP3 pin and MP4 pin
It sets.
In the present embodiment, first test interface 111 is used for the electricity to be debugged with the support JTAG communication protocol
Sub- equipment connection, second test interface are used for the electronic equipment to be debugged with the support universal asynchronous receiving-transmitting communication protocol
Connection.
The third test interface 121 is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported, institute
The 4th test interface 122 is stated for connecting with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
As shown in Fig. 2, first test interface 111 and third test interface 121 are centrosymmetric and are set to the tune
It tries on interface arrangement 1, second test interface 112 and the 4th test interface 122, which are centrosymmetric, to be set to the debugging and connect
On mouth device 1.
In the present embodiment, first test interface 111 and the third test interface 121 include data-out pin
TDI, data output pins TDO, test pattern select input pin TMS and Clock Signal pin TCK.Wherein, it described first surveys
It tries the data-out pin TDI of mouth 111, data output pins TDO, test pattern selection input pin TMS and clock signal
Pin TCK distinguishes A3 pin as shown in Figure 2, and A4 pin, A5 pin, A6 pin, the third test interface 121 includes data
Input pin TDI, data output pins TDO, test pattern selection input pin TMS and Clock Signal pin TCK are as shown in Figure 2
B10 pin, B9 pin, B8 pin, B7 pin.
In the present embodiment, second test interface 112 and the 4th test interface 122 include data receiver pin sum number
According to transmission pin.Wherein, the data receiver pin of second test interface 112 and data send pin A9 as shown in Figure 2 and draw
Foot and A10 pin.The data receiver pin and data of 4th test interface 122 send pin B4 pin as shown in Figure 2 and
B3 pin.
The selecting module 13 is for selecting universal asynchronous receiving-transmitting signal.As shown in Fig. 2, the selecting module 13 includes setting
It is equipped with the selection pin A1 of the first universal asynchronous receiving-transmitting signal and selection pin B12 of the second universal asynchronous receiving-transmitting signal, two
Selection pin A1 and B12, which are centrosymmetric, to be set on the debugging interface device 1.
The power module 14 with power supply source for connecting, for the debugging interface device 1 power supply.As shown in Fig. 2, institute
Stating power module 14 includes being centrosymmetric to be set to power pins A12 and B1 on the debugging interface device 1.
The earthing module 15 is for being connected to ground.As shown in Fig. 2, the earthing module 15 is described including being symmetrically disposed on
Grounding pin A2 pin on debugging interface device 1, A7 pin, A11 pin, MP1 pin, MP2 pin and B2 pin, B6 pin,
B11 pin, MP3 pin, MP4 pin.
In the present embodiment, the debugging interface device is Type C connector, using as debugging interface.
It should be noted that it should be understood that the modules of apparatus above division be only a kind of logic function division,
It can completely or partially be integrated on a physical entity in actual implementation, it can also be physically separate.And these modules can be with
It is all realized, can also be all realized in the form of hardware by way of processing element calls with software, it can also part mould
Block realizes that part of module passes through formal implementation of hardware by way of processing element calls software.Such as: x module can be
The processing element individually set up also can integrate and realize in some chip of above-mentioned apparatus.In addition, x module can also be with
The form of program code is stored in the memory of above-mentioned apparatus, called by some processing element of above-mentioned apparatus and executed with
The function of upper x module.The realization of other modules is similar therewith.These modules completely or partially can integrate together, can also be with
It is independent to realize.Processing element described here can be a kind of integrated circuit, the processing capacity with signal.The above module
It can be arranged to implement one or more integrated circuits of above method, such as: one or more specific integrated circuits
(Application Specific Integrated Circuit, abbreviation ASIC), one or more microprocessors (Digital
Singnal Processor, abbreviation DSP), one or more field programmable gate array (Field Programmable
Gate Array, abbreviation FPGA) etc..It, should when some above module is realized by way of processing element scheduler program code
Processing element can be general processor, such as central processing unit (Central Processing Unit, abbreviation CPU) or other
It can be with the processor of caller code.These modules can integrate together, with system on chip (System-on-a-chip,
Abbreviation SOC) form realize.
The debugging interface device 1 provided by the present embodiment occupies little space, and the pin quantity of Type C can be compatible with mesh
The debug mouth of preceding mainstream server plank designs application.Therefore, debugging interface device described in the present embodiment both saves plank
Space can carry out debug when system-level application needs again.
Embodiment two
The present embodiment provides a kind of servers, show referring to Fig. 3, being shown as theory structure of the server in an embodiment
It is intended to.As shown in figure 3, the server 3 includes the debugging interface device 1 of a mainboard 31 and the edges of boards for being set to the mainboard.
As depicted in figs. 1 and 2, the debugging interface device 1 includes: positive connection module 11, reversal connection module 12, selecting module
13, power module 14 and earthing module 15.
In the present embodiment, with the positive connection module 11 of the electronic equipment forward direction formula grafting to be debugged for receiving institute
The data that electronic equipment to be debugged is sent are stated, so that the debugging interface device 1 is as a support at least communication protocol wait adjust
The debugging connector of electronic equipment is tried, so that system-level application carries out debug debugging when needed.In the present embodiment, described
Communication protocol includes JTAG communication protocol and/or universal asynchronous receiving-transmitting communication protocol (the UART association for chip interior test
View).
Reversal connection module 12 with the electronic equipment inverse type grafting to be debugged is for receiving the electronic equipment to be debugged
The data of transmission, so that debugging of the debugging interface device 1 as the electronic equipment to be debugged for supporting an at least communication protocol
Connector, so that system-level application carries out debug debugging when needed.
In the present embodiment, the positive connection module 11 is symmetrically disposed on the debugging interface device 1 with reversal connection module 12.
The positive connection module 11 includes at least one first test interface 111 and at least one second test interface 112.
The reversal connection module 12 includes an at least third test interface 121 and at least one the 4th test interface 122.
Circuit diagram of the debugging interface device 1 in an embodiment is as shown in Figure 2.
Referring to Fig. 2, being shown as circuit diagram of the debugging interface device in an embodiment.As shown in Fig. 2, described just connect mould
Block 11 includes one first test interface 111 and one second test interface 112.The reversal connection module 12 includes a third test interface
121 and one the 4th test interface 122.In the present embodiment, the debugging interface device 1 has 28 pins, wherein A1 pin
It is symmetrical arranged to A12 pin and B1 pin and B12 pin, MP1 pin and MP2 pin are symmetrically set with MP3 pin and MP4 pin
It sets.
In the present embodiment, first test interface 111 is used for the electricity to be debugged with the support JTAG communication protocol
Sub- equipment connection, second test interface are used for the electronic equipment to be debugged with the support universal asynchronous receiving-transmitting communication protocol
Connection.
The third test interface 121 is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported, institute
The 4th test interface 122 is stated for connecting with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
As shown in Fig. 2, first test interface 111 and third test interface 121 are centrosymmetric and are set to the tune
It tries on interface arrangement 1, second test interface 112 and the 4th test interface 122, which are centrosymmetric, to be set to the debugging and connect
On mouth device 1.
In the present embodiment, first test interface 111 and the third test interface 121 include data-out pin
TDI, data output pins TDO, test pattern select input pin TMS and Clock Signal pin TCK.Wherein, it described first surveys
It tries the data-out pin TDI of mouth 111, data output pins TDO, test pattern selection input pin TMS and clock signal
Pin TCK distinguishes A3 pin as shown in Figure 2, and A4 pin, A5 pin, A6 pin, the third test interface 121 includes data
Input pin TDI, data output pins TDO, test pattern selection input pin TMS and Clock Signal pin TCK are as shown in Figure 2
B10 pin, B9 pin, B8 pin, B7 pin.
In the present embodiment, second test interface 112 and the 4th test interface 122 include data receiver pin sum number
According to transmission pin.Wherein, the data receiver pin of second test interface 112 and data send pin A9 as shown in Figure 2 and draw
Foot and A10 pin.The data receiver pin and data of 4th test interface 122 send pin B4 pin as shown in Figure 2 and
B3 pin.
The selecting module 13 is for selecting universal asynchronous receiving-transmitting signal.As shown in Fig. 2, the selecting module 13 includes setting
It is equipped with the selection pin A1 of the first universal asynchronous receiving-transmitting signal and selection pin B12 of the second universal asynchronous receiving-transmitting signal, two
Selection pin A1 and B12, which are centrosymmetric, to be set on the debugging interface device 1.
The power module 14 with power supply source for connecting, for the debugging interface device 1 power supply.As shown in Fig. 2, institute
Stating power module 14 includes being centrosymmetric to be set to power pins A12 and B1 on the debugging interface device 1.
The earthing module 15 is for being connected to ground.As shown in Fig. 2, the earthing module 15 is described including being symmetrically disposed on
Grounding pin A2 pin on debugging interface device 1, A7 pin, A11 pin, MP1 pin, MP2 pin and B2 pin, B6 pin,
B11 pin, MP3 pin, MP4 pin.
In the present embodiment, the debugging interface device 1 is Type C connector, using the debugging as the server 3
Interface.
In conclusion debugging interface device of the present invention occupies little space, the pin quantity of Type C can be compatible with mesh
The debug mouth of preceding mainstream server plank designs application.Therefore, debugging interface device of the present invention had both saved the sky of plank
Between can carry out debug when system-level application needs again.The present invention effectively overcome various shortcoming in the prior art and
Has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (10)
1. a kind of debugging interface device, which is characterized in that for being connect with an electronic equipment to be debugged；The modulating device packet
It includes:
One positive connection module, and the electronic equipment forward direction formula grafting to be debugged, for receiving data, so that the debugging interface fills
Set the debugging connector as the electronic equipment to be debugged for supporting an at least communication protocol；
One reversal connection module, with the electronic equipment inverse type grafting to be debugged；For receiving data, so that the debugging interface fills
Set the debugging connector as the electronic equipment to be debugged for supporting an at least communication protocol；
Wherein, the positive connection module and reversal connection module symmetry are set on the debugging interface device.
2. debugging interface device according to claim 1, which is characterized in that the communication protocol includes being used for chip interior
The JTAG communication protocol and/or universal asynchronous receiving-transmitting communication protocol of test.
3. debugging interface device according to claim 2, which is characterized in that the positive connection module includes:
At least one first test interface and at least one second test interface；
Wherein first test interface is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported；Described
Two test interfaces are used to connect with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
4. debugging interface device according to claim 3, which is characterized in that the reversal connection module includes:
An at least third test interface and at least one the 4th test interface；
Wherein, the third test interface is used to connect with the electronic equipment to be debugged of the JTAG communication protocol is supported；It is described
4th test interface is used to connect with the electronic equipment to be debugged of the universal asynchronous receiving-transmitting communication protocol is supported.
5. debugging interface device according to claim 4, which is characterized in that
First test interface and third test interface, which are centrosymmetric, to be set on the debugging interface device；
Second test interface and the 4th test interface are centrosymmetric and are set on the debugging interface device.
6. debugging interface device according to claim 5, which is characterized in that first test interface and the third are surveyed
Mouth of trying includes: data-out pin, data output pins, Clock Signal pin and test pattern selection input pin.
7. debugging interface device according to claim 5, which is characterized in that second test interface and the 4th test connect
Mouth includes that data receiver pin and data send pin.
8. debugging interface device according to claim 1, which is characterized in that further include selection on the debugging interface device
Module, the selecting module include the choosing of the selection pin and the second universal asynchronous receiving-transmitting signal of the first universal asynchronous receiving-transmitting signal
Pin is selected, two selection pins are centrosymmetric and are set on the debugging interface device.
9. debugging interface device according to claim 1, which is characterized in that the debugging interface device further includes ground connection mould
Block, the earthing module include the grounding pin being symmetrically disposed on the debugging interface device.
10. a kind of server, including a mainboard, which is characterized in that the server further include:
The debugging interface device as described in weighing 1 to 9 any one of power, is set to the edges of boards of the mainboard.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811495853.1A CN109614333A (en) | 2018-12-07 | 2018-12-07 | Debugging interface device and server with the device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811495853.1A CN109614333A (en) | 2018-12-07 | 2018-12-07 | Debugging interface device and server with the device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109614333A true CN109614333A (en) | 2019-04-12 |
Family
ID=66008658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811495853.1A Withdrawn CN109614333A (en) | 2018-12-07 | 2018-12-07 | Debugging interface device and server with the device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109614333A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259040A (en) * | 2019-07-02 | 2021-01-22 | 浙江宇视科技有限公司 | Adapter plate, display module and display device |
| CN113690871A (en) * | 2021-07-08 | 2021-11-23 | 中科可控信息产业有限公司 | Positive and negative connection circuit and device of JTAG interface |
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| CN201780572U (en) * | 2010-07-29 | 2011-03-30 | 比亚迪股份有限公司 | Debugging circuit board |
| US7962793B2 (en) * | 2004-09-02 | 2011-06-14 | International Business Machines Corporation | Self-diagnosing remote I/O enclosures with enhanced FRU callouts |
| CN202217264U (en) * | 2011-07-29 | 2012-05-09 | 青岛海信移动通信技术股份有限公司 | Complete machine debugging system |
| CN103136138A (en) * | 2011-11-24 | 2013-06-05 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN205983458U (en) * | 2016-07-11 | 2017-02-22 | 北京华清瑞达科技有限公司 | Debugging download equipment and debugging download apparatus |
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2018
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7962793B2 (en) * | 2004-09-02 | 2011-06-14 | International Business Machines Corporation | Self-diagnosing remote I/O enclosures with enhanced FRU callouts |
| CN201780572U (en) * | 2010-07-29 | 2011-03-30 | 比亚迪股份有限公司 | Debugging circuit board |
| CN202217264U (en) * | 2011-07-29 | 2012-05-09 | 青岛海信移动通信技术股份有限公司 | Complete machine debugging system |
| CN103136138A (en) * | 2011-11-24 | 2013-06-05 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN205983458U (en) * | 2016-07-11 | 2017-02-22 | 北京华清瑞达科技有限公司 | Debugging download equipment and debugging download apparatus |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259040A (en) * | 2019-07-02 | 2021-01-22 | 浙江宇视科技有限公司 | Adapter plate, display module and display device |
| CN113690871A (en) * | 2021-07-08 | 2021-11-23 | 中科可控信息产业有限公司 | Positive and negative connection circuit and device of JTAG interface |
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Application publication date: 20190412 |
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| WW01 | Invention patent application withdrawn after publication |