CN109618504B - Jointed board structure of single-sided board and manufacturing method - Google Patents
Jointed board structure of single-sided board and manufacturing method Download PDFInfo
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- CN109618504B CN109618504B CN201910095505.3A CN201910095505A CN109618504B CN 109618504 B CN109618504 B CN 109618504B CN 201910095505 A CN201910095505 A CN 201910095505A CN 109618504 B CN109618504 B CN 109618504B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 59
- 229910000679 solder Inorganic materials 0.000 claims abstract description 136
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 98
- 238000013461 design Methods 0.000 claims abstract description 35
- 239000010410 layer Substances 0.000 claims description 539
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 33
- 238000000034 method Methods 0.000 claims description 24
- 239000011241 protective layer Substances 0.000 claims description 23
- 229910052802 copper Inorganic materials 0.000 claims description 17
- 239000010949 copper Substances 0.000 claims description 17
- 239000011889 copper foil Substances 0.000 claims description 16
- 238000012545 processing Methods 0.000 claims description 16
- 238000007650 screen-printing Methods 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 11
- 238000005553 drilling Methods 0.000 claims description 10
- 238000003466 welding Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 238000003475 lamination Methods 0.000 claims description 3
- 229920001187 thermosetting polymer Polymers 0.000 claims description 3
- 230000002787 reinforcement Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 238000005096 rolling process Methods 0.000 description 3
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention discloses a jointed board structure of a single panel and a manufacturing method thereof, wherein the jointed board structure of the single panel comprises a first product unit and a second product unit, and the first product unit and the second product unit respectively form two or more columns and two or more rows of mirror direction staggered typesetting in the X-axis and Y-axis directions; according to the invention, each product unit of the single panel is divided into a first product unit and a second product unit, the circuit pattern layer of the first product unit faces upwards, the circuit pattern layer of the second product unit faces downwards, the circuit pattern layers of the first product unit and the second product unit are respectively arranged in a mirror direction staggered manner in two or more columns and two or more rows in the X-axis direction and the Y-axis direction, and corresponding solder resist protection layers and/or reinforcing layers are arranged in a corresponding typesetting design.
Description
Technical Field
The invention relates to the technical field of flexible circuit boards, in particular to a jointed board structure of a single-sided board and a manufacturing method thereof.
Background
The flexible circuit board is a printed circuit board made of flexible insulating base materials, and has the characteristics of light, thin, flexible and the like, particularly a single-sided flexible circuit board, namely a single-sided board for short, and the structure of the flexible circuit board is generally only provided with an insulating base material layer, a circuit pattern layer and a solder resist protection layer, wherein a part of product bottom layers are attached with reinforcing layers, as shown in fig. 1, before the single-sided board is manufactured and processed, the single-sided board is required to be manufactured after being formed into a jointed board according to unit row board design, as shown in fig. 2, the technological process of the original single-sided board is as follows: copper foil blanking, top layer circuit pattern manufacturing, bottom layer reinforcing layer manufacturing, top layer solder resist protection layer manufacturing, and subsequent conventional flow, as shown in fig. 3. The thinnest area of the single-sided board product is even only about 30 mu m thick, the product is easy to be wrinkled and scrapped in the manufacturing process, and after a solder resist layer is manufactured on a circuit pattern layer of the single-sided board jointed board, the single-sided board jointed board is easy to have the problem of bending, rolling, tilting and deforming of the whole board after the solder resist layer is manufactured due to the manufacturing material performance, the upper surface tension, the lower surface tension and other reasons of the single-sided board jointed board, so that the product tilting bad is caused, the subsequent processing of the jointed board is influenced, and the problems of the product wrinkling, the tilting bad and the like of the single-sided board are required to be improved.
Therefore, the present inventors have developed and designed the present invention by actively researching and modifying the design of the panel structure of the single panel and the manufacturing method, which are not perfect, to make the design of the panel structure of the single panel and the manufacturing method inconvenient.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a jointed board structure of a single panel and a manufacturing method thereof, wherein the jointed board structure can improve the wrinkling and poor tilting of products.
In order to achieve the above object, the solution of the present invention is:
a manufacturing method of a single-sided board comprises the following steps:
step 1, copper foil blanking: preparing copper foil according to the required size of the jointed board;
step 2, drilling: drilling a needed process hole on the prepared copper foil;
step 3, manufacturing a top and bottom circuit pattern layer:
the first product unit area of the top layer circuit pattern layer is designed according to the circuit pattern layer required by the product, and the second product unit area is a wireless circuit pattern layer; in the X-axis direction of the top line pattern layer, the line pattern layers of the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more columns; in the Y-axis direction of the top line pattern layer, the line pattern layers of the first product unit area and the second product unit area are in mirror staggered typesetting of two or more rows;
the first product unit area of the bottom layer circuit pattern layer is a wireless circuit pattern layer, and the second product unit area is designed according to the circuit pattern layer required by the product; in the X-axis direction of the bottom layer circuit pattern layer, the circuit pattern layers of the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the X-axis direction typesetting mode of the top layer circuit pattern layer; in the Y-axis direction of the bottom layer circuit pattern layer, the circuit pattern layers of the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the Y-axis direction typesetting mode of the top layer circuit pattern layer;
after the top and bottom circuit pattern layers are manufactured, the top copper layer of the first product unit area forms a first unit top circuit pattern layer after the top and bottom double-sided exposure and DES, and the bottom copper layer of the first product unit area is completely etched and removed to form a single-sided plate structure with the circuit pattern layer facing upwards; etching and removing all the top copper layer of the second product unit area, and forming a circuit pattern layer of the second unit bottom layer on the bottom layer of the second product unit area to form a single-sided board structure with the circuit pattern layer facing downwards;
step 4, manufacturing a top and bottom reinforcing layer:
the first product unit area of the top reinforcing layer is a full-hollowed-out window, and the second product unit area is designed according to the reinforcing layer required by the product; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers;
the first product unit area of the bottom reinforcing layer is designed according to the reinforcing layer required by the product, and the second product unit area is a full hollow window; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers;
after the top and bottom reinforcing layers are manufactured, the top layer of the first product unit area is free of the reinforcing layer, and the bottom layer of the first product unit area is manufactured with the reinforcing layer to form a first unit bottom reinforcing layer; the top layer of the second product unit area is provided with a reinforcing layer to form a second unit top reinforcing layer, and the bottom layer of the second product unit area is free of a reinforcing layer;
and 5, manufacturing a top and bottom solder resist protection layer:
the first product unit area of the top-layer solder resist layer is designed according to the solder resist layer required by the product, and the second product unit area is a solder resist-free layer; the typesetting design mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first unit top layer solder resist layers of the first product unit areas of the top layer solder resist layers are independently arranged;
the first product unit area of the bottom layer solder resist protection layer is a solder resist protection layer, and the second product unit area is designed according to the solder resist protection layer required by the product; the typesetting mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the second unit bottom layer solder resist of each second product unit area of the bottom layer solder resist is independently arranged;
after the top and bottom solder resist layers are manufactured, forming a first unit top solder resist layer on the top layer of the first product unit area, and forming a bottom solder resist layer on the bottom layer of the first product unit area; and the top layer of the second product unit area is a non-welding protective layer, and the bottom layer of the second product unit area forms a second unit bottom layer welding protective layer.
In step 4, the reinforcing layers of the second product unit areas of the top reinforcing layer are separately arranged or all the reinforcing layers of the second product unit areas are connected into an integrated design; the reinforcing layers of the first product unit areas of the bottom reinforcing layer are arranged independently or are connected into an integrated design.
Further, the top and bottom solder resist protective layers are CVL covering film layers, and the manufacturing method comprises the following steps: and respectively attaching a top and a bottom solder resist protective layers on the top and bottom circuit pattern layers, and performing lamination, baking and curing to obtain the circuit board.
Further, the top and bottom solder resist protective layers are thermosetting ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, and baking and curing.
Further, the top and bottom solder resist protective layers are photosensitive ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, exposing and developing, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, baking, exposing and developing, and baking and curing.
Further, the contour processing step of one of the following process flows of the process flow of the single panel manufacturing method comprises the following steps: when the appearance is formed, the top layer of the jointed board is upwards placed on a machine table for processing, one or more first product units are sequentially formed by processing, and the appearance of all the first product units is formed; then the bottom layer of the jointed board is upwards placed on a machine table for processing, one or a plurality of second product units are sequentially processed and formed, and the appearance processing and forming of all the second product units are completed; when the circuit pattern layer of the second product unit is placed upwards, the structure of the second product unit is the same as that of the first product unit.
The invention can also be realized by adopting the following technical scheme:
a method for manufacturing a single panel, comprising the steps of:
step 1, copper foil blanking: preparing copper foil according to the required size of the jointed board;
step 2, drilling: drilling a needed process hole on the prepared copper foil;
step 3, manufacturing a top and bottom circuit pattern layer:
the first product unit area of the top layer circuit pattern layer is designed according to the circuit pattern layer required by the product, and the second product unit area is a wireless circuit pattern layer; in the X-axis direction of the top line pattern layer, the line pattern layers of the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more columns; in the Y-axis direction of the top line pattern layer, the line pattern layers of the first product unit area and the second product unit area are in mirror staggered typesetting of two or more rows;
the first product unit area of the bottom layer circuit pattern layer is a wireless circuit pattern layer, and the second product unit area is designed according to the circuit pattern layer required by the product; in the X-axis direction of the bottom layer circuit pattern layer, the circuit pattern layers of the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the X-axis direction typesetting mode of the top layer circuit pattern layer; in the Y-axis direction of the bottom layer circuit pattern layer, the circuit pattern layers of the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the Y-axis direction typesetting mode of the top layer circuit pattern layer;
after the top and bottom circuit pattern layers are manufactured, the top copper layer of the first product unit area forms a first unit top circuit pattern layer after the top and bottom double-sided exposure and DES, and the bottom copper layer of the first product unit area is completely etched and removed to form a single-sided plate structure with the circuit pattern layer facing upwards; etching and removing all the top copper layer of the second product unit area, and forming a bottom circuit pattern layer of the second unit by the bottom copper layer of the second product unit area to form a single-sided board structure with the circuit pattern layer facing downwards;
and 4, manufacturing a top and bottom solder resist protection layer:
the first product unit area of the top-layer solder resist layer is designed according to the solder resist layer required by the product, and the second product unit area is a solder resist-free layer; the typesetting design mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first unit top layer solder resist layers of the first product unit areas of the top layer solder resist layers are independently arranged;
the first product unit area of the bottom layer solder resist protection layer is a solder resist protection layer, and the second product unit area is designed according to the solder resist protection layer required by the product; the typesetting mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the second unit bottom layer solder resist of each second product unit area of the bottom layer solder resist is independently arranged;
after the top and bottom solder resist layers are manufactured, forming a first unit top solder resist layer on the top layer of the first product unit area, and forming a bottom solder resist layer on the bottom layer of the first product unit area; a top non-welding protective layer of the second product unit area, and a bottom layer of the second product unit area forms a second unit bottom welding protective layer;
step 5, manufacturing a top and bottom reinforcing layer:
the first product unit area of the top reinforcing layer is a full-hollowed-out window, and the second product unit area is designed according to the reinforcing layer required by the product; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers;
the first product unit area of the bottom reinforcing layer is designed according to the reinforcing layer required by the product, and the second product unit area is a full hollow window; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers;
after the top and bottom reinforcing layers are manufactured, the top layer of the first product unit area is free of the reinforcing layer, and the bottom layer of the first product unit area is manufactured with the reinforcing layer to form a first unit bottom reinforcing layer; the top layer of the second product unit area is provided with a reinforcing layer to form a second unit top reinforcing layer, and the bottom layer of the second product unit area is free of a reinforcing layer.
The invention can also be realized by adopting the following technical scheme:
a jointed board structure of a single-sided board comprises a substrate layer, a first product unit and a second product unit, wherein the first product unit and the second product unit are arranged on the substrate layer, the first product unit and the second product unit are arranged in a mirror direction staggered manner in two or more columns in the X-axis direction, and the first product unit and the second product unit are arranged in a mirror direction staggered manner in two or more rows in the Y-axis direction; the first product unit and the second product unit are respectively provided with a circuit pattern layer, a solder resist protection layer and/or a reinforcing layer, wherein the circuit pattern layer of the first product unit faces upwards, the solder resist protection layer of the first product unit is arranged on the circuit pattern layer, and the reinforcing layer of the first product unit is arranged on the bottom surface of the substrate layer; the circuit pattern layer of second product unit faces downwards, and the solder resist protective layer of second product unit sets up in the circuit pattern layer bottom surface of second product unit, and the reinforcement layer of second product unit sets up the top surface at the substrate layer.
Further, the reinforcing layers of the first product unit and the second product unit are independently arranged.
Further, all the reinforcing layers of the first product units are connected into an integrated design, and all the reinforcing layers of the second product units are connected into an integrated design.
After the structure is adopted, each product unit of the original single panel is typeset in an array mode according to the line graph layer, the product units are divided into a first product unit and a second product unit, the line graph layer of the first product unit is upward, the line graph layer of the second product unit is downward, the line graph layers of the first product unit and the second product unit are in mirror direction staggered typesetting of two or more columns in the X-axis direction, the line graph layers of the first product unit and the second product unit are in mirror direction staggered typesetting of two or more rows in the Y-axis direction, corresponding solder resist protection layers and/or reinforcing layers are correspondingly typeset, namely, the typesetting design mode of the original single panel is referred to the typesetting design mode of the double panel, and then the single panel is manufactured according to the manufacturing flow of the double panel. The whole plate structure of the single-sided plate spliced structure is provided with a bottom circuit pattern layer, a bottom solder resist protective layer and a top reinforcing layer compared with the original single-sided plate spliced structure, and the whole thickness of the spliced structure is thicker than that of the original single-sided plate spliced structure, so that the problem of poor product wrinkling and tearing in the manufacturing process of the single-sided plate is effectively solved. Meanwhile, as the solder resist layer of each first product unit area of the top layer solder resist layer is independently arranged and is provided with a product unit area at intervals, the solder resist layer of each second product unit area of the bottom layer solder resist layer is independently arranged and is provided with a product unit area at intervals, the surface tension of each product unit of the top and bottom plate surfaces is dispersed, the problem of bending, rolling and warping and deformation of the plate surfaces after the whole plate top layer solder resist layer of the original single-plate splice structure is manufactured is effectively solved, and the manufacturing yield of a single panel is improved.
Drawings
Fig. 1a is a schematic top layer structure of a conventional single panel.
FIG. 1b is a schematic view of the bottom structure of a conventional single panel.
Fig. 2 is a top schematic view of a prior art panel structure.
FIG. 3 is a flow chart of a conventional single panel splice structure.
FIG. 4 is a top-level schematic view of a single panel structure of the present invention.
FIG. 5 is a schematic view of the bottom layer of a single panel structure of the present invention.
FIG. 6 is a cross-sectional view of A-A of a single panel structure of the present invention.
FIG. 7 is a B-B cross-sectional view of a single panel splice structure of the present invention.
FIG. 8 is a top line pattern layer of a single panel tile structure of the present invention.
FIG. 9 is a view of the underlying circuit pattern layer of a single panel splice structure of the present invention.
FIG. 10 shows a top reinforcement layer of a single panel structure of the present invention.
FIG. 11 is a view showing the underlying reinforcing layer of a single panel structure of the present invention.
FIG. 12 is a top layer solder resist of a single panel splice structure of the present invention.
FIG. 13 is a bottom solder mask layer of a single panel structure of the present invention.
Fig. 14 is a process flow diagram of a single panel according to the present invention.
Fig. 15 is a schematic process diagram of a method for manufacturing a single panel according to the present invention.
Detailed Description
In order to further explain the technical scheme of the invention, the invention is explained in detail by specific examples.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientation or positional relationship based on that shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. In the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.
As shown in fig. 4 to 15, the present invention discloses a panel structure of a single panel, which includes a substrate layer, and a first product unit and a second product unit disposed on the substrate layer, wherein the first product unit and the second product unit are arranged in a staggered manner in a mirror direction in two or more columns in an X-axis direction, and the first product unit and the second product unit are arranged in a staggered manner in a mirror direction in two or more rows in a Y-axis direction; the first product unit and the second product unit are respectively provided with a circuit pattern layer, a solder resist protection layer and/or a reinforcing layer, wherein the circuit pattern layer of the first product unit faces upwards, the solder resist protection layer of the first product unit is arranged on the circuit pattern layer, and the reinforcing layer of the first product unit is arranged on the bottom surface of the substrate layer; the circuit pattern layer of second product unit faces downwards, and the solder resist protective layer of second product unit sets up in the circuit pattern layer bottom surface of second product unit, and the reinforcement layer of second product unit sets up the top surface at the substrate layer.
Further, the reinforcing layers of the first product units may be separately arranged or a plurality of reinforcing layers of the first product units may be connected into an integrated design, and the reinforcing layers of the second product units may be separately arranged or all reinforcing layers of the second product units may be connected into an integrated design.
The invention also discloses a manufacturing method of the single-sided board, as shown in fig. 14 and 15, wherein the process principle schematic diagram of the manufacturing method of the single-sided board of the invention is shown in fig. 15, and a group of first units and second units are used as the process principle schematic diagram for explanation, and the manufacturing method comprises the following steps:
step 1, copper foil blanking: preparing copper foil according to the required size of the jointed board;
step 2, drilling: drilling a needed process hole on the prepared copper foil;
step 3, manufacturing a top and bottom circuit pattern layer:
as shown in fig. 8, the top line pattern layer 110 is designed in the following manner: the first product unit area 100 of the top line pattern layer 110 is designed according to the line pattern layer required by the product, and the second product unit area 200 is designed as a line-free pattern layer; in the X-axis direction of the top line pattern layer 110, the line pattern layers of the first product unit region 100 and the second product unit region 200 are in a mirror staggered typesetting design in two or more columns; in the Y-axis direction of the top line pattern layer 110, the line pattern layers of the first product cell region 100 and the second product cell region 200 are of a mirror-staggered layout design in two or more rows.
As shown in fig. 9, the design of the bottom line pattern layer 210: the first product unit area 100 of the bottom line pattern layer 210 is designed as a line-free pattern layer, and the second product unit area 200 is designed according to the line pattern layer required by the product; in the X-axis direction of the bottom line pattern layer 210, the two or more columns of the line pattern layers of the first product unit region 100 and the second product unit region 200 are in mirror-direction staggered typesetting design, and are designed corresponding to the X-axis direction typesetting mode of the top line pattern layer 110; in the Y-axis direction of the bottom line pattern layer 210, the two or more lines of the line pattern layers of the first product unit region 100 and the second product unit region 200 are arranged in a mirror-staggered manner, and are designed corresponding to the Y-axis direction typesetting manner of the top line pattern layer 110.
After the top and bottom circuit pattern layers are manufactured, after top and bottom double-sided exposure and DES (development, etching and striping), the top copper layer of the first product unit area 100 forms a first unit top circuit pattern layer 111, and the bottom copper layer of the first product unit area 100 is completely etched and removed to form a single-sided board structure with an upward circuit pattern layer; the top copper layer of the second product unit region 200 is etched completely, and the bottom copper layer of the second product unit region 200 forms a second unit bottom circuit pattern layer 211, forming a single-sided structure with the circuit pattern layer facing downward.
Step 4, manufacturing a top and bottom reinforcing layer:
as shown in fig. 10, the first product unit area 100 of the top reinforcing layer 130 is designed as a full hollow window, and the second product unit area 200 is designed according to the reinforcing layer required by the product; the typesetting design modes of the reinforcement layers of the first product unit area 100 and the second product unit area 200 are correspondingly designed according to the typesetting modes of the top-bottom circuit pattern layers; the stiffening layer of each second product unit area 200 of the top stiffening layer 130 may be provided separately or all the stiffening layers of the second product unit areas 200 may be connected in an integrated design.
As shown in fig. 11, the first product unit region 100 of the bottom reinforcement layer 230 is designed according to the reinforcement layer required by the product, and the second product unit region 200 is designed as a full hollow window; the typesetting design modes of the reinforcement layers of the first product unit area 100 and the second product unit area 200 are correspondingly designed according to the typesetting modes of the top-bottom circuit pattern layers; the stiffening layer of each first product unit area 100 of the bottom stiffening layer 230 may be provided separately or all the stiffening layers of the first product unit area 100 may be connected in an integrated design.
After the top and bottom reinforcing layers are manufactured, the top layer of the first product unit area 100 is free of the reinforcing layer, and the bottom layer of the first product unit area 100 is manufactured with the reinforcing layer to form a first unit bottom reinforcing layer 131; the top layer of the second product cell region 200 is formed with a stiffening layer to form a second cell top stiffening layer 231, and the bottom layer of the second product cell region 200 is devoid of a stiffening layer.
And 5, manufacturing a top and bottom solder resist protection layer:
as shown in fig. 12, the first product unit region 100 of the top solder resist 120 is designed according to the solder resist required by the product, and the second product unit region 200 is designed as a solder resist-free resist; the typesetting design modes of the solder resist protection layers of the first product unit area 100 and the second product unit area 200 are correspondingly designed according to the typesetting modes of the top-bottom circuit pattern layers; the first unit top solder resist 121 of each first product unit area 100 of the top solder resist 120 is provided separately.
As shown in fig. 13, the first product unit region 100 of the bottom solder resist layer 220 is designed as a solder resist free layer, and the second product unit region 200 is designed as a solder resist layer required for the product; the typesetting design modes of the solder resist protection layers of the first product unit area 100 and the second product unit area 200 are correspondingly designed according to the typesetting modes of the top-bottom circuit pattern layers; the second unit under-layer solder resist 221 of each second product unit area 200 of the under-layer solder resist 220 is provided separately.
After the top and bottom solder resist layers are manufactured, the top layer of the first product unit region 100 forms a first unit top solder resist layer 121, and the bottom layer of the first product unit region 100 is a non-solder resist layer; the top layer of the second product cell region 200 is a solder resist and the bottom layer of the second product cell region 200 forms a second cell bottom solder resist 221.
Furthermore, the steps of manufacturing the top and bottom solder resist protective layers and manufacturing the top and bottom reinforcing layers can be exchanged.
Further, the top and layer solder resist protection layers are CVL covering film layers, and the manufacturing method comprises the following steps: and respectively attaching a top and a bottom solder resist protective layers on the top and bottom circuit pattern layers, and performing lamination, baking and curing to obtain the circuit board.
Further, the top and bottom solder resist protective layers are thermosetting ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, and baking and curing.
Further, the top and bottom solder resist protective layers are photosensitive ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, exposing and developing, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, baking, exposing and developing, and baking and curing.
Further, the contour processing step of one of the following process flows of the process flow of the single panel manufacturing method comprises the following steps: when the appearance is formed, the top layer of the jointed board is upwards placed on a machine table for processing, one or a plurality of first product units 10 are sequentially formed by processing, and the appearance of all the first product units 10 is formed; then the bottom layer of the jointed board is upwards placed on a machine table for processing, one or a plurality of second product units 20 are sequentially processed and formed, and the appearance processing and forming of all the second product units 20 are completed; the same is done with the construction of the first product unit 10 when the line pattern layer of the second product unit 20 is placed face up.
After the scheme is adopted, the line pattern layers of the first product unit face upwards and the line pattern layers of the second product unit face downwards, the line pattern layers of the first product unit and the second product unit are in mirror-direction staggered typesetting design in two or more columns in the X-axis direction, the line pattern layers of the first product unit and the second product unit are in mirror-direction staggered typesetting design in two or more rows in the Y-axis direction, and corresponding solder resist protection layers and/or reinforcing layers are correspondingly typesetting design, namely, the typesetting design mode of the original single panel is referred to the typesetting design mode of the double panel, and then the single panel is manufactured according to the manufacturing flow of the double panel. Meanwhile, as the solder resist layer of each first product unit area of the top layer solder resist layer is independently arranged and is provided with a product unit area at intervals, the solder resist layer of each second product unit area of the bottom layer solder resist layer is independently arranged and is provided with a product unit area at intervals, the surface tension of each product unit of the top and bottom plate surfaces is dispersed, the problem of bending, rolling and warping and deformation of the plate surfaces after the whole plate top layer solder resist layer of the original single-plate splice structure is manufactured is effectively solved, and the manufacturing yield of a single panel is improved.
The above examples and drawings are not intended to limit the form or form of the present invention, and any suitable variations or modifications thereof by those skilled in the art should be construed as not departing from the scope of the present invention.
Claims (8)
1. The manufacturing method of the single-sided board is characterized by comprising the following steps of: step 1, copper foil blanking: preparing copper foil according to the required size of the jointed board; step 2, drilling: drilling a needed process hole on the prepared copper foil; step 3, manufacturing a top and bottom circuit pattern layer: the first product unit area of the top layer circuit pattern layer is designed according to the circuit pattern layer required by the product, and the second product unit area is a wireless circuit pattern layer; in the X-axis direction of the top layer line graph layer, the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more columns; in the Y-axis direction of the top line graph layer, the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more rows; the first product unit area of the bottom layer circuit pattern layer is a wireless circuit pattern layer, and the second product unit area is designed according to the circuit pattern layer required by the product; in the X-axis direction of the bottom layer circuit pattern layer, the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and correspond to the X-axis direction typesetting mode of the top layer circuit pattern layer; in the Y-axis direction of the bottom line graph layer, the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the Y-axis direction typesetting mode of the top line graph layer; after the top and bottom circuit pattern layers are manufactured, the top copper layer of the first product unit area forms a first unit top circuit pattern layer after the top and bottom double-sided exposure and DES, and the bottom copper layer of the first product unit area is completely etched and removed to form a single-sided plate structure with the circuit pattern layer facing upwards; etching and removing all the top copper layer of the second product unit area, and forming a circuit pattern layer of the second unit bottom layer on the bottom layer of the second product unit area to form a single-sided board structure with the circuit pattern layer facing downwards; step 4, manufacturing a top and bottom reinforcing layer: the first product unit area of the top reinforcing layer is a full-hollowed-out window, and the second product unit area is designed according to the reinforcing layer required by the product; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first product unit area of the bottom reinforcing layer is designed according to the reinforcing layer required by the product, and the second product unit area is a full hollow window; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; after the top and bottom reinforcing layers are manufactured, the top layer of the first product unit area is free of the reinforcing layer, and the bottom layer of the first product unit area is manufactured with the reinforcing layer to form a first unit bottom reinforcing layer; the top layer of the second product unit area is provided with a reinforcing layer to form a second unit top reinforcing layer, and the bottom layer of the second product unit area is free of a reinforcing layer; and 5, manufacturing a top and bottom solder resist protection layer: the first product unit area of the top-layer solder resist layer is designed according to the solder resist layer required by the product, and the second product unit area is a solder resist-free layer; the typesetting design mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first unit top layer solder resist layers of the first product unit areas of the top layer solder resist layers are independently arranged; the first product unit area of the bottom layer solder resist protection layer is a solder resist protection layer, and the second product unit area is designed according to the solder resist protection layer required by the product; the typesetting mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the second unit bottom layer solder resist of each second product unit area of the bottom layer solder resist is independently arranged; after the top and bottom solder resist layers are manufactured, forming a first unit top solder resist layer on the top layer of the first product unit area, and forming a bottom solder resist layer on the bottom layer of the first product unit area; and the top layer of the second product unit area is a non-welding protective layer, and the bottom layer of the second product unit area forms a second unit bottom layer welding protective layer.
2. A method of making a single panel as claimed in claim 1, wherein: in the step 4, the reinforcing layers of the second product unit areas of the top reinforcing layer are independently arranged or all the reinforcing layers of the second product unit areas are connected into an integrated design; the reinforcing layers of the first product unit areas of the bottom reinforcing layer are arranged independently or are connected into an integrated design.
3. A method of making a single panel as claimed in claim 1, wherein: the top and bottom solder resist protective layers are CVL covering film layers, and the manufacturing method comprises the following steps: and respectively attaching a top and a bottom solder resist protective layers on the top and bottom circuit pattern layers, and performing lamination, baking and curing to obtain the circuit board.
4. A method of making a single panel as claimed in claim 1, wherein: the top and bottom solder resist protective layers are thermosetting ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, and baking and curing.
5. A method of making a single panel as claimed in claim 1, wherein: the top and bottom solder resist protective layers are photosensitive ink layers, and the manufacturing method comprises the following steps: the method comprises the steps of silk-screen printing a top solder resist layer on a top circuit pattern layer, baking, exposing and developing, silk-screen printing a bottom solder resist layer on a bottom circuit pattern layer, baking, exposing and developing, and baking and curing.
6. A method of making a single panel as claimed in claim 1, wherein: the method for manufacturing the single panel comprises the following processing steps of one of the following processes: when the appearance is formed, the top layer of the jointed board is upwards placed on a machine table for processing, one or more first product units are sequentially formed by processing, and the appearance of all the first product units is formed; then the bottom layer of the jointed board is upwards placed on a machine table for processing, one or a plurality of second product units are sequentially processed and formed, and the appearance processing and forming of all the second product units are completed; when the circuit pattern layer of the second product unit is placed upwards, the structure of the second product unit is the same as that of the first product unit.
7. The manufacturing method of the single-sided board is characterized by comprising the following steps of: step 1, copper foil blanking: preparing copper foil according to the required size of the jointed board; step 2, drilling: drilling a needed process hole on the prepared copper foil; step 3, manufacturing a top and bottom circuit pattern layer: the first product unit area of the top layer circuit pattern layer is designed according to the circuit pattern layer required by the product, and the second product unit area is a wireless circuit pattern layer; in the X-axis direction of the top layer line graph layer, the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more columns; in the Y-axis direction of the top line graph layer, the first product unit area and the second product unit area are in mirror direction staggered typesetting of two or more rows; the first product unit area of the bottom layer circuit pattern layer is a wireless circuit pattern layer, and the second product unit area is designed according to the circuit pattern layer required by the product; in the X-axis direction of the bottom layer circuit pattern layer, the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and correspond to the X-axis direction typesetting mode of the top layer circuit pattern layer; in the Y-axis direction of the bottom line graph layer, the first product unit area and the second product unit area are arranged in a mirror direction staggered mode in two or more rows, and the mirror direction staggered mode corresponds to the Y-axis direction typesetting mode of the top line graph layer; after the top and bottom circuit pattern layers are manufactured, the top copper layer of the first product unit area forms a first unit top circuit pattern layer after the top and bottom double-sided exposure and DES, and the bottom copper layer of the first product unit area is completely etched and removed to form a single-sided plate structure with the circuit pattern layer facing upwards; etching and removing all the top copper layer of the second product unit area, and forming a circuit pattern layer of the second unit bottom layer on the bottom layer of the second product unit area to form a single-sided board structure with the circuit pattern layer facing downwards; and 4, manufacturing a top and bottom solder resist protection layer: the first product unit area of the top-layer solder resist layer is designed according to the solder resist layer required by the product, and the second product unit area is a solder resist-free layer; the typesetting design mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first unit top layer solder resist layers of the first product unit areas of the top layer solder resist layers are independently arranged; the first product unit area of the bottom layer solder resist protection layer is a solder resist protection layer, and the second product unit area is designed according to the solder resist protection layer required by the product; the typesetting mode of the solder resist protection layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the second unit bottom layer solder resist of each second product unit area of the bottom layer solder resist is independently arranged; after the top and bottom solder resist layers are manufactured, forming a first unit top solder resist layer on the top layer of the first product unit area, and forming a bottom solder resist layer on the bottom layer of the first product unit area; a top non-welding protective layer of the second product unit area, and a bottom layer of the second product unit area forms a second unit bottom welding protective layer; step 5, manufacturing a top and bottom reinforcing layer: the first product unit area of the top reinforcing layer is a full-hollowed-out window, and the second product unit area is designed according to the reinforcing layer required by the product; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; the first product unit area of the bottom reinforcing layer is designed according to the reinforcing layer required by the product, and the second product unit area is a full hollow window; the typesetting mode of the reinforcing layer of the first product unit area and the second product unit area corresponds to the typesetting mode of the top and bottom circuit pattern layers; after the top and bottom reinforcing layers are manufactured, the top layer of the first product unit area is free of the reinforcing layer, and the bottom layer of the first product unit area is manufactured with the reinforcing layer to form a first unit bottom reinforcing layer; the top layer of the second product unit area is provided with a reinforcing layer to form a second unit top reinforcing layer, and the bottom layer of the second product unit area is free of a reinforcing layer.
8. A panel structure of single panel, its characterized in that: the product comprises a substrate layer, and a first product unit and a second product unit which are arranged on the substrate layer, wherein the first product unit and the second product unit are arranged in a mirror direction staggered manner in two or more columns in the X-axis direction, and the first product unit and the second product unit are arranged in a mirror direction staggered manner in two or more rows in the Y-axis direction; the first product unit and the second product unit are respectively provided with a circuit pattern layer, a solder resist protection layer and/or a reinforcing layer, wherein the circuit pattern layer of the first product unit faces upwards, the solder resist protection layer of the first product unit is arranged on the circuit pattern layer, and the reinforcing layer of the first product unit is arranged on the bottom surface of the substrate layer; the circuit pattern layer of the second product unit faces downwards, the solder resist protection layer of the second product unit is arranged on the bottom surface of the circuit pattern layer of the second product unit, and the reinforcing layer of the second product unit is arranged on the top surface of the base material layer; the reinforcing layers of the first product unit and the second product unit are independently arranged; all the reinforcing layers of the first product units are connected into an integrated design, and all the reinforcing layers of the second product units are connected into an integrated design.
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