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CN109638077A - A kind of film crystal tube preparation method and thin film transistor (TFT) - Google Patents

A kind of film crystal tube preparation method and thin film transistor (TFT) Download PDF

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Publication number
CN109638077A
CN109638077A CN201811271819.6A CN201811271819A CN109638077A CN 109638077 A CN109638077 A CN 109638077A CN 201811271819 A CN201811271819 A CN 201811271819A CN 109638077 A CN109638077 A CN 109638077A
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Prior art keywords
layer
film
electrode layer
drain electrode
source
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CN201811271819.6A
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Inventor
胡小波
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN201811271819.6A priority Critical patent/CN109638077A/en
Priority to PCT/CN2018/120413 priority patent/WO2020087669A1/en
Publication of CN109638077A publication Critical patent/CN109638077A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

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  • Thin Film Transistor (AREA)

Abstract

本发明实施例公开了一种薄膜晶体管制备方法及薄膜晶体管。本发明实施例中薄膜晶体管制备方法包括:在玻璃基板上依次形成栅极层、栅极绝缘层和铟镓锌氧化物IGZO层;在IGZO层之上沉积Ti膜,再沉积源漏电极层,源漏电极层为MoAlMo复合膜层;在源漏电极层之上形成区域厚度不同的光刻胶图案,并刻蚀源漏电极层的外围;去掉IGZO层沟道的光刻胶,刻蚀沟道内MoAlMo膜层,并保证Ti膜不被刻蚀;将玻璃基板上剩余的光刻胶去掉,并依次进行钝化层、像素电极层的制作。本发明实施例中利用Ti膜和MoAlMo膜层的刻蚀差异,在不增加光罩的前提下,在IGZO沟道上方形成Ti刻蚀阻挡层,可以保护IGZO层不受Al酸刻蚀液影响,提高薄膜晶体管的器件特性。

Embodiments of the present invention disclose a method for preparing a thin film transistor and a thin film transistor. The method for preparing a thin film transistor in the embodiment of the present invention includes: sequentially forming a gate layer, a gate insulating layer and an indium gallium zinc oxide IGZO layer on a glass substrate; depositing a Ti film on the IGZO layer, and then depositing a source-drain electrode layer, The source and drain electrode layers are MoAlMo composite film layers; photoresist patterns with different regional thicknesses are formed on the source and drain electrode layers, and the periphery of the source and drain electrode layers is etched; the photoresist of the IGZO layer channel is removed, and the grooves are etched The MoAlMo film layer in the channel is ensured, and the Ti film is not etched; the remaining photoresist on the glass substrate is removed, and the passivation layer and the pixel electrode layer are sequentially fabricated. In the embodiment of the present invention, using the etching difference between the Ti film and the MoAlMo film layer, without adding a mask, a Ti etching barrier layer is formed above the IGZO channel, which can protect the IGZO layer from the influence of the Al acid etching solution , to improve the device characteristics of thin film transistors.

Description

A kind of film crystal tube preparation method and thin film transistor (TFT)
Technical field
The present invention relates to technical field of semiconductor, and in particular to a kind of film crystal tube preparation method and film crystal Pipe.
Background technique
IGZO (indium gallium zinc oxide) is the abbreviation of indium gallium zinc oxide, is made with indium gallium zinc oxide Have the advantages that mobility is high, homogeneity is good, transparent, simple process for the IGZO thin film transistor (TFT) of semiconductor channel layer material.
The liquid crystal display (Liquid Crystal Display, LCD) and organic light-emitting diodes driven by IGZO-TFT Managing (Organic Light-Emitting Diode, OLED) panel has high-precision, low-power consumption and high touch-control performance etc. many Performance advantage, relative to traditional amorphous silicon (a-Si) thin film transistor (TFT) (Thin Film Transistor, TFT), IGZO The coefficient of TFT device scene effect mobility, switching current ratio, threshold voltage and sub- threshold coefficient etc. shows more It is excellent, therefore active matrix liquid crystal display (Active Matrix Liquid is widely used in by the active layer as TFT Crystal Display, AMLCD) and active matrix organic light-emitting diode (Active-matrix organic light- Emitting diode, AMOLED) in;It is generally ESL mechanism in conventional Al processing procedure IGZO device, since IGZO is intolerant to peroxide Acetyl nitrate (Peroxyacetyl Nitrate, PAN) acid, easily by the harsh eating away of PAN, etch rate be can achieve 105nm/min, therefore one layer of etching barrier layer need to be deposited on IGZO and protected, generally silica (SiO2), so One of light shield need to be increased to increase production cost.
Summary of the invention
The embodiment of the present invention provides a kind of film crystal tube preparation method and thin film transistor (TFT), utilizes Ti film and MoAlMo film The etching difference of layer forms Ti etching barrier layer above IGZO channel, can protect IGZO under the premise of not increasing light shield Layer is not influenced by Al acid etch liquid, improves the device property of thin film transistor (TFT).
To solve the above problems, in a first aspect, the application provides a kind of film crystal tube preparation method, this method comprises:
Grid layer, gate insulating layer and IGZO layers of indium gallium zinc oxide are sequentially formed on the glass substrate;
The depositing Ti film on IGZO layers described, redeposited source-drain electrode layer, the source-drain electrode layer are that MoAlMo is compound Film layer;
The different photoetching agent pattern of forming region thickness on the source-drain electrode layer, and etch the source-drain electrode layer Periphery;
Remove the photoresist of the IGZO layers of channel, etches MoAlMo film layer in channel, and guarantee that Ti film is not etched;
Photoresist remaining on the glass substrate is removed, and is successively passivated the production of layer, pixel electrode layer.
Further, it in the photoresist for removing the IGZO layers of channel, etches in channel after MoAlMo film layer, by glass Remaining photoresist removes on substrate, and before the step of being successively passivated the production of layer, pixel electrode layer, the method is also Include:
The processing of O ion implanting is carried out to the Ti film in the IGZO layers of channel, in a large amount of O ion implanting to Ti film layer Face;
By glass substrate in O2It is made annealing treatment under environment, so that Ti and O ions binding forms insulation TiO2Film.
Further, described to sequentially form grid layer, gate insulating layer and indium gallium zinc oxide IGZO on the glass substrate The step of layer, comprising:
Grid layer and gate insulating layer are sequentially formed on the glass substrate;
Indium gallium zinc oxide IGZO layers is deposited with sputtering technology, and forms pattern through yellow light process, etching processing procedure;
Further, the step of forming region thickness on the source-drain electrode layer different photoetching agent pattern, Include:
Through yellow light process half-tone light shield, the different photoetching agent pattern of forming region thickness.
Further, wherein the photoresist of the IGZO layers of channel is thinner than the photoresist at both ends.
Further, the step of the periphery of the etching source-drain electrode layer, comprising:
With containing F etching liquid or PAN acid carry out dry etching, with etch periphery source-drain electrode layer.
Further, the photoresist for removing the IGZO layers of channel etches MoAlMo film layer in channel, and guarantees Ti The step of film is not etched, comprising:
Carry out O2Ashing processing, removes the photoresist of the IGZO layers of channel;
MoAlMo film layer in the IGZO layers of channel described in the PAN acid etch without F.
Further, wherein the grid layer is AlMo composite film.
Further, the Ti film with a thickness of
Second aspect, the application provide a kind of thin film transistor (TFT), and the thin film transistor (TFT) includes:
Glass substrate;
Grid layer is prepared in the glass baseplate surface;
Gate insulating layer is prepared in the glass baseplate surface, and covers the grid layer;
IGZO layers, it is prepared in the gate insulator layer surface;
Ti film is prepared in the gate insulator layer surface, is located at the two sides IGZO layers of;
Source-drain electrode layer is prepared in the Ti film surface, including source electrode layer and drain electrode layer, the source electrode layer and institute It states and is formed with channel region between drain electrode layer;
Passivation layer surrounds the source-drain electrode layer;
Pixel electrode layer is prepared in drain electrode layer surface.
Present invention method sequentially forms grid layer, gate insulating layer and indium gallium zinc oxide on the glass substrate IGZO layers;The depositing Ti film on IGZO layers, redeposited source-drain electrode layer, source-drain electrode layer are MoAlMo composite film;In source The different photoetching agent pattern of forming region thickness on drain electrode layer, and etch the periphery of source-drain electrode layer;Remove IGZO layers of ditch The photoresist in road etches MoAlMo film layer in channel, and guarantees that Ti film is not etched;Photoresist remaining on glass substrate is gone Fall, and is successively passivated the production of layer, pixel electrode layer.The etching of Ti film and MoAlMo film layer is utilized in the embodiment of the present invention Difference forms Ti etching barrier layer above IGZO channel, can protect IGZO layers not by Al under the premise of not increasing light shield Acid etch liquid influences, and improves the device property of thin film transistor (TFT).
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached Figure.
Fig. 1 is a kind of one embodiment process signal of the film crystal tube preparation method provided in the embodiment of the present invention Figure;
Fig. 2 is a kind of another embodiment process signal of the film crystal tube preparation method provided in the embodiment of the present invention Figure;
Fig. 3 is sequentially formed on the glass substrate in a kind of film crystal tube preparation method provided in the embodiment of the present invention Structural schematic diagram after grid layer, gate insulating layer;
Fig. 4 is to form IGZO in gate insulating layer in a kind of film crystal tube preparation method provided in the embodiment of the present invention Structural schematic diagram after layer;
Fig. 5 be in a kind of film crystal tube preparation method provided in the embodiment of the present invention on IGZO layers depositing Ti Film, the structural schematic diagram after redeposited source-drain electrode layer;
Fig. 6 is formed on source-drain electrode layer in a kind of film crystal tube preparation method provided in the embodiment of the present invention Structural schematic diagram after the different photoetching agent pattern of area thickness;
Fig. 7 is the periphery that source-drain electrode layer is etched in a kind of film crystal tube preparation method provided in the embodiment of the present invention Structural schematic diagram afterwards;
Fig. 8 is the photoetching for removing IGZO layers of channel in a kind of film crystal tube preparation method provided in the embodiment of the present invention Glue etches MoAlMo film layer in channel, and guarantees the structural schematic diagram after Ti film is not etched;
Fig. 9 is Ti membrane modifying in IGZO layers of channel in a kind of film crystal tube preparation method provided in the embodiment of the present invention Form insulation TiO2Structural schematic diagram after film;
Figure 10 is will be remaining on glass substrate in a kind of film crystal tube preparation method provided in the embodiment of the present invention Photoresist remove after structural schematic diagram;
Figure 11 is the structural schematic diagram of the thin film transistor (TFT) provided in the embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those skilled in the art's every other implementation obtained without creative efforts Example, shall fall within the protection scope of the present invention.
Thin film transistor (TFT) (Thin-film transistor, TFT) is one of type of field effect transistor, rough system It is that a variety of different films are deposited on substrate as mode, such as semiconductor active layer, dielectric layer and metal electrode layer.Film is brilliant Body pipe has a very important role to the working performance of display device
As shown in Figure 1, for one embodiment schematic diagram of film crystal tube preparation method in the embodiment of the present invention, this method Include:
S101, grid layer, gate insulating layer and IGZO layers of indium gallium zinc oxide are sequentially formed on the glass substrate.
Specifically, sequentially forming grid layer, gate insulating layer and IGZO layers of indium gallium zinc oxide of step on the glass substrate Suddenly it may further include: sequentially forming grid layer and gate insulating layer on the glass substrate;Indium gallium zinc is deposited with sputtering technology IGZO layers of oxide, and pattern is formed through yellow light process, etching processing procedure.Wherein, grid layer can be AlMo composite film.Separately Outside, yellow light process and etching processing procedure are customary technical means in the art, and detailed process be not described in detail herein.
S102, the depositing Ti film on IGZO layers, redeposited source-drain electrode layer.
Wherein, source-drain electrode layer is MoAlMo composite film.The depositing Ti film on IGZO layers, redeposited source-drain electrode layer It include: to sink Ti film with sputtering technology, redeposited source-drain electrode layer.Further, sedimentary origin drain electrode layer includes being sequentially depositing source Electrode layer and drain electrode layer.Depositing Ti film thickness is on IGZO layersIn some embodiment of the invention, it is Avoid that there is good etch stopper effect while waste of material, depositing Ti film thickness is preferably on IGZO layers
S103, the different photoetching agent pattern of forming region thickness on source-drain electrode layer, and etch source-drain electrode layer Periphery.
Wherein, the step of forming region thickness on the source-drain electrode layer different photoetching agent pattern, into one Step may include: through yellow light process half-tone light shield, the different photoetching agent pattern of forming region thickness.Further, institute The photoresist for stating IGZO layers of channel is thinner than the photoresist at both ends.
In addition, further, the step of the periphery of the etching source-drain electrode layer, comprising: with containing F etching liquid or PAN acid carries out dry etching, to etch the source-drain electrode layer of periphery.
S104, the photoresist for removing IGZO layers of channel etch MoAlMo film layer in channel, and guarantee that Ti film is not etched.
In the embodiment of the present invention, this removes the photoresist of the IGZO layers of channel, etches MoAlMo film layer in channel, and protect The step of card Ti film is not etched may further include: carry out O2Ashing processing, removes the photoresist of the IGZO layers of channel; With the MoAlMo film layer in IGZO layers of channel of PAN acid etch without F.Since the PAN acid without F can only etch MoAlMo film Layer, cannot etch Ti, therefore the Ti film layer above channel is retained.
S105, photoresist remaining on glass substrate is removed, and is successively passivated the production of layer, pixel electrode layer.
In the embodiment of the present invention, each type of film such as passivation layer, pixel electrode layer and thickness are without limitation.In addition, by glass Remaining photoresist removes on glass substrate, and the step of being successively passivated the production of layer, pixel electrode layer can refer to it is existing Implementation in technology, is not described in detail herein.
Present invention method sequentially forms grid layer, gate insulating layer and indium gallium zinc oxide on the glass substrate IGZO layers;The depositing Ti film on IGZO layers, redeposited source-drain electrode layer, source-drain electrode layer are MoAlMo composite film;In source The different photoetching agent pattern of forming region thickness on drain electrode layer, and etch the periphery of source-drain electrode layer;Remove IGZO layers of ditch The photoresist in road etches MoAlMo film layer in channel, and guarantees that Ti film is not etched;Photoresist remaining on glass substrate is gone Fall, and is successively passivated the production of layer, pixel electrode layer.The etching of Ti film and MoAlMo film layer is utilized in the embodiment of the present invention Difference forms Ti etching barrier layer above IGZO channel, can protect IGZO layers not by Al under the premise of not increasing light shield Acid etch liquid influences, and improves the device property of thin film transistor (TFT).
In other embodiments of the invention, in the photoresist for removing the IGZO layers of channel, MoAlMo in channel is etched After film layer, remaining photoresist removes on glass substrate, and the step of being successively passivated the production of layer, pixel electrode layer it Before, the oxygen uptake characteristic of Ti film can also be utilized, the Ti membrane modifying in channel is become into TiO2Film, to promote thin film transistor (TFT) Performance.
Specifically, as shown in Fig. 2, be film crystal tube preparation method of the present invention another embodiment flow diagram, This method comprises:
S201, grid layer, gate insulating layer and IGZO layer are sequentially formed on the glass substrate.
Specifically, shown in Fig. 4, sequentially forming grid layer 20, gate insulating layer 30 and indium on the glass substrate 10 such as Fig. 3 The step of layer 40 gallium zinc oxide IGZO, may further include: sequentially forming grid layer 20 on the glass substrate 10 and grid is exhausted Edge layer 30;Indium gallium zinc oxide IGZO layer 40 is deposited with sputtering technology, and forms pattern through yellow light process, etching processing procedure.Wherein, Grid layer 20 can be AlMo composite film, and insulating layer refers to GI layers, and GI layers, by the technique in a LTPS, are GI Deposition i.e. GI layers of deposition formation.In addition, yellow light process and etching processing procedure are customary technical means in the art, this Place's detailed process be not described in detail.
S202, the depositing Ti film on IGZO layers, redeposited source-drain electrode layer.
Wherein, source-drain electrode layer is MoAlMo composite film.As shown in figure 5, the depositing Ti film on IGZO layers, redeposited Source-drain electrode layer includes: to sink Ti film 50 with sputtering technology, redeposited source-drain electrode layer 60.Further, sedimentary origin drain electrode layer 60 include being sequentially depositing source electrode layer 61 and drain electrode layer 62.On IGZO layer 40 depositing Ti film 50 with a thickness ofIn some embodiment of the invention, in order to avoid while waste of material have good etch stopper make With 50 thickness of depositing Ti film is preferably on IGZO layer 40
S203, the different photoetching agent pattern of forming region thickness on source-drain electrode layer, and etch the source-drain electrode The periphery of layer.
Wherein, as shown in fig. 6, on the source-drain electrode layer the different photoetching agent pattern of forming region thickness step Suddenly, it can further include: through yellow light process half-tone light shield, different 70 pattern of photoresist of forming region thickness.Into One step, the photoresist 70 of 40 channel of IGZO layer is thinner than the photoresist at both ends.
In addition, further, the step of the periphery of the etching source-drain electrode layer, comprising: with containing F etching liquid or PAN acid carries out dry etching, to etch the source-drain electrode layer 60 of periphery.As shown in fig. 7, the source-drain electrode above gate insulating layer 60 both sides periphery of layer are etched away.
S204, the photoresist for removing IGZO layers of channel etch MoAlMo film layer in channel, and guarantee that Ti film is not etched.
In the embodiment of the present invention, as shown in figure 8, this removes the photoresist 70 of 40 channel of IGZO layer, etch in channel MoAlMo film layer, and guarantee that the step of Ti film 50 is not etched may further include: carry out O2Ashing processing is removed described The photoresist 70 of 40 channel of IGZO layer;With the MoAlMo film layer in 40 channel of PAN acid etch IGZO layer without F.Due to being free of F PAN acid can only etch MoAlMo film layer, Ti cannot be etched, therefore 50 layers of the Ti film above channel is retained.
S205, the processing of O ion implanting is carried out to the Ti film in IGZO layers of channel, in a large amount of O ion implanting to Ti film layer Face.
S206, by glass substrate in O2It is made annealing treatment under environment, so that Ti and O ions binding forms insulation TiO2It is thin Film.
Specifically by glass substrate in O2It is made annealing treatment under environment, 200~400 DEG C of annealing temperature, time 30min~ 120min;The defects of such Ti and O ions binding, and repaired film layer, form Ti membrane modifying in IGZO layers of channel absolutely Edge TiO2Film improves film transistor device performance.Specifically as shown in figure 9, Ti film 50 is modified shape in 40 channel of IGZO layer At insulation TiO2Film 80, and the Ti film 50 on IGZO layers of both sides still retains.
S207, photoresist remaining on glass substrate is removed, and is successively passivated the production of layer, pixel electrode layer.
As shown in Figure 10,11, after completing the procedure, photoresist 70 remaining on glass substrate 10 is removed, and according to The secondary production for being passivated layer 90, pixel electrode layer 100.
Likewise, each type of film such as passivation layer, pixel electrode layer and thickness are without limitation in the embodiment of the present invention.This Outside, photoresist remaining on glass substrate is removed, and the step of being successively passivated the production of layer, pixel electrode layer can join Implementation in the prior art is examined, is not described in detail herein.
A kind of thin film transistor (TFT) is also provided in the embodiment of the present invention, as shown in figure 11, the thin film transistor (TFT) includes:
Glass substrate 10;
Grid layer 20 is prepared in 10 surface of glass substrate;
Gate insulating layer 30 is prepared in 10 surface of glass substrate, and covers the grid layer 20;
IGZO layer 40 is prepared in 30 surface of gate insulating layer;
Ti film 50 is prepared in 30 surface of gate insulating layer, is located at 40 two sides of IGZO layer;
Source-drain electrode layer 60 is prepared in 50 surface of Ti film, including source electrode layer 61 and drain electrode layer 62, the source electricity Channel region is formed between pole layer 61 and the drain electrode layer 62;
Passivation layer 90 surrounds the source-drain electrode layer 60;
Pixel electrode layer 100 is prepared in 60 surface of drain electrode layer.
Further, the thin film transistor (TFT) further include:
TiO2Film layer 80 is prepared in 40 surface of IGZO layer, is covered by the passivation layer 90.
It is provided for the embodiments of the invention a kind of film crystal tube preparation method above and thin film transistor (TFT) has carried out in detail Thin to introduce, used herein a specific example illustrates the principle and implementation of the invention, and above embodiments are said It is bright to be merely used to help understand method and its core concept of the invention;Meanwhile for those skilled in the art, according to this hair Bright thought, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not manage Solution is limitation of the present invention.

Claims (10)

1. a kind of film crystal tube preparation method, which is characterized in that the described method includes:
Grid layer, gate insulating layer and IGZO layers of indium gallium zinc oxide are sequentially formed on the glass substrate;
The depositing Ti film on IGZO layers described, redeposited source-drain electrode layer, the source-drain electrode layer are MoAlMo composite film;
The different photoetching agent pattern of forming region thickness on the source-drain electrode layer, and etch the outer of the source-drain electrode layer It encloses;
Remove the photoresist of the IGZO layers of channel, etches MoAlMo film layer in channel, and guarantee that Ti film is not etched;
Photoresist remaining on the glass substrate is removed, and is successively passivated the production of layer, pixel electrode layer.
2. film crystal tube preparation method according to claim 1, which is characterized in that removing the IGZO layers of channel Photoresist etches in channel after MoAlMo film layer, photoresist remaining on glass substrate is removed, and is successively passivated Layer, pixel electrode layer production the step of before, the method also includes:
The processing of O ion implanting, a large amount of O ion implanting to Ti film layer the inside are carried out to the Ti film in the IGZO layers of channel;
By glass substrate in O2It is made annealing treatment under environment, so that Ti and O ions binding forms insulation TiO2Film.
3. film crystal tube preparation method according to claim 1, which is characterized in that the successively shape on the glass substrate The step of at grid layer, gate insulating layer and IGZO layers of indium gallium zinc oxide, comprising:
Grid layer and gate insulating layer are sequentially formed on the glass substrate;
Indium gallium zinc oxide IGZO layers is deposited with sputtering technology, and forms pattern through yellow light process, etching processing procedure.
4. the film crystal tube preparation method according to requiring 1, which is characterized in that the shape on the source-drain electrode layer The step of at area thickness different photoetching agent pattern, comprising:
Through yellow light process half-tone light shield, the different photoetching agent pattern of forming region thickness.
5. film crystal tube preparation method according to claim 4, which is characterized in that wherein, the IGZO layers of channel Photoresist is thinner than the photoresist at both ends.
6. film crystal tube preparation method according to claim 1, which is characterized in that the etching source-drain electrode layer Periphery step, comprising:
With containing F etching liquid or PAN acid carry out dry etching, with etch periphery source-drain electrode layer.
7. film crystal tube preparation method according to claim 1, which is characterized in that described to remove the IGZO layers of channel Photoresist, etch MoAlMo film layer in channel, and guarantee the step of Ti film is not etched, comprising:
Carry out O2Ashing processing, removes the photoresist of the IGZO layers of channel;
MoAlMo film layer in the IGZO layers of channel described in the PAN acid etch without F.
8. film crystal tube preparation method according to claim 1, which is characterized in that wherein, the grid layer is AlMo Composite film.
9. the preparation method of thin film transistor (TFT) according to claim 1, which is characterized in that the Ti film with a thickness of
10. a kind of thin film transistor (TFT), which is characterized in that the thin film transistor (TFT) includes:
Glass substrate;
Grid layer is prepared in the glass baseplate surface;
Gate insulating layer is prepared in the glass baseplate surface, and covers the grid layer;
IGZO layers, it is prepared in the gate insulator layer surface;
Ti film is prepared in the gate insulator layer surface, is located at the two sides IGZO layers of;
Source-drain electrode layer is prepared in the Ti film surface, including source electrode layer and drain electrode layer, the source electrode layer and the leakage Channel region is formed between electrode layer;
Passivation layer surrounds the source-drain electrode layer;
Pixel electrode layer is prepared in drain electrode layer surface.
CN201811271819.6A 2018-10-29 2018-10-29 A kind of film crystal tube preparation method and thin film transistor (TFT) Pending CN109638077A (en)

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PCT/CN2018/120413 WO2020087669A1 (en) 2018-10-29 2018-12-11 Method for preparing thin-film transistor and thin-film transistor

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070231974A1 (en) * 2006-03-30 2007-10-04 Hsien-Kun Chiu Thin film transistor having copper line and fabricating method thereof
CN101908537A (en) * 2009-06-03 2010-12-08 乐金显示有限公司 Array substrate for display device and manufacturing method thereof
CN103250255A (en) * 2010-12-01 2013-08-14 夏普株式会社 Semiconductor device, TFT substrate, and method for manufacturing semiconductor device and TFT substrate
CN105324835A (en) * 2013-06-28 2016-02-10 株式会社神户制钢所 Thin film transistor and manufacturing method thereof
CN108550625A (en) * 2018-04-18 2018-09-18 深圳市华星光电技术有限公司 A kind of thin film transistor and its manufacturing method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107658345B (en) * 2017-09-22 2020-12-01 京东方科技集团股份有限公司 Oxide thin film transistor and preparation method thereof, array substrate and display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070231974A1 (en) * 2006-03-30 2007-10-04 Hsien-Kun Chiu Thin film transistor having copper line and fabricating method thereof
CN101908537A (en) * 2009-06-03 2010-12-08 乐金显示有限公司 Array substrate for display device and manufacturing method thereof
CN103250255A (en) * 2010-12-01 2013-08-14 夏普株式会社 Semiconductor device, TFT substrate, and method for manufacturing semiconductor device and TFT substrate
CN105324835A (en) * 2013-06-28 2016-02-10 株式会社神户制钢所 Thin film transistor and manufacturing method thereof
CN108550625A (en) * 2018-04-18 2018-09-18 深圳市华星光电技术有限公司 A kind of thin film transistor and its manufacturing method

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Application publication date: 20190416