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CN109713078A - A kind of pair of micro nano structure cleans and repairs damage method - Google Patents

A kind of pair of micro nano structure cleans and repairs damage method Download PDF

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Publication number
CN109713078A
CN109713078A CN201711016057.0A CN201711016057A CN109713078A CN 109713078 A CN109713078 A CN 109713078A CN 201711016057 A CN201711016057 A CN 201711016057A CN 109713078 A CN109713078 A CN 109713078A
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CN
China
Prior art keywords
nano structure
micro nano
mixed solution
pair
cleans
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CN201711016057.0A
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Chinese (zh)
Inventor
赵晨
陶智华
郑飞
张忠卫
阮忠立
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SHANGHAI SHENZHOU NEW ENERGY DEVELOPMENT Co Ltd
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SHANGHAI SHENZHOU NEW ENERGY DEVELOPMENT Co Ltd
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Priority to CN201711016057.0A priority Critical patent/CN109713078A/en
Publication of CN109713078A publication Critical patent/CN109713078A/en
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

It is cleaned the present invention relates to a kind of pair of micro nano structure and repairs damage method, silicon wafer to be treated is immersed in mixed solution, the temperature for controlling mixed solution is 15-30 DEG C, impregnate 1-10min, completion cleans the micro nano structure of silicon wafer and repairs flannelette damage, and mixed solution contains the hydrogen peroxide of the potassium hydroxide of volume ratio 1-10%, the ammonium hydroxide of 0.1-3%, 0.1-2%.Compared with prior art, the present invention can carry out porous silicon to the micro nano structure that metal assistant chemical corrodes and damage removes, row metal ion remaval of going forward side by side.

Description

A kind of pair of micro nano structure cleans and repairs damage method
Technical field
The present invention relates to the black silicon making herbs into wool batteries of polycrystalline, clean more particularly, to a kind of pair of micro nano structure and repair damage Method enables polycrystalline silicon material to match the demand of efficient solar battery.
Background technique
P-type polysilicon battery is since mature production technology, manufacturing cost are low, current and at quite long one section from now on It is interior still to occupy most market shares.P-type crystal silicon solar battery is bigger to continue to keep competitiveness, acquisition Development and application, it is necessary to further increase transfer efficiency, while reduce production cost.
Currently, in the production technology of p-type polysilicon solar cell, the suede structure how to have been obtained in front surface, with Promoting anti-reflective effect is to prepare high-efficiency polycrystalline silion cell top priority, and common process includes mechanical carving groove method, laser Etching method, reactive ion etching method (RIE), chemical corrosion method (i.e. metal Aided Wet corrodes) etc..Wherein, mechanical carving groove side The available lower surface reflectivity of method, but this method causes the mechanical damage of silicon chip surface than more serious, and its at Product rate is relatively low, so in the industrial production using less.It is that different cuttings is made of laser for laser ablation method The surface of style, striated and inverted pyramid shape all is produced out, reflectivity can down to 8.3%, but by The efficiency of its battery obtained is all relatively low, not can be effectively used to production.RIE method can use different templates come into Row etching, etching are usually dry etching, can form so-called black silicon structure in silicon chip surface, reflectivity can be low To 4%, but due to equipment valuableness, production cost is higher, therefore in the industrial production using less.And chemical corrosion method has There is the features such as simple process, cheap price and excellent quality and prior art are compatible with well, becomes most commonly used method in existing industry.
Therefore, black silicon technology is the effective way that polysilicon realizes 19% battery efficiency, and technology path is to pass through optimization Etchant solution the micro-nano surface state for being easy to be passivated, but chemical corrosion process are realized in the black silicon wool-weaving machine of industrialization In need to solve the problems, such as the following aspects:
1) how silicon chip surface micro nano structure effectively to be cleaned and be gone to damage after metal auxiliary corrosion, and right Metal is removed;
2) how to guarantee the reaction stability of damage process, to guarantee the uniformity of subsequent reaming.
Currently, being prepared using wet process metal catalytic chemical etching method black in the black silicon material manufacturing technology having disclosed The patent of silicon, such as CN 102051618 A, CN 102768951 A be all that a nanometer suede is realized by one-step method (acid or alkali) Face reaming controls surface state, and reaction speed is fast, and reaction process is not easy to control.And application No. is 104393114 A of CN then It is nanometer suede to be prepared on the basis of micron flannelette, then carry out surface modification etching.It there may be micro nano structure unevenness It is even, reduce the passivation effect of subsequent technique.The prior art is general to use after metal catalytic corrodes and to form nano aperture simultaneously KOH solution first removes porous silicon, is carrying out metal removal using acid solution, and KOH reaction easily leads to corrosion excessively in the method, So that polishing phenomenon occurs in silicon chip surface, effective surface light trapping structure can not be formed;And it uses acid solution to carry out metal and goes Except when, will form metal salt precipitate, which easily remains in silicon chip surface, to subsequent reaming uniformity generate adverse effect.
Summary of the invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art and provide a kind of black silicon of promotion polycrystalline Battery efficiency cleans micro nano structure and repairs damage method.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of pair of micro nano structure cleans and repairs damage method, and silicon wafer to be treated is immersed in mixed solution, control The temperature of mixed solution processed is 15-30 DEG C, impregnates 1-10min, and completion cleans the micro nano structure of silicon wafer and repairs flannelette damage Wound,
It is the potassium hydroxide of 1-10%, the ammonium hydroxide of 0.5-5%, 0.1-2% that the mixed solution, which contains percent by volume, Hydrogen peroxide.Wherein, it can be reacted, be reached with the surface damage of the porous silicon of open structure and silicon wafer using potassium hydroxide The effect that porous silicon-base repairs surface losses is removed, reaction equation is as follows:
Si+2KOH→K2SiO3+2H2
Ammonium hydroxide can form complex compound with metal ion remaining on silicon wafer, thus realize the purpose of removal metal ion, The effect of hydrogen peroxide is metal oxide particle, forms metal ion and is reacted with ammonium hydroxide, reaction equation is as follows:
2Ag+H2O2+4NH3·H2O→2[Ag(NH3)2]OH+4H2O
Hydrogen peroxide can aoxidize substrate material surface simultaneously, to control the reaction speed of potassium hydroxide and base material, prevent Only polish the generation of phenomenon.
Ammonium hydroxide described in the preferred 3-8% of concentration of the potassium hydroxide in mixed solution is dense in mixed solution Spend preferred 0.5-2.5%.The preferred 0.8-1.5% of concentration of the hydrogen peroxide in mixed solution.If concentration of potassium hydroxide mistake It is low, it cannot achieve porous silicon surface damaging layer repair function, concentration of potassium hydroxide is excessively high, and to will lead to it acute with reacting for silicon wafer It is strong, cause the polishing phenomenon of silicon chip surface;If ammonium hydroxide or hydrogen peroxide concentration are too low, the complexing that cannot achieve metal ion is gone Remove, wherein hydrogen peroxide concentration it is too low to can also result in silicon chip surface oxidation insufficient so that potassium hydroxide and silicon wafer substrate are reacted Speed runaway causes surface micronano structure to be destroyed;If ammonia concn is excessively high, also result in alkali and silicon wafer reacts mistake Control;Hydrogen peroxide concentration is excessively high, will lead to that silicon chip surface oxide layer is blocked up, prevents reacting for potassium hydroxide and silicon base, Wu Fashi The repair function of existing surface damage layer.
The silicon wafer is also handled by cleaning polishing, nanometer suede preparation before immersing mixed solution.
Compared with prior art, the present invention passes through KOH, NH4OH, H2O2Mixed solution formula, can be achieved at the same time more Hole silicon and damage removal, the function of metal ion removal.Wherein KOH is to remove porous silicon and damage, and hydrogen peroxide is by metal It after grain oxidation, reacts with ammonia water to form the metal complex for being dissolved in water, while hydrogen peroxide can be with to the oxidation of substrate material surface The effectively reaction speed of control KOH, prevents the generation of polishing phenomenon, using the final prepared black silicon electricity of polycrystalline of the invention Pond can at least promote 0.2% efficiency.
Specific embodiment
The present invention is described in detail combined with specific embodiments below.Following embodiment will be helpful to the skill of this field Art personnel further understand the present invention, but the invention is not limited in any way.It should be pointed out that the common of this field For technical staff, without departing from the inventive concept of the premise, various modifications and improvements can be made.These are belonged to Protection scope of the present invention.
Embodiment 1
This process program is applied in the black silicon solar cell preparation of polycrystalline, using following steps:
Step 1: former silicon wafer cleaning polishing in NaOH/NaClO mixed ammonium/alkali solutions, to remove surface damage layer, cutting line Trace etc.;
Step 2: the silicon wafer after polishing is carried out to silver-colored falling decoration in a solution of hydrofluoric acid;
Step 3: above-mentioned silicon wafer is put into HF/H2O2Nanometer suede preparation is carried out in mixed solution;
Step 4: above-mentioned silicon wafer being put into the solution being made of potassium hydroxide, ammonium hydroxide, hydrogen peroxide and carries out anionic metal Removal, porous silicon removal and damage removal, the concentration of potassium hydroxide is 5%, the concentration of ammonium hydroxide be 0.5%, hydrogen peroxide it is dense Degree is 1%, and in dipping, the temperature of control mixed solution is 20 DEG C, impregnates 5min, completes to clean the micro nano structure of silicon wafer And flannelette damage is repaired,
Step 5: above-mentioned silicon wafer being carried out to reaming in mixed acid solution and cuts down nano-void height;
Step 6: above-mentioned silicon wafer being cleaned in nitration mixture, and is dried.Then carry out PN junction thermal diffusion.
Step 7: using wet-method etching equipment removal surface phosphorosilicate glass (PSG) and realizing polished backside;
Step 8: the SiN of front deposition thickness about 80nm in tubular type or board-like PECVD devicex,
Step 9: silk-screen printing is sintered Al-BSF, back electrode and positive electrode, tests battery efficiency, the data tested As shown in table 1.
1 battery testing data list of table
Table 2 gives the black silion cell efficiency of routine for not using cleaning process of the present invention:
Tables 1 and 2 data are compared, the gain of efficiency 0.2% is realized using the black silion cell of polycrystalline of the invention.
Embodiment 2
A kind of pair of micro nano structure cleans and repairs damage method, and silicon wafer to be treated is immersed in mixed solution, control The temperature of mixed solution processed is 15 DEG C, impregnates 10min, and completion cleans the micro nano structure of silicon wafer and repairs flannelette damage, leaching It needs to require solution left standstill when stain.It is 1% potassium hydroxide, 0.5% ammonia that the mixed solution used, which contains percent by volume, Water, 0.1% hydrogen peroxide.It wherein, can be anti-with the porous silicon of open structure and the surface damage of silicon wafer using potassium hydroxide It answers, achievees the effect that removing porous silicon-base repairs surface losses, reaction equation is as follows:
Si+2KOH→K2SiO3+2H2
Ammonium hydroxide can form complex compound with metal ion remaining on silicon wafer, thus realize the purpose of removal metal ion, The effect of hydrogen peroxide is metal oxide particle, forms metal ion and is reacted with ammonium hydroxide, reaction equation is as follows:
2Ag+H2O2+4NH3·H2O→2[Ag(NH3)2]OH+4H2O
Hydrogen peroxide can aoxidize substrate material surface simultaneously, to control the reaction speed of potassium hydroxide and base material, prevent Only polish the generation of phenomenon.
Embodiment 3
A kind of pair of micro nano structure cleans and repairs damage method, and silicon wafer to be treated is immersed in mixed solution, control The temperature of mixed solution processed is 20 DEG C, impregnates 7min, and completion cleans the micro nano structure of silicon wafer and repairs flannelette damage.Silicon Piece requires solution left standstill when impregnating, mixed solution contain volume percent content be 3% potassium hydroxide, 0.5% ammonium hydroxide, 0.8% hydrogen peroxide.
Embodiment 4
A kind of pair of micro nano structure cleans and repairs damage method, and silicon wafer to be treated is immersed in mixed solution, control The temperature of mixed solution processed is 25 DEG C, impregnates 2min, and completion cleans the micro nano structure of silicon wafer and repairs flannelette damage.Silicon Piece requires solution left standstill when impregnating, mixed solution contain volume percent content be 8% potassium hydroxide, 2.5% ammonium hydroxide, 1.5% hydrogen peroxide.
Embodiment 5
A kind of pair of micro nano structure cleans and repairs damage method, and silicon wafer to be treated is immersed in mixed solution, control The temperature of mixed solution processed is 30 DEG C, impregnates 1min, and completion cleans the micro nano structure of silicon wafer and repairs flannelette damage.Silicon Piece requires solution left standstill when impregnating, mixed solution contain volume percent content be 10% potassium hydroxide, 3% ammonium hydroxide, 2% hydrogen peroxide.
The technology of most critical of the present invention, and need strict control be exactly potassium hydroxide, ammonium hydroxide, hydrogen peroxide concentration Range.This is because cannot achieve porous silicon surface damaging layer repair function, potassium hydroxide if concentration of potassium hydroxide is too low Excessive concentration will lead to that it is violent with reacting for silicon wafer, cause the polishing phenomenon of silicon chip surface;If ammonium hydroxide or hydrogen peroxide concentration mistake It is low, then cannot achieve metal ion complexing removal, wherein hydrogen peroxide concentration it is too low can also result in silicon chip surface oxidation do not fill Point, so that potassium hydroxide and the reaction speed of silicon wafer substrate are out of control, surface micronano structure is caused to be destroyed;If ammonia concn It is excessively high, also result in the runaway reaction of alkali and silicon wafer;Hydrogen peroxide concentration is excessively high, and it is blocked up to will lead to silicon chip surface oxide layer, resistance Only potassium hydroxide and silicon base are reacted, and cannot achieve the repair function of surface damage layer.
Specific embodiments of the present invention are described above.It is to be appreciated that the invention is not limited to above-mentioned Particular implementation, those skilled in the art can make various deformations or amendments within the scope of the claims, this not shadow Ring substantive content of the invention.

Claims (8)

1. a kind of pair of micro nano structure cleans and repairs damage method, which is characterized in that this method soaks silicon wafer to be treated Enter in mixed solution, the temperature for controlling mixed solution is 15-30 DEG C, impregnates 1-10min, completes clear to the micro nano structure of silicon wafer Flannelette damage is washed and repairs,
It is the potassium hydroxide of 1-10%, the ammonium hydroxide of 0.1-3%, 0.1-2% that the mixed solution, which contains volume percent content, Hydrogen peroxide.
2. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described The preferred 3-8% of concentration of the potassium hydroxide in mixed solution.
3. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described The preferred 0.5-2.5% of concentration of the ammonium hydroxide in mixed solution.
4. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described The preferred 0.8-1.5% of concentration of the hydrogen peroxide in mixed solution.
5. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described mixed Close preferred 20-25 DEG C of solution temperature.
6. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described The preferred 2-7min of silicon wafer dip time.
7. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that silicon wafer leaching Solution left standstill is required when stain.
8. a kind of pair of micro nano structure according to claim 1 cleans and repairs damage method, which is characterized in that described Silicon wafer is also handled by cleaning polishing, nanometer suede preparation before immersing mixed solution.
CN201711016057.0A 2017-10-26 2017-10-26 A kind of pair of micro nano structure cleans and repairs damage method Pending CN109713078A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111128684A (en) * 2019-12-30 2020-05-08 南京纳鑫新材料有限公司 Polycrystalline wet black silicon cleaning process

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276997B1 (en) * 1998-12-23 2001-08-21 Shinhwa Li Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers
CN105870263A (en) * 2016-06-27 2016-08-17 苏州阿特斯阳光电力科技有限公司 Preparation method of textured structure of crystalline silicon solar cell
CN106340550A (en) * 2016-10-25 2017-01-18 苏州阿特斯阳光电力科技有限公司 Preparation method for texture structure of crystalline silicon solar cell
CN106549083A (en) * 2016-06-27 2017-03-29 苏州阿特斯阳光电力科技有限公司 A kind of preparation method of texture structure of crystalline silicon solar cell
CN106601835A (en) * 2015-10-15 2017-04-26 福建金石能源有限公司 Control method for controlling suede dimension of monocrystalline silicon heterojunction solar battery cell

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276997B1 (en) * 1998-12-23 2001-08-21 Shinhwa Li Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers
CN106601835A (en) * 2015-10-15 2017-04-26 福建金石能源有限公司 Control method for controlling suede dimension of monocrystalline silicon heterojunction solar battery cell
CN105870263A (en) * 2016-06-27 2016-08-17 苏州阿特斯阳光电力科技有限公司 Preparation method of textured structure of crystalline silicon solar cell
CN106549083A (en) * 2016-06-27 2017-03-29 苏州阿特斯阳光电力科技有限公司 A kind of preparation method of texture structure of crystalline silicon solar cell
CN106340550A (en) * 2016-10-25 2017-01-18 苏州阿特斯阳光电力科技有限公司 Preparation method for texture structure of crystalline silicon solar cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111128684A (en) * 2019-12-30 2020-05-08 南京纳鑫新材料有限公司 Polycrystalline wet black silicon cleaning process

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