CN100353394C - Pixel circuit of display - Google Patents
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- CN100353394C CN100353394C CNB2005100894429A CN200510089442A CN100353394C CN 100353394 C CN100353394 C CN 100353394C CN B2005100894429 A CNB2005100894429 A CN B2005100894429A CN 200510089442 A CN200510089442 A CN 200510089442A CN 100353394 C CN100353394 C CN 100353394C
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Abstract
Description
技术领域technical field
本发明涉及一种不对称轻掺杂漏极的薄膜晶体管结构,特别是有关于一种液晶显示器像素电路中的薄膜晶体管结构。The invention relates to an asymmetric lightly doped drain thin film transistor structure, in particular to a thin film transistor structure in a liquid crystal display pixel circuit.
背景技术Background technique
随着半导体制程的提升,薄膜晶体管(Thin Film Transistor,TFT)组件越做越小,薄膜晶体管源极和漏极之间的信道长度随之缩短。当薄膜晶体管的信道长度缩短后,除了会造成阈值电压(Threshold Voltage,Vt)的下降,而有漏电流的发生,尚有热电子效应(Hot Electron Effects)的现象而影响晶体管的操作。为了解决这个问题,现有技术发展出轻掺杂漏极(Lightly Doped Drain,LDD)结构,用来降低漏极接面处的电场,以减轻热电子效应所带来的影响。With the improvement of semiconductor manufacturing process, thin film transistor (Thin Film Transistor, TFT) components are getting smaller and smaller, and the channel length between the source and drain of the thin film transistor is shortened accordingly. When the channel length of the thin film transistor is shortened, in addition to the decrease of the threshold voltage (Threshold Voltage, Vt), leakage current occurs, and the phenomenon of hot electron effects (Hot Electron Effects) affects the operation of the transistor. In order to solve this problem, a lightly doped drain (LDD) structure has been developed in the prior art, which is used to reduce the electric field at the drain junction to alleviate the impact of the hot electron effect.
有机发光显示器(OLED)在其像素电路以及周边驱动电路等两大功能电路设计中运用了大量的薄膜晶体管。由于像素电路以及周边驱动电路的功能以及操作情况并不相同,因此其各自的薄膜晶体管特性需求亦不尽相同。在像素电路方面,由于薄膜晶体管主要是用来作为像素的开关组件,提供适当的电流来控制有机发光二极管的灰阶表现,因此其特别需要降低漏电流(Leakage-Current),以维持有机发光二极管正常的表现。An organic light emitting display (OLED) uses a large number of thin film transistors in the design of two major functional circuits, such as its pixel circuit and peripheral driving circuit. Since the functions and operation conditions of the pixel circuit and the peripheral driving circuit are different, their respective thin film transistor characteristic requirements are also different. In terms of pixel circuits, thin-film transistors are mainly used as switching components of pixels to provide appropriate current to control the grayscale performance of organic light-emitting diodes, so it is particularly necessary to reduce the leakage current (Leakage-Current) to maintain organic light-emitting diodes. normal performance.
请参考图1。图1为现有对称轻掺杂漏极晶体管结构的剖面示意图。对称轻掺杂漏极晶体管10包含一基板12,一半导体层14设于基板12表面,一栅极绝缘层16设于半导体层14表面,以及一栅极18设于栅极绝缘层16上表面。半导体层14包含有二轻掺杂漏极140、142以及二源极/漏极144、146,对称设于栅极18的两侧,而轻掺杂漏极140与142之间则定义为一信道区148。轻掺杂漏极140与142利用N型掺质形成的轻掺杂区,用来降低对称轻掺杂漏极晶体管10的漏电流,并且避免漏极附近的电场过高所导致的热电子效应。Please refer to Figure 1. FIG. 1 is a schematic cross-sectional view of a conventional symmetrical lightly doped drain transistor structure. The symmetrical lightly doped
然而受到掺杂浓度较低的影响,轻掺杂漏极140与142的电阻亦相对的高于两侧的源极/漏极144与146,因此容易造成漏极与源极144、146间的串联电阻增加,进而产生电子飘移率以及整个组件操作速度降低等问题。在这种情况下,欲改善薄膜晶体管的漏电流现象,便无可避免地必须牺牲组件的操作速度,因此如何在电子飘移率以及漏电流两种组件特性中取舍,便成为设计轻掺杂漏极结构时的一项重要考虑。However, affected by the low doping concentration, the resistance of the lightly doped
请参考图2,图2为现有显示器中一像素电路示意图。一种像素电路,用于电流驱动主动式发光显示器的驱动电路,至少包括一双栅极对称轻掺杂漏极薄膜晶体管N1,其源极连接至一数据线D1,其栅极连接至一扫描线S1;一驱动晶体管P1,其栅极连接至双栅极对称轻掺杂漏极薄膜晶体管N1的漏极;一电容C1,其一端连接至双栅极对称轻掺杂漏极薄膜晶体管N1的源极与驱动晶体管P1的栅极;及一发光二极管L1,其阳极连接至驱动晶体管P1的漏极。Please refer to FIG. 2 , which is a schematic diagram of a pixel circuit in a conventional display. A pixel circuit for current-driven active light-emitting display drive circuit, at least including a double-gate symmetric lightly doped drain thin film transistor N1, the source of which is connected to a data line D1, and the gate of which is connected to a scan line S1; a drive transistor P1, the gate of which is connected to the drain of the double-gate symmetrical lightly doped drain thin film transistor N1; a capacitor C1, one end of which is connected to the source of the double-gate symmetrical lightly doped drain thin film transistor N1 and a light-emitting diode L1, the anode of which is connected to the drain of the driving transistor P1.
当扫描线上S1的扫描讯号开启双栅极对称轻掺杂漏极薄膜晶体管N1,双栅极对称轻掺杂漏极薄膜晶体管N1将使数据线D1上的数据讯号通过,传递至电容C1及驱动晶体管P1的栅极端,控制驱动晶体管P1以驱动发光二极管的灰阶表现。When the scanning signal on the scanning line S1 turns on the double-gate symmetrical light-doped drain thin film transistor N1, the double-gate symmetrical light-doped drain thin film transistor N1 will pass the data signal on the data line D1 and transmit it to the capacitor C1 and The gate terminal of the driving transistor P1 is used to control the driving transistor P1 to drive the grayscale representation of the light emitting diode.
当扫描线上S1无扫描讯号时,双栅极对称轻掺杂漏极薄膜晶体管N1为关闭,此时电容储存电荷使得节点A的电位为高电平,保持驱动晶体管P1为关闭,而节点B的电位为一低电平。由于节点A的电位相对高于节点B的电位,会造成一漏电流由节点A流至节点B。When there is no scanning signal on the scanning line S1, the double-gate symmetrical lightly doped drain thin film transistor N1 is turned off. At this time, the capacitor stores the charge so that the potential of node A is high, keeping the drive transistor P1 off, and node B The potential is a low level. Since the potential of the node A is relatively higher than that of the node B, a leakage current will flow from the node A to the node B.
因此,本发明将针对像素电路的组件作一改良,使其漏电流的发生减少。Therefore, the present invention will improve the components of the pixel circuit to reduce the occurrence of leakage current.
发明内容Contents of the invention
本发明的目的在于改良像素电路的组件,使其漏电流的发生减少。The purpose of the present invention is to improve the components of the pixel circuit to reduce the occurrence of leakage current.
本发明另一目的在于利用轻掺杂漏极的长度不对称,用以减少双栅极轻掺杂漏极薄膜晶体管中源极至漏极间串联阻抗值,避免组件操作速度减低。Another object of the present invention is to utilize the length asymmetry of the lightly doped drain to reduce the series resistance value between the source and the drain in the double-gate lightly doped drain thin film transistor, so as to avoid the reduction of device operation speed.
本发明披露了一种像素电路,用以驱动显示器面板中的多个单位像素,像素电路至少包括:多条扫描线,形成于显示器面板上,用以传送这些单位像素的扫描讯号;多条数据线,形成于显示器面板上,并且与多条扫描线交错,用以传送这些单位像素的数据讯号;及一轻掺杂漏极薄膜晶体管(LDD-TFT),分别连接于单位像素的扫描线、数据线与一驱动晶体管,轻掺杂漏极薄膜晶体管,至少具有长度不同的一第一轻掺杂漏极与一第二轻掺杂漏极,其中最接近驱动晶体管的第一轻掺杂漏极具有最长的长度。The invention discloses a pixel circuit for driving a plurality of unit pixels in a display panel. The pixel circuit at least includes: a plurality of scanning lines formed on the display panel for transmitting scanning signals of these unit pixels; a plurality of data line, formed on the display panel, and interlaced with a plurality of scanning lines, to transmit the data signals of these unit pixels; and a lightly doped drain thin film transistor (LDD-TFT), respectively connected to the scanning lines of the unit pixel, The data line and a driving transistor, the lightly doped drain thin film transistor, at least have a first lightly doped drain and a second lightly doped drain with different lengths, wherein the first lightly doped drain closest to the driving transistor The pole has the longest length.
本发明是利用轻掺杂漏极来降低漏极附近的漏电流,至于邻近源极区域的轻掺杂则可予以去除或减短长度,以有效降低漏极与源极之间的串联电阻,提高电子飘移率以及整个组件的操作速度。The present invention uses the lightly doped drain to reduce the leakage current near the drain, and the lightly doped adjacent to the source region can be removed or shortened to effectively reduce the series resistance between the drain and the source. Improves the electron transfer rate and the operating speed of the entire assembly.
附图说明Description of drawings
图1为现有对称轻掺杂漏极晶体管结构的剖面示意图;1 is a schematic cross-sectional view of an existing symmetrical lightly doped drain transistor structure;
图2为现有显示器中一像素电路示意图;2 is a schematic diagram of a pixel circuit in an existing display;
图3A为本发明一较佳实施例一像素电路示意图;3A is a schematic diagram of a pixel circuit in a preferred embodiment of the present invention;
图3B为具有不对称轻掺杂漏极的双栅极薄膜晶体管构造图。FIG. 3B is a structural diagram of a double-gate thin film transistor with an asymmetric lightly doped drain.
附图符号说明Description of reference symbols
10对称轻掺杂漏极晶体管 240第一轻掺杂漏极10 symmetrical lightly doped
242第二轻掺杂漏极 244第三轻掺杂漏极242 second lightly doped
246第四轻掺杂漏极 247第一信道246 The fourth lightly doped
249第二信道 281第一栅极249
282第二栅极282 second grid
12、22基板 14、24半导体层12, 22
16、26栅极绝缘层 18、28栅极16, 26
140、142轻掺杂漏极140, 142 lightly doped drain
144、146、241、243、245漏极/源极144, 146, 241, 243, 245 drain/source
A、B、C节点A, B, C nodes
C1电容 D1数据线C1 capacitor D1 data line
L1发光二极管 P1晶体管L1 Light Emitting Diode P1 Transistor
S1扫描线S1 scan line
N1双栅极对称轻掺杂漏极薄膜晶体管N1 Double Gate Symmetrical Lightly Doped Drain Thin Film Transistor
N2双栅极不对称轻掺杂漏极薄膜晶体管N2 Double Gate Asymmetric Lightly Doped Drain Thin Film Transistor
具体实施方式Detailed ways
请参考图3A,其为本发明一较佳实施例中一像素电路示意图。此像素电路,是用于电流驱动主动式发光显示器的驱动电路,至少包括一双栅极薄膜晶体管N2、一驱动晶体管P1、一电容C1、以及一发光二极管L1。其中,双栅极薄膜晶体管N2的源极连接至一数据线D1,栅极连接至一扫描线S1。驱动晶体管P1的栅极连接至双栅极薄膜晶体管N2的漏极。电容C1连接至双栅极薄膜晶体管N2的源极与驱动晶体管P1的栅极相接处。发光二极管L1,其阳极则连接至驱动晶体管P1的漏极。本实施例和现有技术最主要的区别即在于所使用的双栅极薄膜晶体管N2具有不对称轻掺杂漏极。其驱动原理和现有技术相似,在此不多加赘述。Please refer to FIG. 3A , which is a schematic diagram of a pixel circuit in a preferred embodiment of the present invention. The pixel circuit is a driving circuit for current-driven active light-emitting displays, and at least includes a double-gate thin film transistor N2, a driving transistor P1, a capacitor C1, and a light-emitting diode L1. Wherein, the source of the double-gate TFT N2 is connected to a data line D1, and the gate is connected to a scan line S1. The gate of the driving transistor P1 is connected to the drain of the double-gate thin film transistor N2. The capacitor C1 is connected to the junction between the source of the double-gate TFT N2 and the gate of the driving transistor P1. The anode of the LED L1 is connected to the drain of the driving transistor P1. The main difference between this embodiment and the prior art is that the double-gate thin film transistor N2 used has an asymmetric lightly doped drain. Its driving principle is similar to that of the prior art and will not be repeated here.
请参照图3B,此图为具有不对称轻掺杂漏极的双栅极薄膜晶体管构造图。在本发明的较佳实施例中双栅极薄膜晶体管N2为一N型薄膜晶体管,然而亦可用一P型薄膜晶体管取代。双栅极薄膜晶体管N2包含一基底22,一半导体层24设于基底22表面,一栅极绝缘层26设于半导体层24表面,以及双栅极28设于栅极绝缘层26上表面。Please refer to FIG. 3B , which is a structural diagram of a double-gate TFT with an asymmetric lightly doped drain. In a preferred embodiment of the present invention, the double-gate thin film transistor N2 is an N-type thin film transistor, but it can also be replaced by a P-type thin film transistor. The double-gate TFT N2 includes a
其中,双栅极为第一栅极281与第二栅极282;半导体层24包含有:一源极241接续一第一轻掺杂漏极240、一第二轻掺杂漏极242依序相连一漏极/源极243与一第三轻掺杂漏极244、一第四轻掺杂漏极246连至一漏极245,而第一、第二轻掺杂漏极240、242之间则定义为一第一信道区247,其上方为第一栅极281,第三、第四轻掺杂漏极244、246之间则定义为一第二信道区249,其上方为第二栅极282,第一轻掺杂漏极240为最接近驱动晶体管P1的一侧且其长度最长。Wherein, the double gate is the
在双栅极薄膜晶体管N2的结构中,第一与第二栅极的二侧壁分别堆栈于轻掺杂漏极的上方,也就是说栅极是部分覆盖于轻掺杂漏极上方,然而栅极的二侧壁并不一定均要覆盖于轻掺杂漏极上方,栅极与轻掺杂漏极间的相对位置可视电性设计需求予以调整。In the structure of the double-gate TFT N2, the two sidewalls of the first and second gates are respectively stacked above the lightly doped drain, that is to say, the gate partially covers the lightly doped drain, but The two sidewalls of the gate do not have to cover the lightly doped drain, and the relative position between the gate and the lightly doped drain can be adjusted according to the electrical design requirements.
一般而言,轻掺杂漏极长度的计算方式有两种(以图3B解说),一种是由第一轻掺杂漏极240的两端间距离所定义的长度H1;另一种是由第一栅极靠近第一轻掺杂漏极的一端至轻掺杂漏极另一端的距离所定义的长度H2。本发明可选用任一种轻掺杂漏极长度的计算方式,并不会影响本发明的效果。Generally speaking, there are two ways to calculate the length of the lightly doped drain (illustrated in FIG. 3B ), one is the length H1 defined by the distance between the two ends of the first lightly doped
于本实施例中,将第一、第二、第三与第四轻掺杂漏极240、242、244、246的长度分别设计成3、1、1、1单位长度,利用轻掺杂漏极来降低漏极附近的漏电流,其中又将第一轻掺杂漏极240的长度增长,使其长度较另三个轻掺杂漏极为长,使得从节点A至节点B的漏电流路径的总阻值增加,进而降低漏电流。In this embodiment, the lengths of the first, second, third, and fourth lightly doped
而该三个轻掺杂漏极的长度则可适当的缩短,甚至完全去除轻掺杂漏极结构,使其三个轻掺杂漏极242、244、246的长度分别小于或等于第一轻掺杂漏极240的长度;因为该三个轻掺杂漏极长度对于漏电流问题影响不大,缩短长度可降低漏极与源极之间的串联电阻,提高电子飘移率以及整个组件的操作速度。The lengths of the three lightly doped drains can be appropriately shortened, or even completely removed, so that the lengths of the three lightly doped
因此可得知,相较于现有的对称型薄膜晶体管结构,本发明的薄膜晶体管结构包含有不对称的轻掺杂漏极,因此可以进一步于对漏电流问题较为敏感的漏极一侧,适度地增加轻掺杂漏极的长度,以有效降低漏电流。Therefore, it can be known that, compared with the existing symmetric thin film transistor structure, the thin film transistor structure of the present invention includes an asymmetric lightly doped drain, so it can be further improved on the drain side that is more sensitive to the problem of leakage current. Moderately increase the length of the lightly doped drain to effectively reduce the leakage current.
本发明仅举一较佳实施例,并非用以限制本发明的范围。在本发明中所使用的双栅极不对称轻掺杂薄膜晶体管,其轻掺杂漏极长度的比例亦可因其需要有所改变,例如:1.第一轻掺杂漏极长度大于其它三个轻掺杂漏极长度,且第二、第三与第四轻掺杂漏极的长度不一定相等。2.第一与第三轻掺杂漏极长度相等,第二与第四轻掺杂漏极长度相等,且第一轻掺杂漏极长度大于第二轻掺杂漏极长度。3.第一与第二轻掺杂漏极长度相等,第三与第四轻掺杂漏极的长度相等,且第一轻掺杂漏极长度大于第三轻掺杂漏极长度。The present invention is merely a preferred embodiment, which is not intended to limit the scope of the present invention. In the double-gate asymmetric lightly doped thin film transistor used in the present invention, the ratio of the length of the lightly doped drain can also be changed because of its needs, for example: 1. The length of the first lightly doped drain is longer than that of the other There are three lightly doped drain lengths, and the lengths of the second, third and fourth lightly doped drains are not necessarily equal. 2. The lengths of the first and third lightly doped drains are equal, the lengths of the second and fourth lightly doped drains are equal, and the length of the first lightly doped drain is greater than the length of the second lightly doped drain. 3. The length of the first lightly doped drain is equal to that of the second lightly doped drain, the length of the third lightly doped drain is equal to that of the fourth lightly doped drain, and the length of the first lightly doped drain is greater than that of the third lightly doped drain.
本发明不限定仅能应用双栅极不对称轻掺杂薄膜晶体管,同时还可以用单栅极不对称轻掺杂薄膜晶体管替代;且即使为下栅极式的薄膜晶体管结构,应用于本发明中,亦能取得相同功效。The present invention is not limited to the application of double-gate asymmetric lightly doped thin film transistors, and can also be replaced by single-gate asymmetric lightly doped thin film transistors; , can also achieve the same effect.
一般而言,薄膜晶体管关闭时,漏极与基底之间仍有电压(电场)存在,因此容易产生漏电流。也就是说,薄膜晶体管的漏电流问题主要以漏极附近区域较为敏感,因此本发明是利用轻掺杂漏极来降低漏极附近的漏电流,至于邻近源极区域的轻掺杂则可予以去除,以有效降低漏极与源极之间的串联电阻,提高电子飘移率以及整个组件的操作速度。Generally speaking, when the thin film transistor is turned off, there is still a voltage (electric field) between the drain and the substrate, so leakage current is easily generated. That is to say, the leakage current problem of thin film transistors is mainly sensitive to the region near the drain, so the present invention uses the lightly doped drain to reduce the leakage current near the drain, and the lightly doped region adjacent to the source can be adjusted. Removed to effectively reduce the series resistance between the drain and the source, improve the electron mobility and the operating speed of the entire component.
相较于现有的对称型薄膜晶体管结构,本发明的薄膜晶体管结构包含有不对称的轻掺杂漏极,因此可以进一步于对漏电流问题较为敏感的漏极一侧,适度地增加轻掺杂漏极的长度,以有效降低漏电流。此外,本发明还可以进一步于源极一侧缩短轻掺杂漏极的长度,甚至完全去除源极侧的轻掺杂漏极结构,以有效降低漏极与源极间的串联电阻,提高电子飘移率以及整个组件操作速度。Compared with the existing symmetric thin film transistor structure, the thin film transistor structure of the present invention includes an asymmetric lightly doped drain, so the lightly doped drain can be further moderately increased on the side of the drain that is more sensitive to the leakage current problem. The length of the impurity drain can effectively reduce the leakage current. In addition, the present invention can further shorten the length of the lightly doped drain on the source side, or even completely remove the lightly doped drain structure on the source side, so as to effectively reduce the series resistance between the drain and the source and improve the electron density. Drift rate as well as overall component operating speed.
以上所述仅为本发明的较佳实施例,其并非用以限制本发明的实施范围,本领域的技术人员在不违背本发明的精神所做的修改均应属于本发明的涵盖范围,因此本发明的保护范围以本发明的权利要求为依据。The above description is only a preferred embodiment of the present invention, and it is not intended to limit the implementation scope of the present invention. Those skilled in the art should not violate the spirit of the present invention. The modifications made should fall within the scope of the present invention. Therefore The protection scope of the present invention is based on the claims of the present invention.
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| CN103137054B (en) * | 2011-11-30 | 2015-09-23 | 上海中航光电子有限公司 | Bigrid pixels across inversion driving method |
| CN103366671A (en) * | 2012-04-06 | 2013-10-23 | 联胜(中国)科技有限公司 | Light emitting element display pixel |
| CN105206216A (en) * | 2015-10-23 | 2015-12-30 | 武汉华星光电技术有限公司 | Display device and display device shift register circuit applied to gate drive circuit |
| CN107086227B (en) | 2017-05-11 | 2020-02-21 | 京东方科技集团股份有限公司 | Light emitting circuit, electronic device, thin film transistor and preparation method thereof |
| CN110910825B (en) * | 2019-12-10 | 2021-04-02 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN111445856B (en) * | 2020-05-13 | 2021-04-09 | 京东方科技集团股份有限公司 | Driving circuit, driving method, display panel and display device |
| CN112542516B (en) * | 2020-11-03 | 2024-01-30 | 北海惠科光电技术有限公司 | Active switch, manufacturing method thereof and display panel |
| CN114913823B (en) * | 2021-02-09 | 2024-06-11 | 成都九天画芯科技有限公司 | Pixel circuit based on double-gate transistor and driving method thereof |
| CN113629150A (en) * | 2021-07-27 | 2021-11-09 | 武汉华星光电技术有限公司 | Thin film transistor and display panel |
| CN113937157B (en) * | 2021-10-09 | 2024-04-16 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
| CN114171586B (en) * | 2022-02-10 | 2022-05-24 | 晶芯成(北京)科技有限公司 | A semiconductor device and its manufacturing method |
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