CN100454117C - Pixel structure suitable for wide-viewing angle liquid crystal display and manufacturing method thereof - Google Patents

Abstract

The invention provides a pixel structure suitable for a wide-viewing angle liquid crystal display, which comprises: a pair of gate lines, a pair of data lines, a pixel electrode and a storage capacitor. The two gate lines are arranged on a substrate in parallel, and the two data lines are arranged on the substrate in parallel and are approximately vertically intersected with the two gate lines, so that a pixel area is defined on the substrate. The pixel electrode is arranged above the pixel area, and the storage capacitor is arranged above the pixel area, is approximately parallel to one of the gate lines and is adjacent to or partially overlapped with the gate line. The invention also provides a manufacturing method of the pixel structure suitable for the wide-viewing-angle liquid crystal display.

Description

Pixel structure suitable for wide viewing angle liquid crystal display and manufacturing method thereof

technical field

The invention relates to a display with a wide viewing angle, in particular to a pixel structure suitable for the display with a wide viewing angle, which is used to effectively improve the image quality.

Background technique

A liquid crystal display (LCD) utilizes the action of an external electric field to cause liquid crystal molecules to rotate and change the alignment state of the liquid crystal. Liquid crystal display converts various optical property changes, such as birefringence, optical rotation, dichroism, etc., produced by changes in the alignment of liquid crystal molecules into visual changes to achieve the purpose of displaying image information. Due to the characteristics of thin thickness, light weight, low power consumption, and low operating voltage, liquid crystal displays have been widely used in electronic products such as portable personal computers, digital cameras, and projectors, and occupy an important position in the flat-panel display market. .

The current liquid crystal display is developing toward the trend of high brightness, high contrast, wide viewing angle, large area, and full color. Among them, in order to solve the problem of viewing angle, a multi-domain vertical alignment (MVA) liquid crystal display has been developed, which divides the liquid crystal region for display into multiple domains, so that the liquid crystal molecules can be tilted in multiple directions, Further, the viewing angle of the liquid crystal display is increased. In such a liquid crystal display, in order to precisely control the tilt direction of the liquid crystal molecules, it is usually necessary to control the alignment direction of the liquid crystal with a pre-tilt angle. A common practice is to use a slit or a combination of a protrusion (protrusion) to generate the pretilt angle.

FIG. 4 shows a schematic plan view of a pixel structure of a conventional multi-domain vertical alignment liquid crystal display. The pixel structure includes: a substrate 10 , gate lines 12 a and 12 b , data lines 18 a and 18 b , a storage capacitor 24 , an insulating layer 25 and a pixel electrode 26 . The gate lines 12 a and 12 b perpendicularly cross the data lines 18 a and 18 b and are disposed on a substrate 10 , such as an array substrate, to form a pixel area 20 . A storage capacitor 24 , a pixel electrode 26 and an insulating layer (protective layer) 25 interposed therebetween are sequentially disposed above the pixel region 20 . A typical storage capacitor 24 is located in the middle of the pixel region 20, which includes: a lower electrode 12c, an upper electrode 18c, and a capacitive insulating layer (not shown) between the upper and lower electrodes 18c and 12c. The pixel electrode 26 has a slit 26 a for generating a pre-tilt angle, and it usually crosses over the storage capacitor 24 .

When viewing this type of liquid crystal display, the alignment of the liquid crystals adjacent to the gate lines 12 a and 12 b is poor, which easily causes color shift. In order to eliminate this phenomenon, usually a black matrix (not shown) is used to cover the gate lines 12 a and 12 b. However, this will affect the aperture ratio, which is not conducive to the improvement of the aperture ratio.

Contents of the invention

In view of this, the object of the present invention is to provide a pixel structure suitable for a wide viewing angle liquid crystal display and its manufacturing method, which can effectively improve the color shift (wash out) phenomenon by changing the configuration of the storage capacitor, and at the same time maintain or Even increase the aperture ratio.

According to the above purpose, the present invention provides a pixel structure suitable for a wide viewing angle liquid crystal display, which includes: a pair of gate lines, a pair of data lines, a pixel electrode and a storage capacitor. The pair of gate lines are arranged in parallel on a substrate, and the pair of data lines are arranged in parallel on the substrate and generally perpendicularly intersect with the pair of gate lines to define a pixel area on the substrate. The pixel electrode is disposed above the pixel region, and the storage capacitor is disposed above the pixel region, which is substantially parallel to one of the gate lines and adjacent to or partially overlapped with the gate line. The second storage capacitor is arranged above the middle part of the pixel area, which is substantially parallel to the first and second gate lines, and the first storage capacitor is located between the second storage capacitor and the first gate line .

Also according to the above purpose, the present invention provides a method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display. A first conductive layer is formed on a substrate, and the first conductive layer is defined to form a pair of gate lines substantially parallel to each other on the substrate. A first insulating layer is formed on the substrate and covers the pair of gate lines. Form a second conductive layer on the first insulating layer and define the second conductive layer to form a pair of data lines and a lower electrode of a storage capacitor on the first insulating layer, wherein the pair of data lines are substantially parallel to each other and substantially A pixel area is formed by vertically intersecting the pair of gate lines, and the lower electrode of the storage capacitor is substantially parallel to one of the gate lines and adjacent to or partially overlapped with the gate line. A second insulating layer is formed on the first insulating layer and covers the first and second data lines and the lower electrode of the storage capacitor. A pixel electrode is formed on the second insulating layer above the pixel area, and part of it extends above the lower electrode of the storage capacitor, and is used as an upper electrode of the storage capacitor.

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

Description of drawings

FIGS. 1A to 1G show schematic plan views of a method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display according to an embodiment of the present invention.

FIG. 1G-1 shows a schematic plan view of a pixel structure suitable for a wide viewing angle liquid crystal display according to another embodiment of the present invention.

Figures 2A to 2G show respectively along lines 2A-2A', 2B-2B', 2C-2C', 2D-2D', 2E-2E', 2F-2F', 2G-2G' in Figures 1A to 1G Sectional schematic.

Figures 3A to 3C show schematic cross-sectional views along lines 3A-3A', 3B-3B', and 3C-3C' in Figures 1E to 1G, respectively.

FIG. 4 shows a schematic plan view of a pixel structure of a conventional wide viewing angle liquid crystal display.

Symbol Description:

known

10～substrate; 12a, 12b～gate line; 12c～bottom electrode; 18a, 18b～data line; 18c～upper electrode; 20～pixel area; 24～storage capacitor; 25～insulating layer; 26～pixel electrode; 26a ~Slit.

this invention

100～substrate; 102～first conductive layer; 102a, 102b～gate line; 102c～common line; 102d～lateral extension; 103～gate electrode; 104～first insulating layer; 106～amorphous silicon layer ; 108～second conductive layer; 108a, 108b～data line; 108c, 108d, 108e～conductive pattern layer; 110～pixel area; 111a～source electrode; 111b～drain electrode; 112～second insulating layer; 112a , 112b, 112c, 112d, 112e, 112f~contact holes; 114, 118, 120, 122~storage capacitors; 116~pixel electrodes; 116a~slits; 117a, 117b~transparent conductive parts.

Detailed ways

FIG. 1G shows a schematic plan view of a pixel structure suitable for a wide viewing angle liquid crystal display according to an embodiment of the present invention. Here, the wide viewing angle liquid crystal display may be a multi-domain vertical alignment (MVA) liquid crystal display. The pixel structure includes: a substrate 100 , a pixel electrode 116 and a plurality of storage capacitors 114 , 118 , 120 and 122 . At least one pair of parallel gate lines 102a and 102b and at least one pair of parallel data lines 108a and 108b are disposed on the substrate 100 . The data lines 108 a and 108 b substantially perpendicularly cross the gate lines 102 a and 102 b to define a pixel region 110 on the substrate 100 .

A thin film transistor and a pixel electrode 116 are disposed above the pixel area 110 . Here, the TFT at least includes: a gate electrode 103 (not shown), a polysilicon layer 106 as an active (channel) layer, a source electrode 111a and a drain electrode 111b. The gate electrode 103 is electrically connected to the gate line 102a, the source electrode 111a is electrically connected to the pixel electrode 116, and the drain electrode 111b is electrically connected to the data line 108a. The pixel electrode 116 can be made of a transparent conductive layer, such as indium tin oxide (ITO), and has at least one slit 116a for generating a pretilt angle.

A plurality of storage capacitors 114 , 118 , 120 and 122 are disposed above the pixel region 110 . The storage capacitor 114 is located in the middle of the pixel region 110 and is substantially parallel to the gate lines 102a and 102b. In this embodiment, the lower electrode 102c of the storage capacitor 114 is defined by the same conductive layer as the gate lines 102a and 102b. Furthermore, the upper electrode 108e is defined by the same conductive layer as the data lines 108a and 108b.

In another embodiment, the pixel electrode 116 and the upper electrode of the storage capacitor 114 are defined by the same conductive layer, without additionally disposing the upper electrode 108e.

The storage capacitor 118 is substantially parallel to and adjacent to the gate line 102a, and the storage capacitor 120 is substantially parallel to and adjacent to the gate line 102b. Unlike the storage capacitor 114, the lower electrodes 108c and 108d of the storage capacitors 118 and 120 are defined by the same conductive layer as the data lines 108a and 108b, while the pixel electrode 116 and the upper electrodes of the storage capacitors 118 and 120 are made of the same conductive layer. defined by the conductive layer. That is, the pixel electrode 116 is used as the upper electrode of the storage capacitors 118 and 120 .

The storage capacitor 122 is substantially parallel to and adjacent to the data line 108a. Similar to the storage capacitor 114, the bottom electrode 102d of the storage capacitor 122 and the gate lines 102a and 102b are defined by the same conductive layer. In addition, similar to the storage capacitors 118 and 120 , the pixel electrode 116 and the upper electrode of the storage capacitor 122 are defined by the same conductive layer.

FIG. 1G-1 shows a schematic plan view of a pixel structure suitable for a wide viewing angle liquid crystal display according to another embodiment of the present invention, wherein the same components as in FIG. 1G use the same reference numerals, and the same or similar descriptions are omitted here. In this embodiment, the difference from FIG. 1G is that the storage capacitor 122 substantially parallel to the data line 108a may partially overlap the data line 108a. Likewise, the storage capacitors 118 and 120 substantially parallel to the gate lines 102a and 102b, respectively, may partially overlap the gate lines 102a and 102b, respectively.

1A to 1G , FIGS. 2A to 2G and FIGS. 3A to 3C will be used to describe a method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display according to an embodiment of the present invention. Among them, FIGS. 1A to 1G show a schematic plan view of a method for manufacturing a pixel structure of a wide viewing angle liquid crystal display; FIGS. - 2D', 2E-2E', 2F-2F', 2G-2G' line schematic cross-section; Figures 3A to 3C respectively show 3A-3A', 3B-3B', 3C-3C' in Figures 1E to 1G Line schematic diagram. First, referring to FIGS. 1A and 2A , a substrate 100 is provided, such as an array substrate made of transparent glass or quartz. A first conductive layer 102 such as aluminum, chromium, molybdenum, tungsten, copper or alloys thereof is formed on the substrate 100 . 1B and 2B, the first conductive layer 102 is defined to form gate lines 102a and 102b substantially parallel to each other on the substrate 100, wherein the gate line 102a has a protruding portion 103 for use as a thin film transistor. grid electrode. Meanwhile, by defining the first conductive layer 102, a common line 102c substantially parallel to the gate lines 102a and 102b is formed between the gate lines 102a and 102b. In this embodiment, the common line 102c has a lateral extension 102d that is substantially parallel to and adjacent to a data line formed later. One end of the lateral extension 102d may have a protruding portion substantially parallel to and adjacent to a gate line 102b. The common line 102c and its lateral extension 102d are respectively used as lower electrodes of subsequent storage capacitors.

Next, referring to FIGS. 1C and 2C, a first insulating layer 104, such as a silicon oxide or silicon nitride layer, is formed on the substrate 100, and covers the gate lines 102a and 102b, the gate electrodes 103, and the common line 102c and its Lateral extension 102d. Here, the first insulating layer 104 is used as a gate insulating layer of a thin film transistor and an insulating layer of a storage capacitor. After that, a polysilicon or amorphous silicon layer 106 can be formed on the first insulating layer 104 above the gate electrode 103 by conventional deposition techniques, such as chemical vapor deposition (CVD), to serve as the active (channel) of the thin film transistor. Road) layer.

Next, referring to FIGS. 1D and 2D , a second conductive layer 108 is formed on the first insulating layer 104 , such as aluminum, chromium, molybdenum, tungsten, copper or alloys thereof, and covers the polysilicon or amorphous silicon layer 106 . Next, define the second conductive layer 108 to form substantially parallel data lines 108 a and 108 b on the first insulating layer 104 , and substantially perpendicularly cross the gate lines 102 a and 102 b to form a pixel region 110 . At the same time, by defining the second conductive layer 108 , the source electrode 111 a and the drain electrode 111 b are respectively formed on the polysilicon layer (active layer) 106 . In addition, by defining the second conductive layer 108 , conductive pattern layers 108 c , 108 d and 108 e are formed on the first insulating layer 104 substantially parallel to the gate lines 102 a and 102 b. The conductive pattern layers 108c and 108d are respectively adjacent to the gate lines 102a and 102b, and are used as lower electrodes of subsequent storage capacitors. The conductive pattern layer 108e is formed on the first insulating layer 104 above the common line 102c, and is used as an upper electrode of the storage capacitor. In this embodiment, the common line 102c, the conductive pattern layer 108e and the intervening first insulating layer 104 form a storage capacitor 114 in the middle of the pixel region 110, as shown in FIGS. 1E, 2E and 3A.

Next, referring to FIGS. 1F, 2F and 3B, a second insulating layer (protective layer) 112 is formed on the first insulating layer 104, and covers the data lines 108a and 108b, the source and drain electrodes 111a and 111b, and The conductive pattern layers 108c, 108d and 108e. The second insulating layer 112 can be used alone or together with the first insulating layer 104 as a storage capacitor insulating layer, which can be a single-layer or multi-layer structure, such as a silicon oxide layer, a silicon nitride layer, or a combination thereof. Afterwards, the second insulating layer 112 and/or the first insulating layer 104 are etched to form a plurality of via holes (contact holes) 112a, 112b, 112c, 112d, 112e and 112f therein, wherein the contact holes 112a are used for electrical connection The thin film transistor and the subsequently formed pixel electrode, and the contact holes 112b, 112c, 112d, 112e and 112f are used to electrically connect a plurality of storage capacitors.

Finally, referring to FIGS. 1G, 2G and 3C, a transparent conductive layer (not shown), such as ITO, is formed on the second insulating layer 112 and filled into the contact holes 112b, 112c, 112d, 112e and 112f. Afterwards, a transparent conductive layer is defined to form a pixel electrode 116 on the second insulating layer 112 above the pixel region 110 . The pixel electrode 116 has a slit 116a for generating a pre-tilt angle. In addition, the pixel electrode 116 partially extends above the conductive pattern layers 108c and 108d serving as the lower electrodes of the storage capacitors and the lateral extension portion 102d of the common line 102c to form the storage capacitors 118 , 120 and 122 respectively.

In another embodiment, the pixel electrode 116 can be used as the upper electrode of the storage capacitor 114 without forming the conductive pattern layer 108 e when defining the second conductive layer 108 and forming the contact hole 112 b when etching the second insulating layer 112 . That is, the storage capacitor 114 may be composed of a common line (lower electrode) 102c, a pixel electrode (upper electrode), and first and second insulating layers (capacitive insulating layers) 104 and 112 .

Meanwhile, by defining the transparent conductive layer, a transparent conductive portion 117a separated from the pixel electrode 116 is formed above the contact holes 112c and 112d, and a transparent conductive portion 117b separated from the pixel electrode 116 is formed above the contact holes 112e and 112f. The storage capacitors 114, 118, 120 and 122 are electrically connected to each other through the transparent conductive parts 117a and 117b and the contact holes 112b, 112c, 112d, 112e and 112f.

In addition, those skilled in the art can manufacture the pixel structure shown in FIG. 1G-1 through similar process steps as shown in FIGS. 1A to 1G . To simplify the description, details are not repeated here.

According to the pixel structure of the present invention, since the non-transparent conductive pattern layers 108c and 108d are adjacent to or partly overlapped with the gate lines 102a and 102b, it is not necessary to form a black matrix above the gate lines to exclude adjacent gate lines. At the same time, it helps to improve the aperture ratio. In addition, due to the existence of the storage capacitors 118 , 120 and 122 , the area of the storage capacitor 114 is reduced to further improve the aperture ratio and effectively improve the image quality.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art may make changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should be determined by what is defined in the claims.

Claims (17)

1. A pixel structure suitable for a wide viewing angle liquid crystal display, comprising: The first and second gate lines are arranged in parallel on a substrate; The first and second data lines are arranged in parallel on the substrate and substantially perpendicularly cross the first and second gate lines, so as to define a pixel area on the substrate; a pixel electrode disposed above the pixel region; a first storage capacitor disposed above the pixel region, which is substantially parallel to the first gate line and adjacent to or partially overlapped with the first gate line; and a second storage capacitor, arranged above the middle part of the pixel region, which is substantially parallel to the first and second gate lines, and the first storage capacitor is located between the second storage capacitor and the first gate between lines. 2. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, wherein the first and second data lines and the lower electrode of the first storage capacitor are defined by the same conductive layer. 3. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, wherein the pixel electrode and the upper electrode of the first storage capacitor are defined by the same conductive layer. 4. The pixel structure applicable to a wide viewing angle liquid crystal display as claimed in claim 1, further comprising a third storage capacitor disposed above the pixel area, which is substantially parallel to the second gate line and connected to the second gate line The epipolar lines are adjacent or partially overlapping. 5. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 4, wherein the first and second data lines and the bottom electrode of the third storage capacitor are defined by the same conductive layer. 6 . The pixel structure suitable for wide viewing angle liquid crystal display as claimed in claim 4 , wherein the pixel electrode and the upper electrode of the third storage capacitor are defined by the same conductive layer. 7. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, wherein the first and second gate lines and the bottom electrode of the second storage capacitor are defined by the same conductive layer. 8. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, wherein the first and second data lines and the upper electrode of the second storage capacitor are defined by the same conductive layer. 9. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, wherein the pixel electrode and the upper electrode of the second storage capacitor are defined by the same conductive layer. 10. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 1, further comprising a fourth storage capacitor disposed above the pixel area, substantially parallel to the first data line and connected to the first data line A data line is adjacent or partially overlaps. 11. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 10, wherein the first and second gate lines and the bottom electrode of the fourth storage capacitor are defined by the same conductive layer. 12. The pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 10, wherein the pixel electrode and the upper electrode of the fourth storage capacitor are defined by the same conductive layer. 13. A method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display, comprising: forming a first conductive layer on a substrate; defining the first conductive layer to form first and second gate lines substantially parallel to each other on the substrate, and to form a second storage memory substantially parallel between the first and second gate lines the lower electrode of the capacitor; forming a first insulating layer on the substrate and covering the first and the second gate lines; forming a second conductive layer on the first insulating layer; Defining the second conductive layer to form a first data line, a second data line, and a lower electrode of a first storage capacitor on the first insulating layer, wherein the first and second data lines substantially parallel to each other and substantially perpendicular to the first and second gate lines to form a pixel region, the lower electrode of the first storage capacitor is substantially parallel to the first gate line and connected to the first gate line Adjacent or partially overlapping, and the lower electrode of the first storage electrode is located between the lower electrode of the second storage capacitor and the first gate line; forming a second insulating layer on the first insulating layer, and covering the first data line, the second data line, and the lower electrode of the first storage capacitor; and A pixel electrode is formed on the second insulating layer above the pixel area, and partly extends above the lower electrode of the first storage capacitor to serve as the upper electrode of the first storage capacitor. 14. The method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 13, further comprising: covering the first insulating layer on the lower electrode of the second storage capacitor; and By defining the second conductive layer, the upper electrode of the second storage capacitor is formed on the first insulating layer above the lower electrode of the second storage capacitor. 15. The method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 13, further comprising: covering the first and second insulating layers on the lower electrode of the second storage capacitor; and The pixel electrode is formed on the second insulating layer above the lower electrode of the second storage capacitor to serve as the upper electrode of the second storage capacitor. 16. The method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 13, further comprising: By defining a third conductive layer, a lower electrode of a third storage capacitor is formed on the first insulating layer, which is substantially parallel to the second gate line and adjacent to or part of the second gate line. overlap covering the second insulating layer on the lower electrode of the third storage capacitor; and The pixel electrode is formed on the second insulating layer above the lower electrode of the third storage capacitor to serve as the upper electrode of the third storage capacitor. 17. The method for manufacturing a pixel structure suitable for a wide viewing angle liquid crystal display as claimed in claim 13, further comprising: By defining the first conductive layer, a lower electrode of a fourth storage capacitor is formed on the substrate, which is substantially parallel to the first data line and adjacent to or partially overlapped with the first data line; sequentially covering the first and second insulating layers on the lower electrode of the fourth storage capacitor; and The pixel electrode is formed on the second insulating layer above the bottom electrode of the fourth storage capacitor to serve as the upper electrode of the fourth storage capacitor.

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