CN100520788C - Method for setting line spacing/line width layout of logic circuit - Google Patents
Method for setting line spacing/line width layout of logic circuit Download PDFInfo
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- CN100520788C CN100520788C CNB2006101121329A CN200610112132A CN100520788C CN 100520788 C CN100520788 C CN 100520788C CN B2006101121329 A CNB2006101121329 A CN B2006101121329A CN 200610112132 A CN200610112132 A CN 200610112132A CN 100520788 C CN100520788 C CN 100520788C
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Abstract
The invention relates to a line distance/line width layout setting method of logic circuit, which directly generates layout setting capable of importing logic circuit software by using a logic circuit setting file, and comprises the following steps: searching a plurality of line codes which accord with a coding rule in the logic circuit setting file in a character string comparison mode; obtaining a plurality of line distance/line width settings corresponding to each line code from the logic circuit setting file; generating a first layout setting file with the line spacing/line width setting according to the logic circuit setting file, each line code and each corresponding line spacing/line width setting; and loading a region definition rule to adjust the line distance/line width setting in the layout setting file to generate a second layout setting file to be imported into the logic circuit software. The invention can make the user quickly obtain the circuit layout setting and use the setting in the logic circuit software, greatly reduce the preposition operation time and reduce the occurrence of setting value input errors.
Description
Technical field
The present invention relates to a kind of method that the logic layout is set that obtains, be meant the line information that a kind of analysis one logic enactment document is comprised especially, directly obtained the method that can import the required configuration setting of logical circuit software.
Background technology
The exquisitenessization of electronic installation is necessary trend, therefore how the circuit that goes out to have maximum functions in the spatial design of minimum, just become the important problem place, in other words, in the logical circuit processing procedure, the topological design of circuit can influence the configuration and the occupation space of all parts, so how circuit disposes the emphasis place that has then become primary.
In circuit design now, convenience for effective managing line configuration and increase line design, the circuit of circuit layout is set and how to be calculated by the logical circuit software of special use, but the setting value of institute's desire input comprises line-spacing (distance between circuit and the circuit), live width (width of wiring), the formulation of line rule, and the restriction of specific condition or the like information, all need various circuit setting values to be input in each setting value field of logical circuit software with manual mode earlier, and each circuit setting value also needs earlier with after its range of application of manual analysis, select again and input and the corresponding line rule of circuit setting value, in the hope of meeting the required of Logic Circuit Design.
But existing technology has unavoidable shortcoming, and it is as described in following:
(1) error rate height, according to present logical circuit software, its all configurations are set and are all needed by artificial input, line rule is just imported by manual analysis to select, but to design a logical circuit, only connection line has tens of at least, if circuit function is huge and numerous and diverse, connection line has hundred or thousand relatively, only the setting value of every circuit required input may just not have only one, counting thus needs input tens of at least, thousands of at most circuit setting values, so the probability of setting value input error is very high, if the one data entry error, and be not easy to inspect its wrong place, so promptly be difficult to produce correct line test output.
(2) time cost is too high, in the prior art, desire the One's name is legion of incoming line setting value, add, so need the cost long time with manually-operated, if add the formulation of line rule, the line rule that analysis circuit is suitable for just needs cost two to three Time of Day usually, is just begun to carry out the test of logic, with previous operations, its time cost that need spend is too big.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of line-spacing/live width layout setting method of logic, with enhancement user's convenience, and simplifies the Logic Circuit Design flow process to enhance productivity.
To achieve these goals, the invention provides a kind of line-spacing/live width layout setting method of logic, use the layout that the direct generation of a logical circuit enactment document can import logical circuit software and set, its logical circuit software can be the Logic Circuit Design software Allegro that dealer now uses always.Export a logical circuit enactment document earlier from logical circuit software, this file comprises the required setting value of using of Logic Circuit Design, as: line coding (the pairing numbering of each circuit), the information that line-spacing (distances between adjacent two the circuits)/live width (the employed line thickness of each circuit) of corresponding line coding is set, utilize the whole program of circuit system in the mode of compare string string progressively, follow a coding rule and obtain a plurality of line codings that are contained in the logical circuit enactment document, and a plurality of line-spacings/live width that obtains corresponding line coding out of the ordinary is in the same way set, it is whole more above-mentioned all information to be carried out the information system, it is best setting of circuit of obtaining logical circuit by the whole program of circuit system with a circuit comparison rule, and with comparative result storage formation one first layout enactment document, but this first layout enactment document can only the principium identification better lines be set, can't be applicable on the logical circuit with special design limiting, whereby, reload an area limiting rule by the whole program of circuit system, it is the information that each logical circuit of record all particular design in configuration limit, comparison program can progressively be adjusted the line information that the first layout enactment document is comprised according to the area limiting rule, to form one second layout enactment document, at last this file is imported in the logical circuit software, can carry out follow-up test action.
Specifically, the invention provides a kind of line-spacing/live width layout setting method of logic, its characteristics are, use the layout setting that the direct generation of a logical circuit enactment document can import logical circuit software, its method comprises the following step: search a plurality of line codings that meet a coding rule in this logical circuit enactment document by the character string manner of comparison; Obtaining corresponding respectively a plurality of line-spacings of this line coding/live width in this logical circuit enactment document sets; According to this logical circuit enactment document, respectively this line coding and respectively this line-spacing/live width setting of correspondence, generation has the one first layout enactment document that line-spacing/live width is set; And the line-spacing/live width that loads in this layout enactment document of area limiting rule adjustment is set to generate one second layout enactment document, to import in the logical circuit software.
The line-spacing of above-mentioned logic/live width layout setting method, its characteristics are, be somebody's turn to do and in this logical circuit enactment document, obtained in corresponding respectively a plurality of line-spacings of this line coding information/live width setting step, also comprise the corresponding respectively a plurality of pre-storage line-spacing of this line coding information of remittance in a circuit setting data storehouse/live width setting step.
The line-spacing of above-mentioned logic/live width layout setting method, its characteristics are, this is according to this logical circuit enactment document, respectively this line coding and respectively this line-spacing/live width setting of correspondence, generation has the one first layout enactment document step that line-spacing/live width is set, and also comprises to utilize corresponding respectively respectively this line-spacing of this line coding of interface input/live width to set.
The line-spacing of above-mentioned logic/live width layout setting method, its characteristics are, this reaches should line-spacing/live width setting according to this logical circuit enactment document, this line coding, generation has the one first layout enactment document step that line-spacing/live width is set, also comprise relatively this line-spacing/live width that should line coding is set and should pre-storage line-spacing/live width be set, and choose this preferable line-spacing/live width and set, will choose the result and export the formation first layout enactment document.
The present invention has following effect:
(1) design cycle of simplification logical circuit is learnt from prior art, and logical circuit software needs with the required circuit setting value of manual type input; But with method of the present invention, cooperate the computing of the whole program of circuit system, can rake in the required optimum line of logical circuit software and set, save the work flow of artificial input.
(2) reduce error rate, learn from prior art, used logical circuit software to be with manually-operated incoming line setting value, to formulate and choose the most suitable line rule and specific design limiting condition in the past, but it is numerous and diverse numerous that the circuit of required input is set numerical value, even input error also is difficult to inspect correction; But the method according to this invention cooperates the computing of the whole program of circuit system, and the circuit setting value of all desire inputs can both produce with specific rule, so as to avoiding human negligence really.
(3) reduce time cost, simplify the design cycle of logical circuit, learn from prior art, logical circuit software needs usually with the required circuit setting value of manual type input, its quantity is tens of at least, and thousands of at most have, and only imports setting value and just must spend two to three days time; And, cooperate the computing of the whole program of circuit system with method of the present invention, can produce the circuit setting value that can import logical circuit software rapidly.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is a system construction drawing of the present invention;
Fig. 2 is a method flow diagram of the present invention;
Fig. 3 is the saving format of logical circuit enactment document of the present invention;
Fig. 4 is the form synoptic diagram of the first layout enactment document of the present invention; And
Fig. 5 is the form synoptic diagram of the second layout enactment document of the present invention.
Wherein, Reference numeral:
110 logical circuit software
111 logical circuit enactment documents
112 setting value fields
120 circuit setting data storehouses
121 line-spacings/live width database
122 limit database
The whole program of 130 circuits system
131 circuits are set comparison program
132 circuits are set the adjustment program
The form synoptic diagram of 300 logical circuit enactment documents
The form synoptic diagram of 400 first layout enactment documents
The form synoptic diagram of 500 second layout enactment documents
Step S201 searches a plurality of line codings that meet a coding rule in the logical circuit enactment document by the character string manner of comparison
Step S202 obtains a plurality of line-spacings/live width of corresponding each line coding information and sets in the logical circuit enactment document
Step S203 sets according to logical circuit enactment document, each line coding and corresponding each line-spacing/live width, generates to have the one first layout enactment document that line-spacing/live width is set
Line-spacing/live width that step S204 loads in the area limiting rule adjustment layout enactment document is set to generate the setting of one second layout enactment document, to import in the logical circuit software
Embodiment
Please refer to Fig. 1, it is for using the system construction drawing of the inventive method, and it comprises a logical circuit software 110, a circuit setting data storehouse 120 and the whole program 130 of circuit system.Logical circuit software 110 exportable logical circuit enactment documents 111, and have a plurality of setting value fields 112 simultaneously, can set in order to incoming line, and logical circuit enactment document 111 has the circuit set information of the required use of logical circuit, comprise the line coding that each circuit distinctly has, and set with the initial line-spacing/live width of setting corresponding each line coding of user; Circuit setting data storehouse 120 comprises one line-spacing/live width database 121, it stores a plurality of circuits in advance and sets pre-storage information, comprise circuit number, and a plurality of default line-spacing of corresponding each circuit number/live width is set, circuit setting data storehouse 120 also comprises one and limits database 122, store a plurality of area limiting rules in advance, usually logical circuit can be divided into different functional areas with circuit according to its function, difference according to functional area, the setting of circuit will inevitably be different restriction, and the area limiting rule promptly is to formulate circuit required setting standard of following when design; The whole program 130 of circuit system comprises a circuit and sets comparison program 131 and circuit setting adjustment program 132, it is to obtain logical circuit enactment document 111 that circuit is set comparison program 131, capturing the circuit number and the line-spacing/live width that are contained in logical circuit enactment document 111 sets, and connecting line distance/live width database 121 is set pre-storage information with the circuit of obtaining corresponding each circuit, with the whole preferable circuit setting value that relatively selects of uniting, again it is stored into one first layout enactment document and export circuit to and set adjustment program 132, circuit is set adjustment program 132 and is linked qualification database 122, and load required area limiting rule, adjust the stored circuit setting value of the first layout enactment document, and the circuit setting value that adjustment is finished stored into one second layout enactment document, with remittance logical circuit software 110, and according to the setting value field 112 automatic circuit setting values that load correspondence.
Fig. 2 is the process flow diagram of the line-spacing/live width layout setting method of logic of the present invention, uses the layout setting that the direct generation of a logical circuit enactment document can import logical circuit software 110, please refer to Fig. 1 and understands to cooperate, and its method comprises the following step:
Step S201, search a plurality of line codings that meet a coding rule in the logical circuit enactment document 111 by the character string manner of comparison, logical circuit software 110 is output one logical circuit enactment document 111 earlier, and the whole program 130 of circuit system can load logic circuit enactment documents 111, and utilize circuit set comparison program 131 with the character string manner of comparison to find out all line codings.
Step S202, obtaining a plurality of line-spacings/live width of corresponding each line coding in logical circuit enactment document 111 sets, it is elementary string again with the line coding that circuit is set comparison program 131, search and obtain a plurality of line-spacing set informations and the live width set information of all corresponding each line codings, circuit is set comparison program 131 and obtain a plurality of pre-storage line-spacing of corresponding each line coding information/live width setting again in a circuit setting data storehouse 130 afterwards.
Step S203, according to logical circuit enactment document 111, each line coding and corresponding each line-spacing/live width are set, generation has the one first layout enactment document that line-spacing/live width is set, line-spacing/live width that the whole program 130 of circuit system obtains earlier from logical circuit enactment document 111 is set, and the stored default line-spacing/live width set information of line-spacing/live width database 130, and can provide input interface to think that for the input user comparatively ideal line-spacing/live width sets, can set the pairing circuit of each line coding afterwards and do preliminary judgement, set thereby choose preferable line-spacing/live width, again it is chosen the result and export the formation first layout enactment document and be sent to circuit setting adjustment program 132.
Step S204, and the line-spacing/live width that loads in the area limiting rule adjustment first layout enactment document is set to generate one second layout enactment document, to import in the logical circuit software 110, the first layout enactment document is after generating, it is chosen for preliminary circuit setting value, do not consider the specific question that side circuit when design and each functional area note, as problems such as the too high so that conduct electrical energy of electromagnetic interference (EMI), noise or line impedance are not good, therefore each functional area is gone up to follow in design and set rule and be stored in qualification database 122.After circuit setting adjustment program 132 is obtaining the first layout enactment document, can needed area limiting rule be loaded on circuit setting adjustment program 132 from limiting database 122, and the line-spacing that the first layout enactment document is inner stored/live width is set one by one and is adjusted, to form comparatively desirable circuit set information, its result is exported the formation second layout enactment document and imports logical circuit software 110, and insert in regular turn in the setting value field 112 according to circuit grade, so that carry out the test jobs of subsequent logic circuit.
Please refer to Fig. 3, it is the form synoptic diagram 300 of logical circuit enactment document, at this, utilize " net_spacing " to set to search live width, " net_physical " searches line-spacing and sets, when wherein S represents same group of being set at of live width, at least need how many unit lengths at interval, G needs how many unit lengths at interval when representing not on the same group, in this example, " net_spacing:(S12G30) " promptly be to represent between this line-spacing setting on the same group to need 12 unit lengths at least at interval, do not need 30 unit lengths at interval on the same group at least.
Please refer to Fig. 4, it is the form synoptic diagram 400 of the first layout enactment document, the information format that is had in regular turn by circuit board coding, line coding, the live width of comparison set or line-spacing is set, be through the obtained preferable live width/line-spacing setting result in back relatively at last.
Please refer to Fig. 5, it is the form synoptic diagram 500 of the second layout enactment document, the information format that is had is followed successively by live width/line-spacing of circuit board coding, employed area limiting rule, line coding and institute's furnishing formation after loading restrictive rule and sets the result, and forms the employed qualifications of each setting result.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of claim of the present invention.
Claims (3)
1, a kind of line-spacing of logic/live width layout setting method is characterized in that, uses the layout setting that the direct generation of a logical circuit enactment document can import logical circuit software, and its method comprises the following step:
Search a plurality of line codings that meet a coding rule in this logical circuit enactment document by the character string manner of comparison;
Obtaining corresponding respectively a plurality of line-spacings of this line coding/live width in this logical circuit enactment document sets;
Obtaining the corresponding respectively a plurality of pre-storage line-spacing of this line coding/live width in a circuit setting data storehouse sets;
According to this logical circuit enactment document, respectively this line coding and corresponding respectively respectively this line-spacing of this line coding/live width setting and respectively storage line-spacing/live width setting in advance, generation has the one first layout enactment document that line-spacing/live width is set; And
Load the regular line-spacing/live width adjusted in this layout enactment document of an area limiting and set to generate one second layout enactment document, to import in the logical circuit software, wherein said area limiting rule is to formulate circuit required setting standard of following when design.
2, the line-spacing of logic according to claim 1/live width layout setting method, it is characterized in that, this is according to this logical circuit enactment document, respectively this line coding and respectively this line-spacing/live width setting of correspondence, generation has the one first layout enactment document step that line-spacing/live width is set, and also comprises to utilize corresponding respectively respectively this line-spacing of this line coding of interface input/live width to set.
3, the line-spacing of logic according to claim 1/live width layout setting method, it is characterized in that, this reaches should line-spacing/live width setting according to this logical circuit enactment document, this line coding, generation has the one first layout enactment document step that line-spacing/live width is set, also comprise relatively this line-spacing/live width that should line coding is set and should pre-storage line-spacing/live width be set, and choose this preferable line-spacing/live width and set, will choose the result and export the described first layout enactment document of formation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101121329A CN100520788C (en) | 2006-08-11 | 2006-08-11 | Method for setting line spacing/line width layout of logic circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101121329A CN100520788C (en) | 2006-08-11 | 2006-08-11 | Method for setting line spacing/line width layout of logic circuit |
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| CN101122925A CN101122925A (en) | 2008-02-13 |
| CN100520788C true CN100520788C (en) | 2009-07-29 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101751483B (en) * | 2008-12-16 | 2011-12-07 | 英业达股份有限公司 | Layout methodology that automates layout rule verification for differential signal trace pairs |
| CN105260490B (en) * | 2014-07-14 | 2018-05-29 | 启碁科技股份有限公司 | Circuit layout device and circuit layout method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6038383A (en) * | 1997-10-13 | 2000-03-14 | Texas Instruments Incorporated | Method and apparatus for determining signal line interconnect widths to ensure electromigration reliability |
| US20040015797A1 (en) * | 2002-07-19 | 2004-01-22 | Micron Technology, Inc. | Line width check in layout database |
| CN1696939A (en) * | 2004-05-15 | 2005-11-16 | 鸿富锦精密工业（深圳）有限公司 | System and method for verifying wiring distance of printed circuit board |
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2006
- 2006-08-11 CN CNB2006101121329A patent/CN100520788C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6038383A (en) * | 1997-10-13 | 2000-03-14 | Texas Instruments Incorporated | Method and apparatus for determining signal line interconnect widths to ensure electromigration reliability |
| US20040015797A1 (en) * | 2002-07-19 | 2004-01-22 | Micron Technology, Inc. | Line width check in layout database |
| CN1696939A (en) * | 2004-05-15 | 2005-11-16 | 鸿富锦精密工业（深圳）有限公司 | System and method for verifying wiring distance of printed circuit board |
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Effective date of registration: 20210924 Address after: Furong Village, Hengshanqiao Town, Changzhou Economic Development Zone, Jiangsu Province Patentee after: Changzhou Wanshiji technology R & D Co.,Ltd. Address before: Taipei City, Taiwan, China Patentee before: Yingda Co.,Ltd. |
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