CN100533520C - Display driving device, display and driving method of display - Google Patents

Abstract

The present invention discloses a display driving device, which is used to solve the problem of vertical stripes when a system and a display panel of a notebook computer are combined and turned on. The display driving device includes a single-channel pulse width modulation circuit, a buck-boost circuit, a delay circuit and a display driver. The delay circuit delays the operation voltage signal provided to the pixel of the display panel when it is turned on, so that it is later than the logic operation voltage signal supplied to the display driving device, the voltage signal required for the pixel to be turned on, and the voltage signal required for the pixel to be turned off, so that the vertical stripes phenomenon can be eliminated.

Description

Display driving device, display and display driving method

technical field

The present invention relates to a display driving device, and in particular to a display driving device for solving the problem of straight stripes when a system such as a notebook computer is paired with a display panel when it is turned on.

Background technique

In today's digital life, flat-panel displays such as liquid crystal displays, organic light-emitting diode displays, and plasma displays have been affirmed and accepted by the public because of their light, thin, short, and small features. In portable electronic devices, such as notebook computers, portable audio-visual disc players, personal digital assistants, etc., the use of flat-panel displays is indispensable. However, when the flat-panel display is used with a system such as a notebook computer, various voltage signals inside the flat-panel display input data and signals into the system, so that straight stripes may appear on the display panel when the flat-panel display is turned on. The vertical stripes occur regularly from top to bottom of the display panel, which consumes unnecessary power on the display panel and makes the quality of the flat panel display questionable by consumers.

FIG. 1 shows a conventional display driving device 10, which is suitable for the above-mentioned flat panel display. Please refer to FIG. 1 , the display driving device 10 includes a single-channel pulse width modulation circuit 11 , a buck-boost circuit 13 and a display driver 15 . Wherein, the voltage signal related to the display panel 17 when it is turned on includes a voltage signal VDDD for providing the logic operation of the display driving device 10, a voltage signal VDDG for turning on the pixels of the display panel 17, and a voltage signal for turning off the display panel 17. The pixel voltage signal VEEG and the operating voltage signal VDDA for providing the pixel of the display panel 17 to be turned on.

Please refer to FIG. 1 , the single-channel pulse width modulation circuit 11 receives power from the voltage signal VDDD to provide the operating voltage signal VDDA when the pixel is turned on to the buck-boost circuit 13 and the display driver 15 . Next, the buck-boost circuit 13 provides the voltage signals VDDG and VEEG to the display driver 15 according to the voltage signal VDDA, which are used to respectively control the on and off of the pixels of the display panel 17 . Finally, the display driver 15 drives the display panel 17 according to the received voltage signals VDDA, VEEG and VDDG.

When the display driving device 10 is combined with a system such as a notebook computer, there will be a problem of vertical stripes when it is turned on. Please refer to FIG. 2 , which is a diagram showing the timing relationship of each voltage signal, system signal, and system data of the drive device 10. It can be seen from the figure that the timing sequence of the voltage signals VDDD, VDDA, VEEG, and VDDG is VDDD→VDDA→VEEG→ VDDG. It can be seen from FIG. 2 that before the system signals and system data are generated, the voltage signals VDDD, VDDA, VEEG, and VDDG have already driven the display panel 17 to start displaying the received data. However, the data received and displayed by the display panel 17 at this time Not from the system, but a messy and irregular signal, thus producing the phenomenon of straight stripes.

FIG. 3 is another conventional display driving device 30 that can be used to solve the vertical stripe phenomenon generated by the above display driving device 10 . The display driving device 30 includes a delay setting circuit 31 , a multi-channel pulse width modulation circuit 33 and a display driver 35 , wherein the display driver 35 is used to provide signals to drive the display panel 37 . The display driver 30 can use the delay setting circuit 31 and the multi-channel pulse width modulation circuit 33 to directly adjust the timing relationship of the voltage signals VDDA, VEEG and VDDG as VEEG→VDDG→VDDA, so as to avoid receiving The phenomenon of straight stripes is generated when the data signal is messy and irregular.

Although the display driving device 30 can use the delay setting circuit 31 and the multi-channel pulse width modulation circuit 33 to directly adjust the timing relationship of the voltage signals VDDA, VEEG and VDDG to achieve the purpose of eliminating the vertical stripes, but because Its cost is too high to be a good solution.

Contents of the invention

The purpose of the present invention is to provide a display driving device, which can solve the phenomenon of straight stripes when the display panel is paired with a system such as a notebook computer and save costs at the same time, and the above-mentioned display panel can be a liquid crystal display panel.

The display driving device includes a display driver, a single-channel pulse width modulation circuit, a buck-boost circuit and a delay circuit. Wherein, the display driver is electrically connected to drive the display panel. In one embodiment, the display driver includes a scan driver and a data driver. The single-channel pulse width modulation circuit provides an operating voltage from a logic voltage signal and is used to provide a first voltage signal, and the first voltage signal is used to provide an operating voltage when the pixels of the display panel are turned on. The buck-boost circuit is electrically connected between the single-channel pulse width modulation circuit and the display driver. The buck-boost circuit provides a second voltage signal and a third voltage signal according to the first voltage signal, wherein the second voltage signal is used for The voltage signal of the pixel of the display panel is turned on, and the third voltage signal is used to turn off the voltage signal of the pixel of the display panel.

In addition, the delay circuit is electrically connected between the single-channel pulse width modulation circuit and the display driver, and is used to delay the first voltage signal to provide a fourth voltage signal, wherein the fourth voltage signal is a delayed form of the first voltage signal, And the timing of the fourth voltage signal is later than the second voltage signal and the third voltage signal. In an embodiment, the delay circuit can be composed of resistors and capacitors.

Another object of the present invention is to provide a display that can solve the phenomenon of straight stripes when the display panel is paired with a system such as a notebook computer and save costs while saving costs. The aforementioned display panel can be a liquid crystal display panel. The display includes a display panel and the above-mentioned display driving device, wherein the display panel is used to display system data output by the system.

Another object of the present invention is to provide a display driving method, wherein the display is used in conjunction with the system, and the display includes a display panel for displaying system data output by the system. For example, the system configuration of a notebook computer produces straight stripes when it is turned on. Furthermore, the aforementioned display panel may be a liquid crystal display panel.

The driving method first provides a logic voltage signal to the display, wherein the logic voltage signal is used to provide a voltage for logic operation of the display. Then, the display is powered by the logic voltage signal to provide the first voltage signal, the second voltage signal and the third voltage signal, wherein the first voltage signal is used to provide the operating voltage when the pixel of the display panel is turned on, and the second voltage signal is used to turn on the pixel. pixels of the display panel, and the third voltage signal is used to turn off the pixels of the display panel. Then, the first voltage signal is delayed to generate a fourth voltage signal, wherein the fourth voltage signal is a delayed form of the first voltage signal, and its timing is later than the second voltage signal and the third voltage signal. Finally, the display panel is driven by the second voltage signal, the third voltage signal and the fourth voltage signal.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.

Description of drawings

FIG. 1 is a block diagram of a conventional display driving device.

FIG. 2 is a time sequence relationship diagram of various voltage signals in the display driving device shown in FIG. 1 .

FIG. 3 is a block diagram of another conventional display driving device.

FIG. 4 is a block diagram of an embodiment of a display driving device of the present invention.

FIG. 5 is a timing relationship diagram of various voltage signals in the display driving device shown in FIG. 4 .

FIG. 6 is a flow chart of the display driving method of the present invention.

Detailed ways

For the convenience of description of the embodiment, the following display is taken as an example of a liquid crystal display, the display panel is taken as an example of a liquid crystal display panel, and the system is taken as an example of a computer system.

FIG. 4 is a block diagram of an embodiment of the display driving device of the present invention, and FIG. 5 is a timing relationship diagram of voltage signals in the display driving device shown in FIG. 4 . Please refer to FIG. 4 and FIG. 5 at the same time. The display driving device 40 includes a single-channel pulse width modulation circuit 41, a delay circuit 42, a buck-boost circuit 43, and a display driver 45, wherein the display driver 45 is electrically connected to a liquid crystal display panel 47. . In one embodiment, the display driver 45 includes a scan driver and a data driver (not shown), which are respectively used to drive the scan wiring and the data wiring on the liquid crystal display panel 47 . In addition, the liquid crystal display includes a display driving device 40 and a liquid crystal display panel 47 .

There are a plurality of voltage signals in the display driving device 40, including a logic voltage signal VDDD, a first voltage signal VDDA, a second voltage signal VDDG, a third voltage signal VEEG, and a fourth voltage signal VDDA'. Wherein, the logic voltage signal VDDD is used to provide the power supply voltage required for the operation of the single-channel pulse width modulation circuit 41 and the display driver 45, etc., the first voltage signal VDDA is used to provide the operating voltage when the pixels of the liquid crystal display panel 47 are turned on, and the second The second voltage signal VDDG is used to turn on the pixels of the LCD panel 47 , the third voltage signal VEEG is used to turn off the pixels of the LCD panel 47 , and the fourth voltage signal VDDA′ is a delayed version of the first voltage signal VDDA.

In one embodiment, the on and off of the pixels of the liquid crystal display panel 47 is controlled by a thin film transistor, so the voltage signals VDDG and VEEG are input to the gate of the thin film transistor. When the pixel is turned on (that is, the thin film transistor is turned on), the voltage signal VDDA is input to the pixel capacitor through the drain/source of the thin film transistor, and the voltage signal VDDA operates the rotation of the liquid crystal molecules with the common voltage as a reference potential.

The single-channel PWM circuit 41 can output the voltage signal VDDA to the delay circuit 42 and the buck-boost circuit 43 . The delay circuit 42 is generally composed of resistors and capacitors, and the delay circuit 42 delays the voltage signal VDDA for a period of time to output the voltage signal VDDA'. Furthermore, the buck-boost circuit 43 can receive the voltage signal VDDA from the single-channel pulse width modulation circuit 41 and convert it into voltage signals VDDG and VEEG to output to the display driver 45 . The display driver 45 finally uses these voltage signals VDDG, VEEG and VDDA' to drive the LCD panel 47.

Since the voltage signals VDDD, VDDG, VEEG and VDDA undergo the above operations, the voltage signal VDDA is delayed for a period of time as shown in Figure 5 to become the voltage signal VDDA', so the timing of these voltage signals changes from VDDD→VDDA→VEEG→ VDDG changes to VDDD→VEEG→VDDG→VDDA′, so as to avoid the phenomenon of vertical stripes generated by the liquid crystal display panel 47 at the moment of power-on due to receiving messy and irregular signals.

FIG. 6 is a flow chart of the display driving method of the present invention. Please refer to FIG. 6 , the driving method firstly provides a logic voltage signal VDDD to the LCD in step S61 , wherein the logic voltage signal VDDD is used to provide a logic operation voltage of the LCD. Next, in step S63, the liquid crystal display is powered by the logic voltage signal VDDD to provide the first voltage signal VDDA, the second voltage signal VDDG and the third voltage signal VEEG, wherein the first voltage signal VDDA is used to provide The second voltage signal VDDG is used to turn on the pixels of the liquid crystal display panel, and the third voltage signal VEEG is used to turn off the pixels of the liquid crystal display panel. Then, in step S65, the first voltage signal VDDA is delayed to generate a fourth voltage signal VDDA', wherein the fourth voltage signal VDDA' is a delayed version of the first voltage signal VDDA, and its timing is later than that of the second voltage signal VDDG and the second voltage signal VDDA. Three-voltage signal VEEG. Finally, in step S67, the liquid crystal display panel is driven by the second voltage signal VDDG, the third voltage signal VEEG and the fourth voltage signal VDDA'.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The scope of protection of an invention shall be defined by the claims.

Claims (13)

1. A display driving device, which is used to drive a display panel matched with a system, the display driving device comprising: a display driver electrically connected to the display panel; A single-channel pulse width modulation circuit, which provides an operating voltage from a logic voltage signal and is used to provide a first voltage signal, wherein the first voltage signal is used to provide an operating voltage when a pixel of the display panel is turned on; a buck-boost circuit, electrically connected between the single-channel pulse width modulation circuit and the display driver, the buck-boost circuit provides a second voltage signal and a third voltage signal according to the first voltage signal, Wherein the second voltage signal is used to turn on the pixels of the display panel, and the third voltage signal is used to turn off the pixels of the display panel; and a delay circuit, electrically connected between the single-channel pulse width modulation circuit and the display driver, for delaying the first voltage signal to provide a fourth voltage signal, wherein the fourth voltage signal is the first voltage The delayed form of the signal, and the timing of the fourth voltage signal is later than the second voltage signal and the third voltage signal. 2. The display driving device as claimed in claim 1, wherein the system is a notebook computer. 3. The display driving device as claimed in claim 1, wherein the display panel is a liquid crystal display panel. 4. The display driving device as claimed in claim 1, wherein the delay circuit is composed of a resistor and a capacitor. 5. The display driving device as claimed in claim 1, wherein the display driver comprises a scan driver and a data driver. 6. A display for use with a system, the display comprising: a display panel for displaying system data output by the system; a display driver for driving the display panel; A single-channel pulse width modulation circuit, which provides an operating voltage from a logic voltage signal and is used to provide a first voltage signal, wherein the first voltage signal is used to provide an operating voltage when a pixel of the display panel is turned on; a buck-boost circuit, electrically connected between the single-channel pulse width modulation circuit and the display driver, the buck-boost circuit provides a second voltage signal and a third voltage signal according to the first voltage signal, Wherein the second voltage signal is used to turn on the pixels of the display panel, and the third voltage signal is used to turn off the pixels of the display panel; and a delay circuit, electrically connected between the single-channel pulse width modulation circuit and the display driver, for delaying the first voltage signal to provide a fourth voltage signal, wherein the fourth voltage signal is the first voltage The delayed form of the signal, and the timing of the fourth voltage signal is later than the second voltage signal and the third voltage signal. 7. The display of claim 6, wherein the system is a notebook computer. 8. The display as claimed in claim 6, wherein the display panel is a liquid crystal display panel. 9. The display as claimed in claim 6, wherein the delay circuit is composed of a resistor and a capacitor. 10. The display as claimed in claim 6, wherein the display driver comprises a scan driver and a data driver. 11. A method for driving a display, wherein the display is used in conjunction with a system, and the display includes a display panel for displaying system data output by the system, the method for driving the display comprises: providing a logic voltage signal to the display, wherein the logic voltage signal is used to provide a voltage for logical operation of the display; The display is powered by the logic voltage signal to provide a first voltage signal, a second voltage signal and a third voltage signal, wherein the first voltage signal is used to provide an operating voltage when the pixels of the display panel are turned on, and the first voltage signal is used to provide an operating voltage when the pixels of the display panel are turned on. The second voltage signal is used to turn on the pixels of the display panel, and the third voltage signal is used to turn off the pixels of the display panel; Delaying the first voltage signal to generate a fourth voltage signal, wherein the fourth voltage signal is a delayed form of the first voltage signal, and the timing of the fourth voltage signal is later than the second voltage signal and the third voltage signal signal; and The display panel is driven by the second voltage signal, the third voltage signal and the fourth voltage signal. 12. The driving method of a display according to claim 11, wherein the system is a notebook computer. 13. The driving method of a display according to claim 11, wherein the display panel is a liquid crystal display panel.

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