CN100585820C - Packaging method and packaging structure of light emitting diode with high-efficiency light emitting effect - Google Patents
Packaging method and packaging structure of light emitting diode with high-efficiency light emitting effect Download PDFInfo
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- CN100585820C CN100585820C CN200710106136A CN200710106136A CN100585820C CN 100585820 C CN100585820 C CN 100585820C CN 200710106136 A CN200710106136 A CN 200710106136A CN 200710106136 A CN200710106136 A CN 200710106136A CN 100585820 C CN100585820 C CN 100585820C
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- 238000004806 packaging method and process Methods 0.000 title claims abstract 42
- 238000000034 method Methods 0.000 title claims description 51
- 230000000694 effects Effects 0.000 title claims description 48
- 239000000758 substrate Substances 0.000 claims abstract description 91
- 239000000084 colloidal system Substances 0.000 claims abstract description 73
- 239000008393 encapsulating agent Substances 0.000 claims abstract 20
- 238000005538 encapsulation Methods 0.000 claims description 25
- 230000003287 optical effect Effects 0.000 claims description 19
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 239000000843 powder Substances 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 239000000741 silica gel Substances 0.000 claims description 3
- 229910002027 silica gel Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims 4
- 239000000203 mixture Substances 0.000 claims 3
- 229910000679 solder Inorganic materials 0.000 claims 2
- 238000012856 packing Methods 0.000 description 56
- 238000005516 engineering process Methods 0.000 description 5
- 238000010276 construction Methods 0.000 description 4
- 230000008034 disappearance Effects 0.000 description 3
- 238000007323 disproportionation reaction Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention discloses a light emitting diode packaging structure, which comprises: a substrate unit , a light-emitting unit (light-emitting unit), and a package colloid unit (package colloid unit). The substrate unit has a substrate body (substrate body), and a positive electrode conductive trace (positive electrode trace) and a negative electrode conductive trace (negative electrode trace) formed on the substrate body, respectively. The light emitting unit has a plurality of light emitting diode chips (LED chips) disposed on the substrate body, wherein each LED chip has a positive electrode end (positive electrode side) and a negative electrode end (negative electrode side) electrically connected to the positive and negative electrode conductive traces of the substrate unit, respectively. The encapsulant unit has a plurality of encapsulant (packages) respectively covering the led chips.
Description
Technical field
The present invention relates to a kind of method for packing and encapsulating structure thereof of light-emitting diode chip for backlight unit, refer to a kind of LED encapsulation method and encapsulating structure thereof of tool high efficiency light-emitting effect especially.
Background technology
See also shown in Figure 1ly, it is the flow chart of first kind of method for packing of known light-emitting diode.By in the flow chart as can be known, first kind of method for packing of known light-emitting diode, its step comprises: at first, provide light-emitting diode (packaged LED) that a plurality of encapsulation finish (S800); Then, provide a strip substrate body (stripped substrate body), have a positive conductive traces (positive electrodetrace) and a negative pole conductive traces (negative electrode trace) on it (S802); At last, the light-emitting diode that each encapsulation is finished (packaged LED) is arranged on this strip substrate body in regular turn, and the positive and negative positive and negative electrode conductive traces (S804) that extremely is electrically connected at this strip substrate body respectively of the light-emitting diode (packaged LED) that each encapsulation is finished.
See also shown in Figure 2ly, it is the flow chart of second kind of method for packing of known light-emitting diode.By in the flow chart as can be known, second kind of method for packing of known light-emitting diode, its step comprises: at first, one strip substrate body (stripped substrate body) is provided, has a positive conductive traces (positiveelectrode trace) and a negative pole conductive traces (negative electrode trace) on it (S900); Then, in regular turn a plurality of light-emitting diode chip for backlight unit (LED chip) are arranged on this strip substrate body, and with the positive and negative positive and negative electrode conductive traces (S902) that extremely is electrically connected at this strip substrate body respectively of each light-emitting diode chip for backlight unit; At last, (stripped package colloid) is covered on this strip substrate body and these light-emitting diode chip for backlight unit with a strip packing colloid, to form an optical wand (light bar) that has a strip light-emitting zone (stripped light-emitting area) (S904).
Yet, first kind of method for packing about above-mentioned known light-emitting diode, because the light-emitting diode (packaged LED) that each encapsulation is finished must cut down from a monoblock LED package earlier, and then with surface mount technology (SMT) operation, the light-emitting diode (packagedLED) that each encapsulation is finished is arranged on this strip substrate body, therefore can't effectively shorten its activity time, moreover, when luminous, have blanking bar (dark band) phenomenon between the light-emitting diode that these encapsulation are finished (packaged LED) and exist, still produce not good effect for user's sight line.
In addition, about second kind of method for packing of above-mentioned known light-emitting diode, because the optical wand of being finished has the strip light-emitting zone, therefore second kind of method for packing will can not produce the problem of blanking bar (dark band).Yet, because the zone that this strip packing colloid (stripped package colloid) is excited is uneven, thereby the optical efficiency that causes optical wand not good (that is, can produce stronger excitation source near the packing colloid of light-emitting diode chip for backlight unit zone, then produce more weak excitation source) away from the packing colloid zone of light-emitting diode chip for backlight unit.
As from the foregoing, known light emitter diode seal method and encapsulating structure thereof obviously has inconvenience and exists with disappearance, and wait to be improved at present.
Therefore, can the improving of the above-mentioned disappearance of inventor's thoughts, and according to the correlation experience of being engaged in for many years in this respect, the concentrated observation and research, and cooperate the utilization of scientific principle, and propose a kind of reasonable in design and effectively improve the present invention of above-mentioned disappearance.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of LED encapsulation method and encapsulating structure thereof of tool high efficiency light-emitting effect.Light emitting diode construction of the present invention is when luminous, form a continuous light-emitting zone, and the situation of not having brightness disproportionation takes place, and the present invention adopts through chip and directly encapsulates (ChipOn Board, COB) operation and utilize the mode of pressing mold (die mold), so that the present invention can shorten its activity time effectively, and can produce in a large number.Moreover structural design of the present invention more is applicable to various light sources, such as application such as backlight module, Decorating lamp strip, illuminator lamp or scanner light sources, is all applied scope of the present invention and product.
In order to solve the problems of the technologies described above, according to wherein a kind of scheme of the present invention, a kind of light emitter diode seal method of tool high efficiency light-emitting effect is provided, it comprises the following steps: at first, one base board unit (substrate unit) is provided, and it has a substrate body (substrate body), reaches the positive conductive traces (positive electrode trace) and a negative pole conductive traces (negative electrode trace) that are formed at respectively on this substrate body; Then, see through the mode of matrix (matrix), a plurality of light-emitting diode chip for backlight unit (LED chip) are set respectively on this substrate body, to form many vertical light-emitting diode chip for backlight unit rows of row (longitudinal LED chip row), wherein each light-emitting diode chip for backlight unit has a positive terminal (positive electrode side) and a negative pole end (negative electrode side) of the positive and negative electrode conductive traces that is electrically connected at this base board unit respectively; Then, see through one first die unit (first mold unit), will many strip packing colloids (stripped package colloid) respectively longitudinally (longitudinally) cover each and arrange vertical light-emitting diode chip for backlight unit and arrange on (longitudinal LED chip row).
At last, the present invention has three kinds of follow-up enforcement aspects:
First kind of aspect: between per two vertical light-emitting diode chip for backlight unit, laterally (transversely) cuts these strip packing colloids (stripped package colloid) and this substrate body, to form many optical wands (light bar), wherein each bar optical wand has a plurality of packing colloids (package colloid) that are covered in apart from each other on each light-emitting diode chip for backlight unit.
Second kind of aspect: between per two vertical light-emitting diode chip for backlight unit, laterally (transversely) cuts these strip packing colloids (stripped package colloid), to form a plurality of packing colloids (package colloid) that are covered in apart from each other on each light-emitting diode chip for backlight unit; Then, see through one second die unit (second mold unit), be covered in a frame unit (frame unit) on this substrate body and be filled between these packing colloids; At last, between per two vertical light-emitting diode chip for backlight unit, laterally (transversely) cuts this frame unit and this substrate body, forming many optical wands (light bar), and make this frame unit be cut into a plurality of coat respectively all packing colloids on each bar optical wand around ccf layers.
The third aspect: between per two vertical light-emitting diode chip for backlight unit, laterally (transversely) cuts these strip packing colloids (stripped package colloid), to form a plurality of packing colloids (package colloid) that are covered in apart from each other on each light-emitting diode chip for backlight unit; Then, see through one the 3rd die unit (third mold unit), be covered in many strip ccf layers (stripped frame layer) on this substrate body and longitudinally be filled between each packing colloid; At last, between per two vertical light-emitting diode chip for backlight unit, laterally (transversely) cuts these strip framework layers (strippedframe layer) and this substrate body, forming many optical wands (light bar), and make these strip framework layers (stripped frame layer) be cut into a plurality of frameworks (frame body) that coat respectively around each packing colloid.
In order to solve the problems of the technologies described above, according to wherein a kind of scheme of the present invention, a kind of package structure for LED of tool high efficiency light-emitting effect is provided, and it comprises: a base board unit (substrate unit), a luminescence unit (light-emitting unit), an and packing colloid unit (package colloid unit).
Wherein, this base board unit has a substrate body (substrate body), reaches the positive conductive traces (positive electrode trace) and a negative pole conductive traces (negative electrode trace) that are formed at respectively on this substrate body.This luminescence unit has a plurality of light-emitting diode chip for backlight unit (LED chip) that are arranged on this substrate body, and wherein each light-emitting diode chip for backlight unit has a positive terminal (positive electrode side) and a negative pole end (negative electrode side) of the positive and negative electrode conductive traces that is electrically connected at this base board unit respectively.This packing colloid unit has a plurality of packing colloids (package colloid) that are covered in respectively on these light-emitting diode chip for backlight unit.
In addition, LED encapsulation construction of the present invention can further comprise two kinds of structures of example down:
First kind: a frame unit (frame unit), it is covered on this substrate body for one deck and coats each packing colloid ccf layer (frame layer) all around, to expose the upper surface of each packing colloid.
Second kind: a frame unit (frame unit), it has a plurality of frameworks (frame body) that center on these packing colloids respectively, to expose the upper surface of each packing colloid respectively, wherein these frameworks are that ground separated from one another (separately) is arranged on this substrate body.
Therefore, light emitting diode construction of the present invention forms a continuous light-emitting zone when luminous, and does not have the situation generation of brightness disproportionation.And the present invention adopt to see through chip and encapsulates directly that (Chip On Board, COB) operation and utilize the mode of pressing mold (die mold) so that the present invention can shorten its activity time effectively, and can be produced in a large number.
Reach technology, means and the effect that predetermined purpose is taked in order further to understand the present invention, see also following about detailed description of the present invention and accompanying drawing, believe purpose of the present invention, feature and characteristics, go deep into and concrete understanding when getting one thus, yet the accompanying drawing that is provided only provides reference and explanation usefulness, is not to be used for the present invention is limited.
Description of drawings
Fig. 1 is the flow chart of first kind of method for packing of known light-emitting diode;
Fig. 2 is the flow chart of second kind of method for packing of known light-emitting diode;
Fig. 3 is the flow chart of first embodiment of method for packing of the present invention;
Fig. 3 a to Fig. 3 d is respectively the encapsulation flow process schematic perspective view of first embodiment of encapsulating structure of the present invention;
Fig. 3 A to Fig. 3 D is respectively the encapsulation flow process generalized section of first embodiment of encapsulating structure of the present invention;
Fig. 4 reaches the schematic diagram of electric connection for light-emitting diode chip for backlight unit of the present invention sees through the mode of covering crystalline substance (flip-chip);
Fig. 5 is the flow chart of second embodiment of method for packing of the present invention;
Fig. 5 a to Fig. 5 c is respectively the part encapsulation flow process schematic perspective view of second embodiment of encapsulating structure of the present invention;
Fig. 5 A to Fig. 5 C is respectively the part encapsulation flow process generalized section of second embodiment of encapsulating structure of the present invention;
Fig. 6 is the flow chart of the 3rd embodiment of method for packing of the present invention;
Fig. 6 a to Fig. 6 b is respectively the part encapsulation flow process schematic perspective view of the 3rd embodiment of encapsulating structure of the present invention; And
Fig. 6 A to Fig. 6 B is respectively the part encapsulation flow process generalized section of the 3rd embodiment of encapsulating structure of the present invention.
Wherein, Reference numeral is:
Base board unit 1 substrate body 10
Positive conductive traces 11
Negative pole conductive traces 12
This base board unit 1 ' positive conductive traces 11 '
Negative pole conductive traces 12 '
Vertically light-emitting diode chip for backlight unit is arranged 2 light-emitting diode chip for backlight unit 20
Light-emitting diode chip for backlight unit 20 '
Positive terminal 201 '
Negative pole end 202 '
Strip packing colloid 3 packing colloids 30
Packing colloid 30 '
Strip framework layer 4 ' framework 40 '
Lead W
Tin ball B
The first die unit M1, the first mold M11
First passage M110
The first bed die M12
The second die unit M2, the second mold M21
Second channel M210
The second bed die M22
The 3rd die unit M3 the 3rd mold M31
Third channel M310
The 3rd bed die M32
Optical wand L1
Optical wand L2
Optical wand L3
Embodiment
See also Fig. 3, Fig. 3 a to Fig. 3 d, reach shown in Fig. 3 A to Fig. 3 D.Fig. 3 is the flow chart of first embodiment of method for packing of the present invention, Fig. 3 a to Fig. 3 d is respectively the encapsulation schematic flow sheet of first embodiment of encapsulating structure of the present invention, and Fig. 3 A to Fig. 3 D is respectively the encapsulation flow process generalized section of first embodiment of encapsulating structure of the present invention.By the flow chart of Fig. 3 as can be known, the first embodiment of the present invention provides a kind of method for packing of light-emitting diode of tool high efficiency light-emitting effect, and it comprises the following steps:
At first, please cooperate shown in Fig. 3 a and Fig. 3 A, one base board unit (substrate unit) 1 is provided, and it has a substrate body (substrate body) 10, reaches a plurality of positive conductive traces (positive electrode trace) 11 and a plurality of negative pole conductive traces (negativeelectrode trace) 12 (S100) that are formed at respectively on this substrate body 10.Wherein, according to different design requirements, this base board unit 10 can be a printed circuit board (PCB) (PCB), a soft base plate (flexible substrate), an aluminium base (aluminumsubstrate), a ceramic substrate (ceramic substrate) or a copper base (copper substrate).In addition, this positive and negative electrode conductive traces 11,12 can adopt aluminum steel road (aluminum circuit) or silver-colored circuit (silver circuit), and the layout (layout) of this positive and negative electrode conductive traces 11,12 can change to some extent along with different needs.
Then, please cooperate shown in Fig. 3 b and Fig. 3 B, see through the mode of matrix (matrix), a plurality of light-emitting diode chip for backlight unit (LED chip) 20 are set respectively on this substrate body 10, to form the vertical light-emitting diode chip for backlight unit row of many rows (longitudinal LED chip row) 2, wherein each light-emitting diode chip for backlight unit 20 has a positive terminal (positive electrode side) 201 and one negative pole end (negative electrode side) 202 (S102) of the positive and negative electrode conductive traces 11,12 that is electrically connected at this base board unit respectively.
In addition, with the first embodiment of the present invention, each light-emitting diode chip for backlight unit 20 positive and negative extreme the 201, the 202nd sees through two corresponding lead W and in the mode of routing (wire-bounding), produces with the positive and negative electrode conductive traces 11,12 with this base board unit 1 to electrically connect.Moreover, each arranges vertical light-emitting diode chip for backlight unit row (longitudinal LED chip row) the 2nd, be arranged on the substrate body 10 of this base board unit 1 with the arrangement mode of a straight line, and each light-emitting diode chip for backlight unit 20 can be a blue led chips (blue LED).
Certainly, the electric connection mode of above-mentioned these light-emitting diode chip for backlight unit 20 is not in order to limit the present invention, for example: see also (light-emitting diode chip for backlight unit of the present invention sees through the mode of covering crystalline substance and reaches the schematic diagram of electric connection) shown in Figure 4, each light-emitting diode chip for backlight unit 20 ' positive and negative extreme 201 ', 202 ' be to see through a plurality of corresponding tin ball B and covering the mode of crystalline substance (flip-chip), with this base board unit 1 ' positive and negative electrode conductive traces 11 ', 12 ' produce and electrically connect.In addition, according to different design requirements, these light-emitting diode chip for backlight unit (figure do not show) positive and negative extremely be can connect (parallel), mode that (serial) in parallel or series connection add parallel connection (parallel/serial), produce with positive and negative electrode conductive traces and to electrically connect with this base board unit (figure does not show).
Then, please cooperate shown in Fig. 3 c and Fig. 3 C, see through one first die unit (first mold unit) M1, will many strip packing colloids (stripped package colloid) 3 respectively longitudinally (longitudinally) cover each and arrange vertical light-emitting diode chip for backlight unit and arrange on (the longitudinal LED chiprow) 2 (S104).
Wherein, this first die unit M 1 is made up of first bed die (the first lower mold) M 12 that one first mold (first upper mold) M 11 and is used to carry this substrate body 10, and this first mold M 11 is first passage (first channel) M 110 with many corresponding these vertical light-emitting diode chip for backlight unit row (longitudinal LED chip row) 2.
In addition, the height of these first passages M110 and width are identical with the height and the width of these strip packing colloids (strippedpackage colloid) 3.Moreover, each bar strip packing colloid (strippedpackage colloid) 3 can be according to different user demands, and are chosen as: mixed the fluorescent colloid (fluorescent resin) that forms with a fluorescent material (fluorescent powder) or mixed the fluorescent colloid (fluorescent resin) that forms by an epoxy resin (epoxy) with a fluorescent material (fluorescent powder) by a silica gel (silicon).
At last, please consult Fig. 3 c again, and cooperate shown in Fig. 3 d and Fig. 3 D, between per two vertical light-emitting diode chip for backlight unit 20, laterally (transversely) cuts these strip packing colloids (strippedpackage colloid) 3 and this substrate body 10, to form many optical wands (light bar) L1, wherein each bar optical wand L1 has a plurality of packing colloid (package colloid) 30 (S106) that are covered in apart from each other on each light-emitting diode chip for backlight unit 20.
See also Fig. 5, Fig. 5 a to Fig. 5 c, reach shown in Fig. 5 A to Fig. 5 C.Fig. 5 is the flow chart of second embodiment of method for packing of the present invention, Fig. 5 a to Fig. 5 c is respectively the part encapsulation schematic flow sheet of second embodiment of encapsulating structure of the present invention, and Fig. 5 A to Fig. 5 C is respectively the part encapsulation flow process generalized section of second embodiment of encapsulating structure of the present invention.By the flow chart of Fig. 5 as can be known, the step S200 to S204 of second embodiment step S100 to S104 with first embodiment respectively is identical.That is step S200 is equal to Fig. 3 a of first embodiment and the schematic view illustrating of Fig. 3 A; Step S202 is equal to Fig. 3 b of first embodiment and the schematic view illustrating of Fig. 3 B; Step S204 is equal to Fig. 3 c of first embodiment and the schematic view illustrating of Fig. 3 C.
Moreover, after step S204, the second embodiment of the present invention further comprises: at first, see also shown in Fig. 5 a and Fig. 5 A, between per two vertical light-emitting diode chip for backlight unit 20, laterally (transversely) cuts these strip packing colloids (stripped package colloid) 3, to form a plurality of packing colloids (package colloid) 30 ' (S206) that are covered in apart from each other on each light-emitting diode chip for backlight unit 20.
Then, see also shown in Fig. 5 b and Fig. 5 B, see through one second die unit (second mold unit) M2, be covered in a frame unit (frame unit) 4 on this substrate body 10 and be filled in these packing colloids 30 ' between (S208).Wherein, this second die unit M2 is made up of second bed die (second lowermold) M22 that one second mold (secondupper mold) M21 and is used to carry this substrate body 10, and this second mold M21 has second channel (second channel) M210 of corresponding this frame unit 4, in addition the height of this second channel M210 and these packing colloids (package colloid) 30 ' height identical, and the width of this second channel M210 is identical with the width of this frame unit 4.
At last, please consult Fig. 5 b again, and cooperate shown in Fig. 5 c and Fig. 5 C, between per two vertical light-emitting diode chip for backlight unit 20, laterally (transversely) cuts this frame unit 4 and this substrate body 10, forming many optical wands (light bar) L2, and make this frame unit 4 be cut into a plurality of coat respectively all packing colloids 30 on each bar optical wand L2 ' around ccf layer 40 (S210).Wherein, these ccf layers 40 can be light tight ccf layer (opaque frame layer), for example: white box rack-layer (white frame layer).
See also Fig. 6, Fig. 6 a Fig. 6 b, reach shown in Fig. 6 A to Fig. 6 B.Fig. 6 is the flow chart of the 3rd embodiment of method for packing of the present invention, Fig. 6 a to Fig. 6 b is respectively the part encapsulation schematic flow sheet of the 3rd embodiment of encapsulating structure of the present invention, and Fig. 6 A to Fig. 6 B is respectively the part encapsulation flow process generalized section of the 3rd embodiment of encapsulating structure of the present invention.By the flow chart of Fig. 6 as can be known, the step S300 to S304 of the 3rd embodiment step S100 to S104 with first embodiment respectively is identical, and the step S306 of the 3rd embodiment the step S206 with second embodiment is identical respectively.That is step S300 is equal to Fig. 3 a of first embodiment and the schematic view illustrating of Fig. 3 A; Step S302 is equal to Fig. 3 b of first embodiment and the schematic view illustrating of Fig. 3 B; Step S304 is equal to Fig. 3 c of first embodiment and the schematic view illustrating of Fig. 3 C; Step S306 is equal to Fig. 5 a of second embodiment and the schematic view illustrating of Fig. 5 A.
Moreover, after step S306, the third embodiment of the present invention further comprises: at first, see also shown in Fig. 6 a and Fig. 6 A, see through one the 3rd die unit (third mold unit) M3, with many strip ccf layers (stripped frame layer) 4 ' be covered on this substrate body 10 and longitudinally be filled in each packing colloid 30 ' between (S308).
Wherein, the 3rd die unit M3 is made up of the 3rd bed die (the third lower mold) M32 that one the 3rd mold (third uppermold) M31 and is used to carry this substrate body 10, and the 3rd mold M31 has third channel (third channel) M310 of many corresponding these vertical light-emitting diode chip for backlight unit row (longitudinalLED chip row) 2, and the height of this third channel M310 be with these packing colloids (package colloid) 30 ' height identical, and the width of this third channel M310 greater than each packing colloid 30 ' width.
At last, please consult Fig. 6 a again, and cooperate shown in Fig. 6 b and Fig. 6 B, between per two vertical light-emitting diode chip for backlight unit 20, laterally (transversely) cuts these strip framework layers (stripped framelayer) 4 ' and this substrate body 10, forming many optical wands (light bar) L 3, and make a plurality of frameworks (frame body) 40 ' (S310) that coat each packing colloid 30 ' all around respectively of these strip framework layers (stripped frame layer) 4 ' be cut into.Wherein, these frameworks 40 ' can be light tight framework (opaque frame body), for example: white framework (white frame body).
In sum, light emitting diode construction of the present invention is when luminous, form a continuous light-emitting zone, and the situation of not having brightness disproportionation takes place, and the present invention adopts through chip and directly encapsulates (Chip On Board, COB) operation and utilize the mode of pressing mold (die mold), so that the present invention can shorten its activity time effectively, and can produce in a large number, moreover, structural design of the present invention more is applicable to various light sources, such as backlight module, Decorating lamp strip, illuminator lamp, or application such as scanner light source, be all applied scope of the present invention and product.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (35)
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| CN104143548A (en) * | 2014-08-15 | 2014-11-12 | 刘镇 | Crystal covering type LED lamp |
| CN105163488B (en) * | 2015-08-31 | 2018-03-30 | 苏州斯尔特微电子有限公司 | A kind of ceramic circuit board |
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| JP2006295084A (en) * | 2005-04-14 | 2006-10-26 | Citizen Electronics Co Ltd | Package structure of light emitting diode |
| CN1855481A (en) * | 2005-04-21 | 2006-11-01 | C.R.F.阿西安尼顾问公司 | Transparent LED display and method for manufacture thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2006295084A (en) * | 2005-04-14 | 2006-10-26 | Citizen Electronics Co Ltd | Package structure of light emitting diode |
| CN1855481A (en) * | 2005-04-21 | 2006-11-01 | C.R.F.阿西安尼顾问公司 | Transparent LED display and method for manufacture thereof |
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