CN101197958B - A demapping device and its method in a digital TV terrestrial system - Google Patents

Abstract

The invention provides a demapping device and its method in a digital TV terrestrial system. According to the five constellation mapping modes of 4QAM, 4QAM-NR, 16QAM, 32QAM, and 64QAM in the digital TV terrestrial broadcasting transmission standard, the receiver uses the logic law between the constellation symbol and the information bit to demap the information bit to obtain each mode Then, according to the current QAM mapping mode restored by the front end of the receiver, the corresponding demapped bit output is extracted from the demapped bit set. The main advantages of the device and method provided by the present invention are: it can perform demapping supporting all modes of the national standard, can greatly save hardware resources, and simultaneously improve the processing speed of the system.

Description

A demapping device and its method in a digital TV terrestrial system

technical field

The invention belongs to the technical field of digital TV broadcasting, and in particular relates to a receiver processing technology in a digital TV terrestrial transmission system, in particular to a demapping device and a method thereof in a digital TV system.

Background technique

As the main component of the radio and television system, the digital TV terrestrial broadcasting system, together with the digital TV satellite broadcasting system, digital TV cable broadcasting system and other auxiliary systems, constitutes a comprehensive broadcasting coverage network in my country. The digital TV terrestrial broadcasting transmission system not only has the basic functions of supporting traditional digital TV broadcasting services, but also has scalable functions to adapt to broadcasting TV services, that is, it supports both fixed (including indoor and outdoor) reception and mobile reception modes. In the fixed receiving mode, it can provide standard-definition digital television services, high-definition digital television services, digital audio broadcasting services, multimedia broadcasting, and data service services. In the mobile receiving mode, it can provide standard-definition digital television services, digital audio broadcasting services, multimedia broadcasting, and data service services. Due to the mixed mode of multiple services and the diversity of networking environments, the digital TV terrestrial broadcasting system has a high degree of matching and flexibility between business characteristics and transmission modes. Therefore, China's digital TV terrestrial broadcasting system transmission standard supports multiple constellation mapping modes, namely 4QAM, 4QAM-NR, 16QAM, 32QAM, 64QAM.

Quadrature Amplitude Modulation (QAM for short) is characterized by high modulation efficiency and can greatly improve spectrum utilization. For the multiple mapping modes required by China's digital TV terrestrial broadcasting system transmission standards, using the look-up table method used in the current receiver implementation as the de-mapping method increases the complexity of the design and consumes a lot of hardware resources in the implementation, which is not conducive to The miniaturization of the receiver and the processing speed of the system are limited.

Contents of the invention

The present invention utilizes the law between constellation symbols and information bits in multi-mode mapping, fully utilizes the design idea of System on Chip (SoC for short), and proposes a system that supports 4QAM, 4QAM-NR, 16QAM, 32QAM, 64QAM The demapping algorithm of multi-mapping mode not only greatly saves hardware resources, but also improves the operation speed significantly.

The object of the present invention is to provide a demapping device and its method in the digital TV terrestrial system. The device and its method support multiple mapping modes in the Chinese digital TV terrestrial transmission standard, occupy less resources and have a fast system speed.

The invention provides a demapping device in a digital TV terrestrial system, which is composed of a symbol converter between quadrants, a mapper between symbols and bits, and a bit selector. Wherein, the in-phase symbol I and the quadrature symbol Q are connected to the input of the symbol converter between the quadrants, the output of the symbol converter between the quadrants is connected to the input of the mapper between symbols and bits, and the output of the mapper between symbols and bits Connected to one input of the bit selector, the current QAM mapping mode is connected to the other input of the bit selector, and the output of the bit selector is output as the final demapped bit.

The symbol converter between the quadrants completes the conversion between the in-phase symbol I and the quadrature symbol Q received by the receiver and the first quadrant of the constellation, thereby forming the functions of the symbols II and QQ of the first quadrant;

The mapper between the symbols and bits completes the in-phase symbol II and the quadrature symbol QQ converted to the first quadrant, according to the symbols in the constellation of 4QAM, 4QAM-NR, 16QAM, 32QAM, and 64QAM mapping modes and the demapped Logical expressions between information bits are demapped to corresponding information bits to form a function of demapping bit sets.

The bit selector completes the function of extracting corresponding bits from the output demapping bit set of the mapper between symbols and bits according to the current QAM mapping mode to form a demapping bit output:

(1) When the 4QAM, 16QAM, 32QAM or 64QAM mapping mode is used, the corresponding bit is extracted to form a demapping bit output;

(2) When the 4QAM-NR mapping mode is used, corresponding bits are extracted, and after passing through a 16-bit to 8-bit NR decoder, a demapped bit output is formed.

A method for demapping in a digital television terrestrial system provided by the invention, the method comprises the following steps:

(1) Convert the in-phase symbol I and the quadrature symbol Q received by the receiver to the constellation quadrant and the first quadrant, so that the input symbols become symbols II and QQ of the first quadrant;

(2) Demap the II and QQ symbols converted to the first quadrant to the corresponding information bits to form a set of unmapped bits;

(3) According to the current QAM mapping mode, select corresponding bits from the demapping bit set obtained in the second step to form a demapping bit output.

The present invention supports all mapping modes in the national standard for digital TV terrestrial broadcast transmission, and the advantages of the device and its method are:

(1) Provides an integrated module to support multi-mode demapping, realizes resource reuse to the greatest extent, and makes full use of the logic law between constellation symbols and information bits, thereby greatly saving hardware resources;

(2) The processing speed of the system has been significantly improved.

Description of drawings

Fig. 1 is the functional block diagram of demapping device among the present invention;

Fig. 2 is the symbol converter circuit between the quadrants of demapping device among the present invention;

Fig. 3 is the mapper circuit between the sign and the bit of demapping device among the present invention;

Fig. 4 is the bit selector circuit of demapping device among the present invention;

Fig. 5 is the NR decoder circuit of demapping device in the present invention;

Fig. 6 is the flowchart of demapping method in the present invention;

Fig. 7 is a 4QAM constellation map in the present invention;

FIG. 8 is a 16QAM constellation mapping diagram in the present invention;

FIG. 9 is a 32QAM constellation mapping diagram in the present invention;

FIG. 10 is a 64QAM constellation mapping diagram in the present invention;

Fig. 11A is the Karnaugh diagram of the logical relationship between b1 and I, Q symbols in 4QAM demapping in the present invention;

Fig. 11B is the Karnaugh diagram of the logical relationship between b0 and I, Q symbols in 4QAM demapping in the present invention;

Fig. 12A is the Karnaugh diagram of the logical relationship between b3 and I, Q symbols in 16QAM demapping in the present invention;

Fig. 12B is the Karnaugh diagram of the logical relationship between b2 and I, Q symbols in 16QAM demapping in the present invention;

FIG. 12C is a Karnaugh diagram of the logical relationship between b1 and I and Q symbols in 16QAM demapping in the present invention;

FIG. 12D is a Karnaugh diagram of the logical relationship between b0 and I and Q symbols in 16QAM demapping in the present invention;

Fig. 13A is the Karnaugh diagram of the logical relationship between b4 and I, Q symbols in 32QAM demapping in the present invention;

Fig. 13B is the Karnaugh diagram of the logical relationship between b3 and I, Q symbols in 32QAM demapping in the present invention;

Fig. 13C is a Karnaugh diagram of the logical relationship between b2 and I, Q symbols in 32QAM demapping in the present invention;

Figure 13D is a Karnaugh diagram of the logical relationship between b1 and I, Q symbols in 32QAM demapping in the present invention;

Figure 13E is a Karnaugh diagram of the logical relationship between b0 and I, Q symbols in 32QAM demapping in the present invention;

Fig. 14A is the Karnaugh diagram of the logical relationship between b5 and I, Q symbols in 64QAM demapping in the present invention;

Fig. 14B is the Karnaugh diagram of the logical relationship between b4 and I, Q symbols in the 64QAM demapping in the present invention;

FIG. 14C is a Karnaugh diagram of the logical relationship between b3 and I and Q symbols in 64QAM demapping in the present invention;

FIG. 14D is a Karnaugh diagram of the logical relationship between b2 and I and Q symbols in 64QAM demapping in the present invention;

FIG. 14E is a Karnaugh diagram of the logical relationship between b1 and I and Q symbols in 64QAM demapping in the present invention;

FIG. 14F is a Karnaugh diagram of the logical relationship between b0 and I and Q symbols in 64QAM demapping in the present invention.

Detailed ways

The present invention will be further described in detail with reference to the accompanying drawings and embodiments.

As shown in FIG. 1 , a demapping device in a digital TV terrestrial system provided by the present invention is composed of a symbol converter 1 between quadrants, a mapper 2 between symbols and bits, and a bit selector 3 . The connection order of each module is: the in-phase symbol I and the quadrature symbol Q are used as the input of the symbol converter 1 between the quadrants, and the output of the symbol converter 1 between the quadrants is connected to the input of the mapper 2 between symbols and bits, and the symbols and bits The output of the inter-mapper 2 is connected to one input of the bit selector 3, the current QAM mapping mode is connected to the other input of the bit selector 3, and the output of the bit selector 3 is connected to the demapping bit output. Wherein, the symbol converter 1 between the quadrants completes the conversion function of the in-phase symbol I and the quadrature symbol Q road to the first quadrant symbols II and QQ; the mapper 2 between symbols and bits follows the symbol and The logical expression between the information bits after demapping, demaps the II and QQ symbols converted to the first quadrant to the corresponding information bits, thereby forming the function of the corresponding demapping bit set; bit selector 3 completes according to the current The QAM mapping mode extracts corresponding bits from the output demapping bit set of the mapper 2 between symbols and bits to form a function of demapping bit output.

The functions and specific implementation details of each module in Figure 1 are described as follows:

As shown in Figure 2, the sign converter 1 between the quadrants is composed of the first separator 4, the second separator 5, the seventh NOT gate 6, the eighth NOT gate 7, the first two-to-one selector 8, the second two Choose one selector 9 to form, and complete the conversion function of I, Q road symbols to the first quadrant symbols II, QQ. The in-phase symbol I and the quadrature symbol Q are respectively expressed in 3-bit complement code form. The effective bits of I and Q corresponding to different QAM mapping modes are shown in Table 1, where I2 and Q2 always represent the sign bits of I and Q channels. The in-phase symbol of the first quadrant is represented as II=II2II1II0, and the quadrature symbol is represented as QQ=QQ2QQ 1QQ0.

The working process of the sign converter 1 between quadrants is: when the highest sign bit of the in-phase sign (or quadrature sign) is '1', the low-significant bit of the in-phase sign (or quadrature sign) is inverted; When the most significant sign bit of the sign (or quadrature sign) is '0', no operation is performed on the least significant bit of the in-phase sign (or quadrature sign).

Table 1

The specific implementation details of the sign converter 1 between quadrants are:

The input of the first splitter 4 is the in-phase signal I, and the output is I2 and I1I0, and the output I2 of the first splitter 4 is connected to the control terminal 8d of the first two-selector 8; the input of the seventh NOT gate 6 is connected To the output I1I0 of the first splitter 4, the output of the seventh NOT gate 6 is connected to an input terminal 8b of the first two-to-one selector 8; the other input terminal 8c of the first two-to-one selector 8 is connected to the first two-to-one selector 8 The output I1I0 of a separator 4, the output terminal 8a of the first two-selector 8 is connected to the output II1II0 of the sign converter 1; the output I2 of the first separator 4 is connected to the output II2 of the sign converter 1. When the control terminal 8d of the first one-two selector 8 was high level, the input terminal 8b of the first one-two selector 8 was connected with the output terminal 8a of the first one-two selector 8; When the control terminal 8d of the one-to-one selector 8 is at low level, the input terminal 8c of the first one-to-two selector 8 is connected to the output terminal 8a of the first one-to-two selector 8 .

The input of the second splitter 5 is the quadrature signal Q, and the output is Q2 and Q1Q0, and the output Q2 of the second splitter 5 is connected to the control terminal 9d of the second selector 9; the input of the eighth NOT gate 7 is connected to To the output Q1Q0 of the second splitter 5, the output of the eighth NOT gate 7 is connected to an input terminal 9b of the second one-two selector 9; the other input terminal 9c of the second one-two selector 9 is connected to the second one-two selector 9 The output QQ 1Q0 of two splitters 5, the output terminal 9a of the second second selector 9 is connected to the output QQ 1QQ0 of sign converter 1; The output Q2 of the second splitter 5 is connected to the output QQ2 of sign converter 1. When the control terminal 9d of the second one-two selector 9 was high level, the input terminal 9b of the second one-two selector 9 was connected with the output terminal 9a of the second one-two selector 9; When the control terminal 9d of the one-to-one selector 9 is at low level, the input terminal 9c of the second one-to-two selector 9 is connected to the output terminal 9a of the second one-to-two selector 9 .

As shown in Figure 3, the mapper 2 between symbols and bits is composed of a first NOT gate 10, a second NOT gate 13, a third NOT gate 17, a fourth NOT gate 19, a fifth NOT gate 20, and a sixth NOT gate 22. , the first XOR gate 16, the second XOR gate 18, the third XOR gate 21, the first AND gate 11, the second AND gate 14, the first OR gate 12, and the second OR gate 15, the completion will be composed of quadrants The first quadrant symbols II and QQ obtained by the symbol converter 1 are transformed into the corresponding function of demapping bit set d8d7d6d5d4d3d2d1d0. Wherein II=II2II1II0, QQ=QQ2QQ1QQ0.

The working process of the symbol-to-bit mapper 2 is as follows: according to the logical expression between the symbol and the corresponding demapped bit set in Table 4, the corresponding demapped bit set d8d7d6d5d4d3d2d1d0.

The specific implementation details of the mapper 2 between symbols and bits are:

The input of the first NOT gate 10 is the input II1 of the mapper 2 between symbols and bits, and the output of the first NOT gate 10 is connected to an input of the first AND gate 11; the other input of the first AND gate 11 is a sign AND The input QQ0 of the mapper 2 between bits, the output of the first AND gate 11 is connected to an input of the first OR gate 12; the other input of the first OR gate 12 is the input QQ1 of the mapper 2 between symbols and bits, The output of the first OR gate 12 is connected to the output d8 of the mapper 2 between symbols and bits;

The input of the second NOT gate 13 is the input QQ0 of the mapper 2 between symbols and bits, and the output of the second NOT gate 13 is connected to an input of the second AND gate 14; the other input of the second AND gate 14 is a sign AND The input II1 of the mapper 2 between bits, the output of the second AND gate 14 is connected to an input of the second OR gate 15; the other input of the second OR gate 15 is the input II0 of the mapper 2 between symbols and bits, The output of the second OR gate 15 is connected to the output d7 of the mapper 2 between symbols and bits;

An input of the first XOR gate 16 is the input II1 of the mapper 2 between symbols and bits, and another input of the first XOR gate 16 is the input QQ1 of the mapper 2 between symbols and bits, and the first XOR gate The output of 16 is the output d6 of the mapper 2 between symbols and bits;

The input of the third NOT gate 17 is the input II2 of the mapper 2 between symbols and bits, and the output of the third NOT gate 17 is the output d5 of the mapper 2 between symbols and bits;

An input of the second exclusive OR gate 18 is the input II0 of the mapper 2 between the symbol and the bit, and the other input of the second exclusive OR gate 18 is the input II1 of the mapper 2 between the symbol and the bit, and the second exclusive OR gate The output of 18 is the output d4 of the mapper 2 between symbols and bits;

The input of the fourth NOT gate 19 is the input II1 of the mapper 2 between symbols and bits, and the output of the fourth NOT gate 19 is the output d3 of the mapper 2 between symbols and bits;

The input of the fifth NOT gate 20 is the input QQ1 of the mapper 2 between symbols and bits, and the output of the fifth NOT gate 20 is the output d2 of the mapper 2 between symbols and bits;

One input of the third exclusive OR gate 21 is the input QQ0 of the mapper 2 between symbols and bits, and the other input of the third exclusive OR gate 21 is the input QQ1 of the mapper 2 between symbols and bits, and the third exclusive OR gate The output of 21 is the output d1 of the mapper 2 between symbols and bits;

The input of the sixth NOT gate 22 is the input QQ2 of the mapper 2 between symbols and bits, and the output of the sixth NOT gate 22 is the output d0 of the mapper 2 between symbols and bits.

As shown in FIG. 4 , the bit selector 3 is composed of a one-of-five selector 23 and an NR decoder 24, and completes the function of determining the mapping mode of the current symbol according to the system information, thereby forming the final demapping bit output function.

The working process of the bit selector 3 is: according to the corresponding relationship between the demapping bit set and the demapping bit output in Table 5, and according to the current QAM mapping mode, select the corresponding bit to form the demapping bit output.

The specific implementation details of the bit selector 3 are:

The output d0d5 of the mapper 2 between the symbol and the bit is connected to the input of the NR decoder 24, and the output of the NR decoder 24 is connected to the input 23b of the five-choice selector 23, and the mapper 2 between the symbol and the bit The output d0d5 is connected to the input 23a of the one-of-five selector 23, the output d0d2d5d3 of the mapper 2 between symbols and bits is connected to the input 23c of the one-to-five selector 23, and the output d6d0d7d5d8 of the mapper 2 between symbols and bits Be connected to the input end 23d of one of five selectors 23, the output d0d2d1d5d3d4 of the mapper 2 between symbols and bits is connected to the input end 23e of one of five selectors 23, and the output of one of five selectors 23 is bit selector 3 Output. Wherein, the working process of the one-of-five selector 23 is: when the current QAM mapping mode is 4QAM, the one-of-five selector 23 connects the input terminal 23a to the output of the bit selector 3; when the current QAM mapping mode is 4QAM-NR, One-of-five selector 23 is connected to the output of bit selector 3 with input end 23b; When the current QAM mapping mode is 16QAM, one-of-five selector 23 is connected to the output of bit selector 3 with input end 23c; Current QAM mapping mode When it is 32QAM, the one-of-five selector 23 connects the input end 23d to the output of the bit selector 3; when the current QAM mapping mode is 64QAM, the one-out selector 23 connects the input end 23e to the output of the bit selector 3.

As shown in FIG. 5 , the NR decoder 24 is composed of a controlled output device 25 and a modulo-8 counter 26 to complete the 16-bit to 8-bit NR decoding function. Wherein, modulo 8 counter 26 is the counter of modulo 8, and its output and the relation of internal counting state, see Table 2:

Table 2

The specific implementation details of NR decoder 24 are:

The input of the NR decoder 24 whose width is 2bit is connected to an input of the controlled output device 25, and the output of the modulo 8 counter 26 is connected to the other input of the controlled output device 25, and the output of the controlled output device 25 is used as NR The output of decoder 24. Wherein, when the output of the modulo 8 counter 26 was '1', the controlled output device 25 connected the input of the NR decoder 24 to the output of the NR decoder 24; when the output of the modulo 8 counter 26 was '0' , the controlled output device 25 outputs invalid data.

As shown in Figure 6, the demapping method in a kind of digital television terrestrial system provided by the present invention, the specific implementation steps are:

Step 1: Convert the in-phase symbol I and quadrature symbol Q received by the receiver to the constellation quadrant and the first quadrant, so that the input symbol becomes the first quadrant symbol. The specific operation is to convert the in-phase symbol and quadrature symbol The low-significant bit is converted between the complement code and the original code, that is, according to the difference between the highest sign bit of the in-phase symbol and the quadrature symbol, the low-significant bit of the in-phase symbol and the quadrature symbol is reversed. When the highest sign bit is When '1', the low-significant bit is inverted; when the highest sign bit is '0', the low-significant bit does not perform any operation.

The second step: establish the logical expressions between the symbols in the 4QAM, 4QAM-NR, 16QAM, 32QAM, and 64QAM mapping mode constellations and the demapped information bits, see Table 3 for details; considering that the bits between the multi-mapping modes can be Multiplexing, merging and simplifying the logical expressions of the same form under different mapping modes in Table 3, that is, only retaining one expression, eliminating repeated expressions, and obtaining symbols and demapped expressions in various mapping mode constellations See Table 4 for the simplest form of the logical expression between the information bits. According to Table 4, the symbols converted to the first quadrant are demapped to the demapped bit sets corresponding to various mapping modes. The derivation process of Table 3 and Table 4 is as follows:

Using the 4QAM mapping mode constellation shown in Figure 7 and the effective bit representations of the 4QAM in-phase symbols and orthogonal symbols in Table 1, the in-phase symbols, orthogonal symbols and demapped symbols shown in Figures 11A-11B can be established The Karnaugh map between the information bits b1b0, according to the Karnaugh map simplification method (that is, the minimum items with adjacency can be combined, and different factors can be eliminated to form the simplest form of the expression), so as to obtain the 4QAM mapping mode See Table 3 for the logical expression between the symbols of and the demapped information bits.

Using the 16QAM mapping mode constellation shown in Figure 8 and the effective bit representations of the 16QAM in-phase symbols and orthogonal symbols in Table 1, the in-phase symbols, orthogonal symbols and demapped symbols shown in Figures 12A-12D can be established The Karnaugh map between the information bits b3b2b1b0, according to the Karnaugh map simplification method, so as to obtain the logical expression between the symbols in the 16QAM mapping mode and the demapped information bits, see Table 3.

Using the 32QAM mapping mode constellation shown in Figure 9 and the effective bit representations of the 32QAM in-phase symbols and orthogonal symbols in Table 1, the in-phase symbols, orthogonal symbols and demapped symbols shown in Figures 13A-13E can be established The Karnaugh map between the information bits b4b3b2b 1b0, according to the Karnaugh map simplification method, so as to obtain the logical expression between the symbols in the 32QAM mapping mode and the demapped information bits, see Table 3.

Using the 64QAM mapping mode constellation shown in Figure 10 and the effective bit representations of the 64QAM in-phase symbols and orthogonal symbols in Table 1, the in-phase symbols, orthogonal symbols and demapped symbols shown in Figures 14A-14F can be established The Karnaugh map between the information bits b5b4b3b2b1b0, according to the Karnaugh map simplification method, so as to obtain the logical expression between the symbols in the 64QAM mapping mode and the demapped information bits, see Table 3.

Since the logical expression between the symbols in the 4QAM-NR mapping mode and the demapped information bits is the same as that in the 4QAM mapping mode, the 4QAM-NR mapping mode will not be described separately here.

table 3

In Table 3, for the logical expressions with the same expression on the right side of the equal sign, only one expression is kept, and the repeated expressions are eliminated, so as to obtain the logical expression between the symbols in each mapping mode and the demapped information bits The simplest form of the formula is shown in Table 4:

Table 4

Step 3: According to the current QAM mapping mode, search according to Table 5 from the set of demapped bits obtained in the second step, and select corresponding bits to form a demapped bit output.

Under the current QAM mapping mode, the corresponding bit in the demapping bit set and the corresponding relationship between the demapping bit output are shown in Table 5:

table 5

Claims (12)

1. A demapping device in a digital television terrestrial system, characterized in that: The device is composed of a symbol converter between quadrants, a mapper between symbols and bits, and a bit selector, wherein the in-phase symbol I and the quadrature symbol Q are connected to the input of the symbol converter (1) between the quadrants, and the quadrants The output of the symbol converter (1) is connected to the input of the mapper (2) between symbols and bits, and the output of the mapper (2) between symbols and bits is connected to an input of the bit selector (3), and the current QAM mapping The pattern is connected to another input of the bit selector (3), the output of the bit selector (3) is output as the last demapping bit; Wherein, the specific operation of the sign converter (1) between quadrants is: when the highest sign bit of the in-phase sign I or the quadrature sign Q is '1', the low-significant bit of the in-phase sign I or the quadrature sign Q is taken Inverse operation, when the highest sign bit of the in-phase symbol I or the quadrature symbol Q is '0', no operation is performed on the low-significant bit of the in-phase symbol I or the quadrature symbol Q; The specific operation of the mapper (2) between the symbol and the bit is: the output of the symbol converter (1) between the quadrants completes the conversion to the d8d7d6d5d4d3d2d1d0 bit set according to the following rules: The logical inverse operation of the highest bit in the output orthogonal symbol of the symbol converter (1) between quadrants obtains d0; The third bit from the left in the output quadrant symbol of the inter-quadrant sign converter (1) is logically exclusive ORed with the second bit from the left in the output quadrant sign of the inter-quadrant sign converter (1). The result of the XOR operation is d1; The second logical inverse operation from the left of the output orthogonal symbol of the symbol converter (1) between the quadrants obtains d2; The second logical inverse operation from the left of the output in-phase sign of the sign converter (1) between the quadrants obtains d3; The third bit from the left of the output in-phase symbol of the inter-quadrant sign converter (1) is logically exclusive-ored with the second bit from the left of the output in-phase sign of the inter-quadrant sign converter (1), and the logical exclusive-or The result of the operation is d4; The highest bit logical inverse operation of the output in-phase sign of the sign converter (1) between the quadrants obtains d5; The second bit from the left of the output in-phase symbol of the inter-quadrant sign converter (1) is logically exclusive ORed with the second bit from the left of the output quadrature sign of the inter-quadrant sign converter (1). The result of the OR operation is d6; The output of the inter-quadrant sign converter (1) is the third bit from the left in the quadrature sign and is logically ANDed with the output of the inter-quadrant sign converter (1) the second bit from the left in the in-phase sign , then carry out logical OR operation with the third bit from the left in the output in-phase symbol of the sign converter (1) between the quadrants, obtain d7; The output of the inter-quadrant sign converter (1) is the second bit from the left in the in-phase sign, and then logically ANDed with the output of the inter-quadrant sign converter (1) and the third bit from the left in the quadrature sign , then carry out logical OR operation with the second bit from the left in the output orthogonal sign of the sign converter (1) between the quadrants, obtain d8; The concrete operation of bit selector (3) is: select corresponding bit according to current QAM mapping mode and the following rules to form demapping bit output: When the current QAM mapping mode is 4QAM, select d0d5 as the output of bit selector (3); When the current QAM mapping mode is 4QAM-NR, select the intermediate result that d0d5 obtains through NR decoder (24) as the output of bit selector (3); When the current QAM mapping mode is 16QAM, select d0d2d5d3 as the output of bit selector (3); When the current QAM mapping mode is 32QAM, select d6d0d7d5d8 as the output of bit selector (3); When the current QAM mapping mode is 64QAM, select d0d2d1d5d3d4 as the output of the bit selector (3). 2. the demapping device in a kind of digital television terrestrial system according to claim 1, is characterized in that: The input of the symbol converter (1) between the described quadrants is the in-phase symbol I=I2I1I0, the quadrature symbol Q=Q2Q1Q0, and the output is the corresponding first quadrant symbol II=II2II1II0, QQ=QQ2QQ1QQ0, wherein II2=I2, QQ2= Q2; I1I0 is reversed to obtain I1I0, and Q1Q0 is reversed to obtain Q1Q0; When I2 was high level, the output II1II0=I1I0 of the sign converter (1) between the quadrants; When I2 was low level, the output II1II0=I1I0 of the sign converter (1) between the quadrants; When Q2 was high level, the output QQ1QQ0=Q1Q0 of the symbol converter (1) between the quadrants; When I2 is low level, the output of the sign converter (1) between quadrants QQ1QQ0=Q1Q0. 3. the demapping device in a kind of digital television terrestrial system according to claim 1, is characterized in that: The input of the mapper (2) between the symbol and the bit is the first quadrant in-phase symbol II=II2II1II0, the quadrature symbol QQ=QQ2QQ1QQ0, and the output is the demapping bit set d8d7d6d5d4d3d2d1d0; The mapper (2) between described symbols and bits is composed of a first NOT gate (10), a second NOT gate (13), a third NOT gate (17), a fourth NOT gate (19), and a fifth NOT gate (20), the sixth NOT gate (22), the first exclusive OR gate (16), the second exclusive OR gate (18), the third exclusive OR gate (21), the first AND gate (11), the second AND Gate (14), the first OR gate (12), the second OR gate (15) form: After II1 passes through the first NOT gate (10) and QQ0 passes through the first AND gate (11) together, and QQ1 passes through the first OR gate (12) together to obtain output d8; After QQ0 passes through the second NOT gate (13) and II1 passes through the second AND gate (14) together, and II0 passes through the second OR gate (15) jointly, output d7 is obtained; II1 and QQ1 pass through the first XOR gate (16) together to obtain output d6; II2 gets output d5 through the third NOT gate (17); II0 and II1 pass through the second XOR gate (18) together to obtain output d4; II1 obtains output d3 through the fourth NOT gate (19); QQ1 passes through the fifth NOT gate (20) to obtain output d2; QQ0 and QQ1 pass through the third XOR gate (21) together to obtain the output d1; QQ2 passes through the sixth NOT gate (22) to get the output d0. 4. the demapping device in a kind of digital television terrestrial system according to claim 1, is characterized in that: An input of the bit selector (3) is the output demapping bit set d8d7d6d5d4d3d2d1d0 of the mapper (2) between the symbols and bits, and the other input is the current QAM mapping mode, and the output is the demapping bit output; Described bit selector (3) is made up of five selectors (23), NR decoder (24): When the current QAM mapping mode was 4QAM, one of five selectors (23) selected d0d5 as the output of bit selector (3); When the current QAM mapping mode was 4QAM-NR, one of the five selectors (23) selected the intermediate result obtained by d0d5 through the NR decoder (24) as the output of the bit selector (3); When the current QAM mapping mode was 16QAM, one of the five selectors (23) selected d0d2d5d3 as the output of the bit selector (3); When the current QAM mapping mode was 32QAM, one of the five selectors (23) selected d6d0d7d5d8 as the output of the bit selector (3); When the current QAM mapping mode is 64QAM, the one-of-five selector (23) selects d0d2d1d5d3d4 as the output of the bit selector (3). 5. the demapping device in a kind of digital television terrestrial system according to claim 1 or 4, is characterized in that: described NR decoder (24) is composed of controlled output device (25), modulus 8 counter ( 26) Composition: The input of the controlled output device (25) is the NR decoder (24) input, the output of the controlled output device (25) is connected to the NR decoder (24) output, and the output of the modulo 8 counter (26) is connected to the controlled The controlled end of the control exporter (25); When the output of the modulo 8 counter (26) was '1', the controlled output device (25) was a straight-through state; when the output of the modulo 8 counter (26) was '0', the controlled output device (25) was blocked state. 6. apply the method for demapping in a kind of digital television terrestrial system of device described in claim 1, it is characterized in that, the method comprises the steps: The first step: complete the symbol conversion from other quadrants to the first quadrant according to the highest bit of the in-phase symbol I and the quadrature symbol Q; The low-significant bits of the in-phase symbol and the quadrature symbol are converted between the complement code and the original code, that is, the low-significant bits of the in-phase symbol and the quadrature symbol are selected according to the difference between the highest sign bit of the in-phase symbol and the quadrature symbol anti-operation; When the highest sign bit is '1', the low significant bit is inverted; when the highest sign bit is '0', the low significant bit does not perform any operation; The second step: use the logical expression between the symbols in the constellation diagram of various QAM mapping modes and the demapped information bits to perform corresponding constellation demapping on the in-phase symbol I and quadrature symbol Q converted to the first quadrant , to obtain the demapping bit set of each mode; The specific operation is: according to the following rules, the in-phase symbol I and the quadrature symbol Q are converted to the d8d7d6d5d4d3d2d1d0 bit set, and the multiple QAM mapping modes include five constellation mapping modes of 4QAM, 4QAM-NR, 16QAM, 32QAM, and 64QAM: The logical inverse operation of the highest bit in the orthogonal symbol obtained in the first step obtains d0; The second bit from the left in the output orthogonal symbol obtained in the first step and the third bit from the left in the output orthogonal symbol obtained in the first step are logically exclusive-ored, and the result of the logical exclusive-or operation is d1; The logical inversion of the second bit from the left of the output orthogonal symbol obtained in the first step is obtained by d2; The logical inverse operation of the second bit from the left of the output in-phase symbol obtained in the first step, obtains d3; The second bit from the left of the output in-phase symbol obtained in the first step and the third bit from the left in the output in-phase symbol obtained in the first step are logically exclusive-ored, and the result of the logical exclusive-or operation is d4; The logic inverse operation of the highest bit of the output in-phase sign obtained in the first step obtains d5; The second bit from the left of the output in-phase symbol obtained in the first step and the second bit from the left of the output quadrature symbol obtained in the first step are subjected to a logical exclusive OR operation, and the result of the logical exclusive OR operation is d6; The third bit from the left in the output quadrature symbol obtained in the first step is logically inverted and then the second bit from the left in the output in-phase symbol obtained in the first step is logically ANDed, and then in-phase with the output obtained in the first step Logical OR operation is performed on the third digit from the left in the symbol to obtain d7; The second bit from the left in the output in-phase symbol obtained in the first step is logically inverted, and then the third bit from the left in the output quadrature symbol obtained in the first step is logically ANDed, and then it is positive with the output obtained in the first step Perform logical OR operation on the second digit from the left in the intersection symbol to obtain d8; Step 3: According to the current QAM mapping mode, extract the corresponding demapping bit output from the demapping bit set; Its specific operation is to select the corresponding bit to form demapping bit output according to the current QAM mapping mode and the following rules: When the current QAM mapping mode is 4QAM, extract the d0d5 obtained in the second step; When the current QAM mapping mode is 4QAM-NR, extract the d0d5 obtained in the second step, and then decode it through NR; When the current QAM mapping mode is 16QAM, extract the d0d2d5d3 obtained in the second step; When the current QAM mapping mode is 32QAM, extract the d6d0d7d5d8 obtained in the second step; When the current QAM mapping mode is 64QAM, extract d0d2d1d5d3d4 obtained in the second step. 7. the method for demapping in a kind of digital television terrestrial system according to claim 6, is characterized in that: described 4QAM demaps, and input symbol is represented as with complementary code form: in-phase symbol I=I , quadrature symbol Q=Q2, where I2 and Q2 respectively correspond to the sign bits of the in-phase symbol and the quadrature symbol, and the demapping bit output is denoted as b1b0. 8. the demapping method in a kind of digital television terrestrial system according to claim 6 is characterized in that: described 4QAM-NR demaps, and input symbol is represented as with complementary code form: in-phase symbol I=I , positive Intersection symbol Q=Q2, the demapped information bits undergo 16-bit to 8-bit NR decoding, and the demapped bit output is denoted as b1b0. 9. the method for demapping in a kind of digital television terrestrial system according to claim 6, it is characterized in that: described 16QAM demapping, input symbol is expressed as: in-phase symbol I=I2I1, quadrature symbol Q=Q2Q1, where I2 and Q2 correspond to the sign bits of the in-phase symbol and the quadrature symbol respectively, and determine the quadrant of the symbol. I1 and Q1 represent the low-significant bits of the in-phase symbol and the quadrature symbol respectively, and the demapping bit output represents for b3b2b1b0. 10. according to the demapping method in a kind of digital television terrestrial system described in claim 6, it is characterized in that: described 32QAM demaps, and input symbol is expressed as with complementary code form, in-phase symbol I=I2I1I0, quadrature symbol Q=Q2Q1Q0, where I2 and Q2 respectively correspond to the sign bits of the in-phase symbol and the quadrature symbol, and determine the quadrant of the symbol. I1I0 and Q1Q0 are respectively represented as the low-significant bits of the in-phase symbol and the quadrature symbol, and the demapping bit output represents for b4b3b2b1b0. 11. The demapping method in a kind of digital television terrestrial system according to claim 6, is characterized in that: described 64QAM demaps, and input symbol is represented as with complementary code form, in-phase symbol I=I2I1I0, quadrature symbol Q=Q2Q1Q0, where I2 and Q2 respectively correspond to the sign bits of the in-phase symbol and the quadrature symbol, and determine the quadrant of the symbol. I1I0 and Q1Q0 are respectively represented as the low-significant bits of the in-phase symbol and the quadrature symbol, and the demapping bit output represents for b5b4b3b2b1b0. 12. The demapping method in a kind of digital television terrestrial system according to claim 6, is characterized in that: the logical expression between the symbol in described constellation diagram and the information bit after demapping, by Carnot The figure is simplified to obtain the logical expression between the symbols in each mapping mode and the demapped information bits; for the logical expressions of the same form in different modes, only one is kept after merging, and it is set as a multi-mode common complex use.

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