CN101304018B - Image display system - Google Patents

Abstract

The present invention relates to an image display system having a thin film transistor substrate, wherein the thin film transistor substrate includes a first conductive layer and a second conductive layer. The first conductive layer forms a first trace and a second trace; the second conductive layer is disposed on the first conductive layer and forms a first contact, wherein the first contact is electrically connected to the first trace, and the first contact is disposed adjacent to the second trace. When the thin film transistor substrate of the present invention is bonded to a chip, since the trace and the contact are formed in different conductive layers, the pins of the chip will not cause a short circuit due to contacting the contact and the trace at the same time. Furthermore, since the contacts and traces of the present invention are disposed adjacent to each other to form a herringbone contact configuration, the wiring area can be reduced.

Description

Image display system

technical field

The present invention relates to an image display system, in particular to a thin film transistor substrate connected with a square chip.

Background technique

An image display system containing a thin film transistor substrate, such as a liquid crystal display panel or an organic light emitting diode panel, after completing all circuit configurations, it still needs to be bonded with an external chip to provide the computing and driving sources required by the thin film transistor substrate . During the bonding process of the chip and the thin film transistor substrate, the pins on the chip are mainly bonded to the contacts on the thin film transistor substrate.

FIG. 1A is a schematic side view of a thin film transistor substrate 1 bonded to a chip 2 in an in-line contact configuration. FIG. 1B is a schematic top view of the traces and contact shapes in FIG. 1A . 1A, the thin film transistor substrate 1 has a substrate 11, an insulating layer 12, a conductive layer 13 and a flat layer 14, the insulating layer 12 is arranged on the substrate 11, the conductive layer 13 and the flat layer 14 are arranged on On the insulating layer 12 , a part of the flat layer 14 is hollowed out so that the conductive layer 13 is exposed, so as to be connected to the pins 21 of the chip 2 .

A plurality of traces 131 and a plurality of contacts 132 are formed on the conductive layer 13 , and each contact 132 is connected to each pin 21 of the chip 2 . As shown in FIG. 1B , each contact 132 is connected to each trace 131 respectively, and each trace 131 is disposed adjacent to each other, and each contact 132 and the corresponding trace 131 are shaped like a straight line.

The circuit configuration of the thin film transistor substrate 1 must consider the displacement error caused by bonding with the chip 2. Therefore, there must be a sufficient distance between adjacent contacts 132, so as to avoid that the pins 21 of the chip 2 are simultaneously connected as shown in FIG. 1A. Contact with two contacts 132 to cause a short circuit occurs. As a result, the number of contacts that can be accommodated in a unit area is limited, so that the in-line contact configuration requires a larger layout area.

FIG. 2A is a schematic side view of a thin film transistor substrate 1' and a chip 2' bonded in a pin-shaped contact arrangement. FIG. 2B is a schematic top view of the traces and contact shapes in FIG. 2A . Please refer to FIG. 2A and FIG. 2B , which is different from FIG. 1A and FIG. 1B in that each contact 132 ′ is arranged in a staggered pattern, so that the density of wiring 131 ′ and contact 132 ′ within a unit area is relatively high. Therefore, the layout area can be saved. However, under this structure, there must still be a sufficient distance D between adjacent contacts 132', so as to prevent the pins 21' of the chip 2' from simultaneously contacting the contacts 132' and the traces 131' as shown in FIG. 2A. A short circuit occurs due to contact. Although the pin-shaped contact configuration has better area utilization efficiency than the straight-shaped contact configuration, sufficient layout area is still required.

How to provide a configuration method that can prevent the occurrence of short circuits and save the layout area is a major issue nowadays.

It can be seen that the above-mentioned existing image display system obviously still has inconveniences and defects in structure and use, and needs to be further improved urgently. In order to solve the problems existing in the image display system, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above problems, which is obvious. It is a problem that relevant industry players are eager to solve.

In view of the above-mentioned defects in the existing image display system, the inventor actively researches and innovates based on years of rich practical experience and professional knowledge engaged in the design and manufacture of such products, and cooperates with the application of academic theories, in order to create a new type of structure. The image display system can improve the general existing image display system to make it more practical. Through continuous research, design, and after repeated trial samples and improvements, the present invention with practical value is finally created.

Contents of the invention

The purpose of the present invention is to overcome the defects existing in the existing image display system, and provide an image display system with a new structure. The technical problem to be solved is to make it have a film that can prevent short circuits from occurring and save layout area. Transistor substrate, which is more suitable for practical use.

The purpose of the present invention and the solution to its technical problems are achieved by adopting the following technical solutions. An image display system proposed according to the present invention has a thin film transistor substrate, wherein the thin film transistor substrate includes: a first conductive layer formed with a plurality of first wiring lines and a plurality of second wiring lines; and a The second conductive layer is disposed on the first conductive layer and formed with a plurality of first contacts, wherein the first contacts are electrically connected to the first wiring, and the first contacts are connected to the first wiring. The second wires are adjacently arranged and staggered.

The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures.

In the aforementioned image display system, the thin film transistor substrate further includes: a first conductive plug disposed between the first conductive layer and the second conductive layer to connect the first contact and the first wiring .

In the aforementioned image display system, the second conductive layer is further formed with a second contact, the second contact is electrically connected to the second wiring, and the second contact is disposed adjacent to the first wiring.

In the aforementioned image display system, the thin film transistor substrate further includes: a second conductive plug disposed between the first conductive layer and the second conductive layer to connect the second contact with the second wiring .

In the aforementioned image display system, the second conductive layer includes a plurality of first contacts and a plurality of second contacts, and the first contacts and the second contacts are alternately arranged in a character shape.

In the aforementioned image display system, the TFT substrate includes a plurality of second contacts and a plurality of first traces, and the second contacts and the first traces are arranged alternately.

In the aforementioned image display system, the TFT substrate further includes: a first insulating layer disposed between the first conductive layer and the second conductive layer; and a second insulating layer disposed between the first conductive layer On an insulating layer, a part of the second insulating layer is hollowed out to expose the second conductive layer.

In the aforementioned image display system, the second insulating layer is a flat layer.

In the aforementioned image display system, the thin film transistor substrate further includes: an insulating substrate, the first conductive layer, the first insulating layer and the second conductive layer are sequentially disposed on the insulating substrate.

Compared with the prior art, the present invention has obvious advantages and beneficial effects. It can be known from the above that the present invention provides an image display system, which has a thin film transistor substrate, wherein the thin film transistor substrate includes a first conductive layer and a second conductive layer. The first conductive layer is formed with a first trace and a second trace; the second conductive layer is disposed on the first conductive layer and forms a first contact, wherein the first contact is electrically connected to the first trace, And the first contact is adjacent to the second wiring.

By means of the above technical solution, the image display system of the present invention has at least the following advantages: According to the image display system of the present invention, the thin film transistor substrate forms traces on the first conductive layer, and forms contacts on the second conductive layer, so that the traces and contacts Formed on different conductive layers. When the thin film transistor substrate of the present invention is bonded to the chip, since the traces and contacts are formed on different conductive layers, the pins of the chip will not be short-circuited due to simultaneous contact with the contacts and the traces. Moreover, because the contacts and the traces of the present invention are arranged adjacent to each other to form a character-shaped contact arrangement, the wiring area can be reduced.

To sum up, the image display system with special structure of the present invention has the above-mentioned many advantages and practical value, and no similar structural design has been published or used in similar products, so it is indeed an innovation, regardless of the product structure Or the function has been greatly improved, the technology has made great progress, and has produced easy-to-use and practical effects, and has a number of enhanced functions compared with the existing image display system, so it is more suitable for practical use. And it has wide application value in the industry, and it is a novel, progressive and practical new design.

The above description is only an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable , the following preferred embodiments are specifically cited below, and are described in detail as follows in conjunction with the accompanying drawings.

Description of drawings

FIG. 1A is a schematic side view of a conventional TFT substrate bonded to a chip in an in-line contact configuration.

FIG. 1B is a schematic top view of the traces and contact shapes in FIG. 1A .

FIG. 2A is a schematic side view of a conventional thin film transistor substrate bonded to a wafer in a pin-shaped contact configuration.

FIG. 2B is a schematic top view of the traces and contact shapes in FIG. 2A .

FIG. 3A is a schematic side view of a TFT substrate bonded to a chip in a pin-shaped contact arrangement according to a preferred embodiment of the present invention.

FIG. 3B is a schematic top view of the traces and contact shapes in FIG. 3A .

FIG. 4 is a block diagram of an image display system according to another preferred embodiment of the present invention.

1: Thin film transistor substrate 11: Substrate

12: Insulation layer 13: Conductive layer

131: Wiring 132: Contact

14: Flat layer 1′: Thin film transistor substrate

13′: Conductive layer 131′: Wiring

132′: Contact 2: Chip

21: Pin 2′: Chip

21': pin 3: thin film transistor substrate

31: Substrate 32: The first conductive layer

321: The first trace 322: The second trace

33: The first insulating layer 34: The second conductive layer

341: The first contact 342: The second contact

35: Second insulating layer 4: Wafer

41: Pin 5: Image display system

51: Electronic device 511: Matrix display panel

5111: Thin film transistor substrate 512: Input unit

D: distance

Detailed ways

In order to further explain the technical means and effects of the present invention to achieve the intended purpose of the invention, the specific implementation, structure, features and effects of the image display system proposed according to the present invention will be described below in conjunction with the accompanying drawings and preferred embodiments. Details are as follows.

An image display system according to a preferred embodiment of the present invention will be described below with reference to related drawings.

FIG. 3A is a schematic side view of the thin film transistor substrate 3 and the chip 4 after being bonded in a pin-shaped contact arrangement, and FIG. 3B is a schematic top view of the traces and contact shapes in FIG. 3A . 3A, the thin film transistor substrate 3 includes a substrate 31, a first conductive layer 32, a first insulating layer 33, a second conductive layer 34 and a second insulating layer 35, the first conductive layer 32 Set on the substrate 31, the first insulating layer 33 covers the first conductive layer 32, the second conductive layer 34 is set on the first insulating layer 33, and the second insulating layer 35 covers the second conductive layer 34, wherein the second insulating A portion of layer 35 is hollowed out to expose second conductive layer 34 .

Generally, the substrate 31 can be an insulating substrate, which includes a glass substrate and a buffer layer (or insulating layer) disposed on the glass substrate. The first conductive layer 32 and the second conductive layer 34 can be used to form data lines or scan lines (or called row wires or column wires) on the pixel array. The second insulating layer 35 can be a planar layer.

In this embodiment, a plurality of first wires 321 and a plurality of second wires 322 are formed on the first conductive layer 32, and a plurality of first contacts 341 and a plurality of second contacts 342 are formed on the second conductive layer 34. Wherein, each first contact 341 is electrically connected to one of the first traces 321, each second contact 342 is electrically connected to one of the second traces 322, and the first contact 341 is in phase with the second trace 322. The second contact 342 is adjacent to the first wiring 321 .

The first wiring 321 and the second wiring 322 can be electrically connected to the data lines or scanning lines formed on the pixel array, and the first contact 341 and the second contact 342 are connected to the pins 41 of the chip 4, so that the chip 4 can Electrically connect the data lines or scanning lines on the pixel array, and make the chip 4 drive the pixel array.

In addition, the thin film transistor substrate 3 further has a plurality of first conductive plugs (not shown in the figure) and a plurality of second conductive plugs (not shown in the figure), and these conductive plugs are arranged on the first conductive layer 32 and the second conductive layer 32 . Between the layers 34 , each first conductive plug is electrically connected to one of the first contact 341 and the first trace 321 , and each second conductive plug is electrically connected to one of the second contact 342 and the second trace 322 .

As mentioned above, because the first contact 341 is adjacent to the second wiring 322, and the second contact 342 is adjacent to the first wiring 321, so that the first contact 341 and the second contact 342 are in the shape of a square. Therefore, a larger number of wires and contacts can be accommodated in a unit area, thereby reducing the area of wiring configuration and reducing the volume of the image display system. In addition, when using the wiring arrangement of the thin film transistor substrate 3 of the present invention to bond with the external chip 4, there are only contacts in the second conductive layer 34 bonded to the chip 4, so no matter what factors affect the chip 4 When displacement occurs, the pins 41 in the chip 4 can only be electrically connected to the corresponding contacts, so that the pins 41 will not cause a short circuit due to contact with the wiring.

In this embodiment, the TFT substrate 3 can be used as a pixel array substrate of a matrix display panel. If the matrix display panel is an organic light emitting diode panel, a pixel driving circuit and an organic light emitting diode are formed on the thin film transistor substrate 3 in addition to forming row and column wires, and the pixel driving circuit is electrically connected to the row and column wires to drive Organic Light Emitting Diodes.

In addition, if the matrix display panel is a liquid crystal display panel, the matrix display panel further includes another opposite substrate and a liquid crystal layer, and the liquid crystal layer is disposed between the TFT substrate 3 and the opposite substrate. A pixel drive circuit is formed on the thin film transistor substrate 3 to drive the liquid crystal layer except for the row and column wires.

The LCD panel can be a Twisted Nematic (TN), Multi-domain Vertical Alignment (MVA), In-Plane Switching (IPS), Fringe-Fiele Switching , FFS), active matrix filter, transmissive, reflective or transflective.

Usually, a liquid crystal display panel that requires an active light source to display images is combined with a backlight module to form a liquid crystal display device. The backlight module outputs a light to the liquid crystal display panel so that the liquid crystal display panel displays images.

Please refer to FIG. 4, an image display system 5 of another preferred embodiment of the present invention includes an electronic device 51, and the electronic device 51 has a matrix display panel 511 and an input unit 512, wherein the matrix display panel 511 It has a thin film transistor substrate 5111 . The thin film transistor substrate 5111 is like the thin film transistor substrate 3 of the foregoing embodiment, and relevant details and implementations have been discussed in the foregoing embodiment, and will not be repeated here.

The matrix display panel 511 can be the aforementioned liquid crystal display panel in the form of multi-quadrant vertical alignment, transverse electric field drive, edge electric field drive, active matrix filter, transmissive or semi-transmissive, etc. The input unit 512 and the matrix display The panel 511 is coupled and provides an input to the matrix display panel 511 so that the matrix display panel 511 displays images. In this embodiment, the electronic device 5 is a mobile phone, a digital camera, a personal digital assistant, a notebook computer, a desktop computer, a television set, a car display, a head-mounted display, a printer screen, an MP3 player, Handheld game console or portable DVD player, etc.

To sum up, according to the image display system of the present invention, the thin film transistor substrate forms traces on the first conductive layer, and forms contacts on the second conductive layer, so that the traces and contacts are formed on different conductive layers. Compared with the conventional technology, when the thin film transistor substrate of the present invention is bonded to the chip, since the traces and contacts are formed on different conductive layers, the pins of the chip will not cause a short circuit due to simultaneous contact with the contacts and traces Case. Moreover, because the contacts and the traces of the present invention are arranged adjacent to each other to form a character-shaped contact arrangement, the wiring area can be reduced.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this field Those skilled in the art, without departing from the scope of the technical solution of the present invention, can use the technical content disclosed above to make some changes or modify equivalent embodiments with equivalent changes, but all the content that does not depart from the technical solution of the present invention, according to the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence still belong to the scope of the technical solution of the present invention.

Claims (9)

1. An image display system, characterized in that it has a thin film transistor substrate, wherein the thin film transistor substrate comprises: a first conductive layer, formed with a plurality of first traces and a plurality of second traces; and A second conductive layer, disposed on the first conductive layer, and formed with a plurality of first contacts, wherein the first contacts are electrically connected to the first wiring, and the first contacts It is arranged adjacent to and staggered with the second wiring. 2. The image display system according to claim 1, wherein the thin film transistor substrate further comprises: A first conductive plug is arranged between the first conductive layer and the second conductive layer to connect the first contact and the first wiring. 3. The image display system according to claim 1, wherein the second conductive layer further forms a second contact, the second contact is electrically connected to the second wiring, and the second contact is connected to the second wiring. The first traces are arranged adjacent to each other. 4. The image display system as claimed in claim 3, wherein the TFT substrate further comprises: A second conductive plug is arranged between the first conductive layer and the second conductive layer to connect the second contact and the second wiring. 5. The image display system according to claim 3, wherein the second conductive layer comprises a plurality of first contacts and a plurality of second contacts, the first contacts and the second contacts are in the shape of a character Staggered settings. 6. The image display system according to claim 3, wherein the thin film transistor substrate comprises a plurality of second contacts and a plurality of first traces, and the second contacts and the first traces are respectively intersected set up. 7. The image display system as claimed in claim 1, wherein the TFT substrate further comprises: a first insulating layer disposed between the first conductive layer and the second conductive layer; and A second insulating layer is disposed on the first insulating layer, wherein a part of the second insulating layer is hollowed out to expose the second conductive layer. 8. The image display system as claimed in claim 7, wherein the second insulating layer is a flat layer. 9. The image display system as claimed in claim 7, wherein the TFT substrate further comprises: An insulating substrate, the first conductive layer, the first insulating layer and the second conductive layer are sequentially arranged on the insulating substrate.

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