CN101364461A - Open-hole constant-resistance chip resistor and manufacturing method thereof - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 229910052751 metal Inorganic materials 0.000 claims abstract description 86
- 239000002184 metal Substances 0.000 claims abstract description 86
- 239000000463 material Substances 0.000 claims abstract description 54
- 238000000034 method Methods 0.000 claims abstract description 43
- 239000010410 layer Substances 0.000 claims description 40
- 229910000679 solder Inorganic materials 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 25
- 239000011241 protective layer Substances 0.000 claims description 19
- 238000003466 welding Methods 0.000 claims description 14
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 238000005520 cutting process Methods 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 230000004927 fusion Effects 0.000 claims description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 229910002065 alloy metal Inorganic materials 0.000 claims description 6
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 229910052718 tin Inorganic materials 0.000 claims description 6
- 239000011135 tin Substances 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000004080 punching Methods 0.000 claims description 4
- 238000005553 drilling Methods 0.000 claims description 3
- 238000003801 milling Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 3
- 230000009467 reduction Effects 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 239000003822 epoxy resin Substances 0.000 claims description 2
- 229920000647 polyepoxide Polymers 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 19
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 230000000694 effects Effects 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 4
- 238000013461 design Methods 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 16
- 238000005516 engineering process Methods 0.000 description 11
- 238000000576 coating method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000001723 curing Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000011572 manganese Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
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Abstract
Description
技术领域 technical field
本发明涉及一种电阻器,尤指一种开孔定阻式芯片电阻器及其制法。The invention relates to a resistor, in particular to an aperture fixed-resistance chip resistor and a manufacturing method thereof.
背景技术 Background technique
因应各种电子装置便携化、微型化的发展趋势,经常使用于电路中以供量测两端电位差的芯片电阻器,也随之越来越趋于微型化,而为了减小量测误差与提高检出的电流值,通常需要具备电阻值0.02Ω至10Ω、额定容许功率0.1W以上的低电阻高功率特性,并且必须满足减小电阻温度系数(TCR)的要求,在目前通常采用印刷或镀膜技术的现有制程技术之下,存在难以廉价大量生产的实际困难。In response to the development trend of portability and miniaturization of various electronic devices, chip resistors, which are often used in circuits to measure the potential difference between both ends, are also becoming more and more miniaturized. In order to reduce measurement errors To increase the detected current value, it usually needs to have low resistance and high power characteristics with a resistance value of 0.02Ω to 10Ω and a rated allowable power of more than 0.1W, and must meet the requirements of reducing the temperature coefficient of resistance (TCR). Currently, printing is usually used Under the existing process technology of or coating technology, there are practical difficulties that are difficult to mass-produce cheaply.
中国台湾公告第350071号专利案公开一种芯片电阻器,是在陶瓷基板上利用网印技术印刷电阻膜(材料为玻璃和导电粒子混合成的电阻胶),再经由干燥、高温烧结等制程而成型,之后采用激光整饰法熔解部分区域形成沟槽以调整其电阻值,最后再利用电镀制程制作电极。然而,由于该电阻膜是以印刷方式形成,其厚度的均匀性难以控制,且因为高温烧结的扩散变异影响,致使该电阻膜的电阻值变化较大。尤其,当前述该芯片电阻器应用于高频环境时,因电阻膜的孔隙率高、结构松散,导致高频信号损耗较大,所以无法适用于高频产品中。China Taiwan Announcement No. 350071 patent case discloses a chip resistor, which is printed on a ceramic substrate using screen printing technology (the material is a resistor glue mixed with glass and conductive particles), and then dried, high-temperature sintered and other processes. After molding, laser trimming is used to melt part of the area to form grooves to adjust its resistance value, and finally the electrode is made by electroplating process. However, since the resistive film is formed by printing, it is difficult to control the uniformity of its thickness, and the resistance value of the resistive film varies greatly due to the diffusion variation of high temperature sintering. Especially, when the aforementioned chip resistor is applied in a high-frequency environment, due to the high porosity and loose structure of the resistive film, the high-frequency signal loss is relatively large, so it cannot be applied to high-frequency products.
另一种采用镀膜技术的制法,是在陶瓷基板上以利如溅镀(Sputter Deposition)或蒸镀(Evaporation)之类的物理气相沉积技术(PVD)、或者化学气相沉积技术(CVD)等半导体制程生成电阻膜。由于是采用半导体制程来制成芯片电阻器,对于设备的投资是极为昂贵的,加上半导体制程良率的限制,造成制造成本过于昂贵,大幅降低产品竞争力。同时,由于前述半导体制程中针对电阻膜的图案化作业是以微影技术形成,且需移除光阻膜之后才能进行后续处理,然而在移除光阻膜时经常发生移除不全或过当的情况,导致电阻膜暴露而易遭污染或氧化,影响其电气特性,相对降低制程良率。Another method using coating technology is to use physical vapor deposition (PVD) such as sputtering (Sputter Deposition) or evaporation (Evaporation) on a ceramic substrate, or chemical vapor deposition (CVD), etc. Semiconductor processes create resistive films. Since chip resistors are manufactured using semiconductor manufacturing processes, the investment in equipment is extremely expensive. Coupled with the limitation of semiconductor manufacturing process yields, the manufacturing cost is too expensive and greatly reduces product competitiveness. At the same time, since the patterning operation for the resistive film in the aforementioned semiconductor manufacturing process is formed by lithography technology, and the subsequent processing needs to be removed after the photoresist film is removed, however, incomplete or excessive removal often occurs when removing the photoresist film. In the case of exposure, the resistive film is exposed and easily polluted or oxidized, which affects its electrical characteristics and relatively reduces the process yield.
为了克服前述问题,中国台湾证书号第I237898号专利公开一种制法,首先在一绝缘基板的上表面形成两分别位于该绝缘基板两端的主电极,接着以薄膜沉积方式形成一电阻膜于前述步骤中的绝缘基板的上表面,然后以印刷方式于前述步骤的电阻膜上形成一第一保护层,该第一保护层至少屏蔽位于所述主电极间的至少部分电阻膜并使位于所述主电极上的邻近端侧的部分电阻膜裸露,而位于所述主电极间的该第一保护层部分不间断地延伸,续以该第一保护层作为罩幕来移除该裸露部分的电阻膜,最后形成两端面电极于前述步骤的绝缘基板的两端部并分别遮蔽该对应的主电极。In order to overcome the aforementioned problems, the Taiwan Patent No. I237898 discloses a manufacturing method. First, two main electrodes respectively located at both ends of the insulating substrate are formed on the upper surface of an insulating substrate, and then a resistive film is formed on the aforementioned insulating substrate by thin film deposition. On the upper surface of the insulating substrate in the step, a first protection layer is formed on the resistance film in the previous step by printing, the first protection layer at least shields at least part of the resistance film between the main electrodes and makes the resistance film between the main electrodes Part of the resistance film on the main electrode adjacent to the end side is exposed, and the first protection layer part between the main electrodes extends without interruption, and the first protection layer is used as a mask to remove the resistance of the exposed part. film, and finally form two-end surface electrodes on the two ends of the insulating substrate in the previous steps and respectively shield the corresponding main electrodes.
但是,前述技术仍是采用半导体制程技术,其高成本与良率不佳的问题仍旧存在,况且必须额外增加两道保护层的镀膜制程,更是提高了制程成本。此外,其电阻膜是通过主电极才间接的电性连接至端面电极,如此将造成电阻膜与主电极的电阻温度系数(TCR)互相结合涵盖而增大,导致所制成芯片电阻器的电阻温度系数无法减小至需求值,甚至影响其散热效率。However, the aforementioned technology still uses semiconductor process technology, and the problems of high cost and poor yield still exist. Moreover, it is necessary to add two additional coating processes for protective layers, which increases the process cost. In addition, the resistive film is indirectly electrically connected to the end electrode through the main electrode, which will cause the temperature coefficient of resistance (TCR) of the resistive film and the main electrode to be combined with each other to increase, resulting in the resistance of the fabricated chip resistor The temperature coefficient cannot be reduced to the required value, and even affects its heat dissipation efficiency.
是故,上述现有技术存在制程良率低、设备与制程成本居高不下、电阻温度系数无法减小至需求值等缺陷,因此如何提出一种有效解决所述缺陷的芯片电阻器及其制法,实为本领域技术中亟待解决的问题。Therefore, the above-mentioned existing technology has defects such as low process yield, high equipment and process costs, and the inability to reduce the temperature coefficient of resistance to the required value. Therefore, how to propose a chip resistor and its manufacturing method that can effectively solve the above defects It is actually a problem to be solved urgently in the technology of this field.
发明内容 Contents of the invention
鉴于以上所叙述背景技术的缺点,本发明的一目的在于提供一种电阻温度系数可稳定减小至需求值的开孔定阻式芯片电阻器及其制法。In view of the disadvantages of the background technology described above, an object of the present invention is to provide an aperture fixed resistance chip resistor whose temperature coefficient of resistance can be stably reduced to a required value and a manufacturing method thereof.
本发明的另一目的在于提供一种易于制造而可提升制程良率的开孔定阻式芯片电阻器及其制法。Another object of the present invention is to provide an aperture fixed resistance chip resistor which is easy to manufacture and can improve the process yield and its manufacturing method.
本发明的又一目的在于提供一种可降低成本的开孔定阻式芯片电阻器及其制法。Another object of the present invention is to provide a cost-reduced aperture fixed resistance chip resistor and a manufacturing method thereof.
为达到上述目的以及其它目的,本发明提供一种开孔定阻式芯片电阻器,包括:基材;金属片,具有一中央开孔以定义其电阻值;结合层,相对结合该基材与该金属片;以及保护层,覆盖至该金属片的局部表面,使该金属片表面未覆盖该保护层的部分区隔成二电极区。In order to achieve the above object and other objects, the present invention provides an aperture fixed resistance chip resistor, comprising: a base material; a metal sheet having a central opening to define its resistance value; a bonding layer relatively combining the base material and the metal sheet a sheet; and a protective layer covering a part of the surface of the metal sheet, so that the part of the surface of the metal sheet not covered by the protective layer is divided into two electrode regions.
前述开孔定阻式芯片电阻器中,所使用的基材是以具备绝缘特性为基本特性要求,并无特定限制,例如可采用陶瓷基板。该金属片是以预先定义其电阻值者为基本特性要求,于一实施例中,该金属片为铜、锰、及锡的合金金属片;于另一实施例中,该金属片为铜、锰、及镍的合金金属片。而该金属片的中央开孔是以可计算面积而换算成电阻值的形状为基本原则,并无特定限制,例如其形状可为选自圆形、方形、菱形、梯形、及等角多边形的其中一者。此外,该金属片是以该中央开孔的面积定义其电阻值,且该电阻值与该中央开孔的面积成正比,即例如该中央开孔为圆形时,其孔径越大则电阻值相对越大。In the aforementioned open-hole fixed-resistance chip resistors, the basic requirement for the base material used is to have insulation properties, and there is no specific limitation, for example, a ceramic substrate can be used. The basic characteristic requirement of the metal sheet is to predefine its resistance value. In one embodiment, the metal sheet is an alloy metal sheet of copper, manganese, and tin; in another embodiment, the metal sheet is copper, manganese, and tin. Alloy metal sheets of manganese and nickel. The central opening of the metal sheet is based on the principle that the area can be calculated and converted into a resistance value, and there is no specific limitation. For example, its shape can be selected from circles, squares, rhombuses, trapezoids, and equiangular polygons. one of them. In addition, the resistance value of the metal sheet is defined by the area of the central opening, and the resistance value is proportional to the area of the central opening. For example, when the central opening is circular, the larger the aperture, the greater the resistance value. relatively larger.
所述该结合层可为整层的焊块、及相互间隔的至少二焊块的其中一者。该保护层是以提供保护该金属片二电极区以外的区域为基本原则,于一实施例中,该保护层覆盖至该金属片的中段区域表面,以使该金属片表面对应中段区域的两端区隔成二电极区;于另一实施例中,还可于该金属片的二电极区表面分别形成电极,以供焊接至例如需量测电位差的电路板中,较佳地,该电极是以滚镀方式形成至该电极区表面。The bonding layer can be a whole layer of solder bumps, or one of at least two solder bumps spaced apart from each other. The basic principle of the protection layer is to provide protection for the area other than the second electrode area of the metal sheet. In one embodiment, the protection layer covers the surface of the middle area of the metal sheet, so that the surface of the metal sheet corresponds to the two sides of the middle area. The terminal area is divided into two electrode areas; in another embodiment, electrodes can also be formed on the surface of the two electrode areas of the metal sheet, for welding to a circuit board that needs to measure the potential difference, for example, preferably, the The electrodes are formed on the surface of the electrode region by barrel plating.
为达到相同目的,本发明还提供一种开孔定阻式芯片电阻器的制法,包括:提供基材及金属片,其中该金属片具有一中央开孔以定义其电阻值;通过一结合层相对结合该基材与该金属片;以及覆盖一保护层至该金属片局部表面,以使该金属片表面未覆盖该保护层的部分区隔成二电极区。In order to achieve the same purpose, the present invention also provides a method for manufacturing an aperture fixed resistance chip resistor, comprising: providing a base material and a metal sheet, wherein the metal sheet has a central opening to define its resistance value; Combining the base material and the metal sheet; and covering a protective layer on a partial surface of the metal sheet, so that the part of the metal sheet surface not covered by the protective layer is divided into two electrode regions.
前述制法中,该金属片的中央开孔可采以选自冲压及切削的其中一种方式制成者,其中,该冲压方式可为冲孔作业,该切削方式可为钻孔作业及铣孔作业的其中一者。In the above method, the central opening of the metal sheet can be made by one of the methods selected from stamping and cutting, wherein the stamping method can be punching, and the cutting method can be drilling and milling. One of the hole jobs.
结合层可为相互间隔的至少二焊块,其形状或大小并无特定限制。于一实施例中,是由焊接材料预先涂布至该基材表面,于贴合该金属片后,经热熔还原成接合该基材与该金属片的该焊块;于另一实施例中,是由焊接材料预先涂布至该金属片表面,于贴合该基材后,经热熔还原成接合该基材与该金属片的该焊块。所述的焊接材料是以接近该基材与该金属片的电阻温度系数者为宜、并具备较佳的导热性为基本原则,并无特定限制,例如可采用银膏。The bonding layer can be at least two solder bumps spaced apart from each other, and there is no specific limitation on its shape or size. In one embodiment, the welding material is pre-coated on the surface of the base material, and after bonding the metal sheet, it is reduced by heat fusion to form the solder bump that joins the base material and the metal sheet; in another embodiment Among them, the welding material is pre-coated on the surface of the metal sheet, and after bonding the base material, it is reduced by hot melting to form the solder block that joins the base material and the metal sheet. The soldering material is based on the principle that it is close to the temperature coefficient of resistance of the base material and the metal sheet, and has better thermal conductivity. There is no specific limitation, for example, silver paste can be used.
由于本发明所提供的开孔定阻式芯片电阻器及其制法,是采用结合层来相对结合该基材与该金属片,因此可排除现有技术使用半导体制程的高成本缺点,达到易于制造、提升制程良率与降低成本的功效;而该金属片表面未覆盖保护层的部分直接区隔成二电极区,可供直接形成利于焊接的电极,亦可直接提供焊接应用,从而可排除现有技术不必要的电流传导阻抗、有效稳定减小电阻温度系数。Since the open-hole fixed-resistance chip resistor and its manufacturing method provided by the present invention use a bonding layer to relatively bond the base material and the metal sheet, the disadvantages of high cost of using semiconductor manufacturing processes in the prior art can be eliminated, and easy to manufacture, The effect of improving process yield and reducing cost; and the part of the surface of the metal sheet that is not covered with the protective layer is directly divided into two electrode areas, which can be used to directly form electrodes that are conducive to welding, and can also directly provide welding applications, thereby eliminating existing Technology unnecessary current conduction impedance, effectively and stably reduces the temperature coefficient of resistance.
附图说明 Description of drawings
图1A至图1F是显示本发明开孔定阻式芯片电阻器制法的第一实施例流程示意图;1A to FIG. 1F are schematic flow diagrams showing the first embodiment of the manufacturing method of the open-hole fixed-resistance chip resistor of the present invention;
图2A至图2F是显示本发明开孔定阻式芯片电阻器制法的第二实施例流程示意图;以及2A to 2F are schematic flow diagrams showing the second embodiment of the manufacturing method of the open-hole fixed-resistance chip resistor of the present invention; and
图3是显示本发明开孔定阻式芯片电阻器的使用状态热传导示意图。FIG. 3 is a schematic diagram showing the heat conduction of the open-hole fixed-resistance chip resistor in use according to the present invention.
元件符号说明Description of component symbols
1 基材 2 金属片1
21 中央开孔 23 电极区21 Central opening 23 Electrode area
3 结合层 4 保护层3 bonding
5 电极 6 外部装置5
61 线路接点61 line contacts
具体实施方式 Detailed ways
以下通过特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其它优点与功效。The implementation of the present invention is described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.
图1A至图1G是显示依照本发明开孔定阻式芯片电阻器制法第一实施例所绘制的流程图,如图所示,本发明所提供开孔定阻式芯片电阻器的制法,包括但不限于以下所述的流程。1A to FIG. 1G are flowcharts drawn according to the first embodiment of the manufacturing method of the aperture fixed resistance chip resistor of the present invention. As shown in the figure, the manufacturing method of the aperture fixed resistance chip resistor provided by the present invention includes but not limited to the processes described below.
如图1A与图1B所示,首先提供一基材1与具有中央开孔21的金属片2。所述该基材1是以采用氧化铝为主要材料的陶瓷基板为例,但是其是以具备绝缘特性为基本特性要求,并无特定限制。该金属片2是以中央开孔21定义其电阻值,于本实施例中,该金属片2的材料包括铜、锰、及锡的合金金属片,但非以此为限,于其它实施例中亦可为包括铜、锰、及镍的合金金属片。该中央开孔21是以可计算面积而换算成电阻值的形状为基本原则,并无特定限制,例如其形状可为选自圆形、方形、菱形、梯形、及等角多边形的其中一者,预先通过冲压或切削方式予以成形,该冲压方式例如为冲孔作业,该切削方式则例如为钻孔作业或铣孔作业。As shown in FIG. 1A and FIG. 1B , firstly, a
如图1C及图1D所示,接着通过一结合层3相对结合该基材1与该金属片2。该结合层3可采用相互间隔的至少二焊块,以进一步通过该二焊块的相对位置与宽度进一步调整金属片2的电阻值。该结合层3的形成顺序并无特定限制,于本实施例中,是由焊接材料预先涂布至该基材1表面,于贴合该金属片2后,经热熔还原成接合该基材1与该金属片2的例如为焊块的结合层3,所述该焊接材料是以银膏为例。As shown in FIG. 1C and FIG. 1D , the
当然,前述的结合层3亦非仅以采用相互间隔的至少二焊块为限,举凡可提供热熔接合制程并具备导热特性的接合材料均可,例如亦可经印刷整层的银膏于该基材1表面,并经烘烤热熔并经干燥而接合固定该基材1与该金属片2,所述一整层的银膏即相当于前述例如为二焊块的结合层3,非以本实施例所示的二焊块为限。此外,所述烘烤与干燥固化的步骤相当于回焊制程,可通过例如250℃的环境烘烤,并于室温下自然干燥固化,同样的并非亦此为限,举凡可实现烘烤与干燥固化的方法均符合本发明所述的热熔接合。Of course, the above-mentioned
如图1E所示,接着覆盖一保护层4至该金属片2局部表面,以使该金属片2表面未覆盖该保护层4的部分区隔成二电极区23,至此步骤即已视为制成开孔定阻式芯片电阻器的成品。所述该保护层4是以提供绝缘效果为基本特性要求,于本实施例中例如采用环氧树脂等绝缘材料,利用涂布方式覆盖至该金属片2的中段区域表面(包括顶面及侧面),以使该金属片2表面对应中段区域的两端区隔成二电极区23。于实际应用中,利用该金属片2表面所区隔成的二电极区23可直接焊接于外部装置,例如直接焊接于电路板的预定电路中。As shown in Figure 1E, then cover a
如图1F所示,因应后续实际应用的焊接便利性,复可于该金属片2的二电极区23表面分别形成电极5,以供焊接至例如需量测电位差的电路板中,于一较佳实施例中,该电极5是以滚镀方式形成至该电极区23表面,但非以此为限,举凡可直接于该电极区23表面形成电极5的方法均可,其基本条件是不再通过任何介于两者间的介质予以连接,例如可采用其它电镀方式或热压合方式,均属于无中间介质的可行方法。基于形成电极5的目的是提供对外焊接的便利性,该电极5的材料是以具备锡的合金材料为佳,例如包括铜、镍、锡三种金属材料的合金。As shown in Figure 1F, due to the convenience of welding in subsequent practical applications,
需特别陈明的是,本实施例中均以制作单一开孔定阻式芯片电阻器的制作流程为例进行说明,但非指定本发明的技术思想仅局限于此,举凡为了批量生产所为的生产惯用方法,例如将前述陶瓷基板1整合为多个矩阵排列的状态、以及将该定阻电阻体2整合为多个矩阵排列的状态,经后续制程同步完成多个开孔定阻式芯片电阻器之后,再予以切单完成,其制程步骤在不脱离本发明技术思想的情况下,均应隶属本发明所涵盖,而所为批量生产同步作业与切单作业为所属技术领域中技术人员所惯用且能理解而具以实施,于此不再搭配其它实施例另行赘述。What needs to be particularly stated is that in this embodiment, the production process of manufacturing a single-hole fixed-resistance chip resistor is used as an example for illustration, but it is not specified that the technical idea of the present invention is limited to this, and all production for mass production Conventional methods, such as integrating the aforementioned
图2A至图2G是显示依照本发明开孔定阻式芯片电阻器制法第二实施例所绘制的流程图,其中所揭示开孔定阻式芯片电阻器的制法,包括绝大部分相同于前述第一实施例的制程,并不改变任何所制得开孔定阻式芯片电阻器的结构,为使说明书清楚易懂,因此所有相同的元件均将采用相同符号表示,不再另行区分标号,仅以详述制程的共同与变化为主。2A to FIG. 2G are flow charts drawn according to the second embodiment of the manufacturing method of the opening fixed resistance chip resistor of the present invention, wherein the manufacturing method of the opening fixed resistance chip resistor disclosed includes most of the same as the aforementioned first The manufacturing process of the embodiment does not change the structure of any open-hole fixed-resistance chip resistors. In order to make the description clear and easy to understand, all the same components will be represented by the same symbols, and the labels will not be distinguished separately, only for detailed description The commonality and change of the process are the main ones.
如图2A与图2B所示,首先提供一基材1与一具有中央开孔21的金属片2。所述该基材1及该金属片2的特性与变化均与第一实施例相同,于此不再赘述。As shown in FIGS. 2A and 2B , firstly, a
如图2C及图2D所示,接着通过一结合层3相对结合该基材1与该金属片2。该结合层3可采用相互间隔的至少二焊块,或如前述的一整层焊料材,其形成顺序并无特定限制,于本实施例中,以二焊块为例的结合层3,是由焊接材料预先涂布至该金属片2表面,于贴合该基材1后,经热熔还原成接合该基材1与该金属片2的例如为焊块的结合层3,所述该焊接材料是以银膏为例。该结合层3的特性与变化相同于第一实施例,于此同样不再赘述。As shown in FIG. 2C and FIG. 2D , the
如图2E及图2F所示,接着进行覆盖保护层4的步骤、以及依据实际应用所需于二电极区23表面分别形成电极5的步骤、及该保护层4与电极5的特性与变化均相同于第一实施例,于此亦不再赘述。As shown in FIG. 2E and FIG. 2F, the step of covering the
另外,本发明还提供一种开孔定阻式芯片电阻器,如图1E或图2E所示,包括基材1、具有中央开孔21的金属片2、相对结合该基材1与该金属片2的结合层3、以及覆盖至该金属片2局部表面的保护层4,通过该保护层4使该金属片2表面未覆盖该保护层4的部分区隔成二电极区23。同时,该金属片2是以该中央开孔21的面积定义其电阻值,且该电阻值与该中央开孔21的面积成正比,即例如该中央开孔21为圆形时,其孔径越大则电阻值相对越大。In addition, the present invention also provides an open-hole fixed-resistance chip resistor, as shown in FIG. 1E or FIG. 2E , comprising a
前述该基材1、金属片2、结合层3、保护层4的材料特性与结构变化均相同于前述制法所述,于此不再另行赘述。另外,本发明所提供的开孔定阻式芯片电阻器,亦可如图1F或图2F所示,还包括形成于二电极区23表面的电极5。The aforementioned material properties and structural changes of the
图3是显示本发明所提供的开孔定阻式芯片电阻器应用于外部装置的使用状态热传导示意图,如图所示。开孔定阻式芯片电阻器的二电极区23表面的电极5可焊接至外部装置6(例如电路板)的电路中对应的线路接点61,因应前述开孔定阻式芯片电阻器的结构设计中,该电极5直接连接至金属片2,因此当该金属片2工作产生热量时,可如图中箭头方向所示,因为保护层4的阻挡而使热传导朝向导热性较佳的基材1,再由基材1经由金属片2两侧的电极为较佳路径传导至线路接点61。是以,热量可通过基材1热扩散,同时亦通过线路接点61直接传导至外部装置6的印刷线路中,防止热量直接扩散至下方而导致例如为电路板的外部装置6烧毁,由此,并可有效抑制因为电极5与金属片2的温度攀升而导致电阻温度系数的过大变化,是以可应用于极低电阻值的产品中。FIG. 3 is a schematic diagram showing the heat conduction of the open-hole fixed-resistance chip resistor provided by the present invention when it is applied to an external device, as shown in the figure. The
综上所述,本发明所提供的开孔定阻式芯片电阻器及其制法,是采用结合层来相对结合该基材与该金属片,因此可排除现有技术使用半导体制程的高成本缺点,达到易于制造、提升制程良率与降低成本的功效;而该金属片表面未覆盖保护层的部分直接区隔成二电极区,可供直接形成利于焊接的电极,亦可直接提供焊接应用,从而可排除现有技术不必要的电流传导阻抗、有效稳定减小电阻温度系数。因此,本发明所提供的开孔定阻式芯片电阻器及其制法已然克服现有技术中的种种缺陷。To sum up, the open-hole fixed-resistance chip resistor and its manufacturing method provided by the present invention use a bonding layer to relatively bond the base material and the metal sheet, thus eliminating the high-cost disadvantages of using semiconductor manufacturing processes in the prior art. It achieves the effects of easy manufacturing, improving process yield and reducing cost; and the part of the surface of the metal sheet that is not covered with the protective layer is directly divided into two electrode areas, which can be used to directly form electrodes that are conducive to welding, and can also directly provide welding applications, thereby Unnecessary current conduction resistance in the prior art can be eliminated, and the temperature coefficient of resistance can be effectively and stably reduced. Therefore, the open-hole fixed-resistance chip resistor and its manufacturing method provided by the present invention have overcome various defects in the prior art.
以上所述的具体实施例,仅用以例释本发明的特点及功效,而非用以限定本发明的可实施范畴,在未脱离本发明上述的精神与技术范畴下,任何运用本发明所揭示内容而完成的等效改变及修饰,均仍应为权利要求书的范围所涵盖。The specific embodiments described above are only used to illustrate the characteristics and effects of the present invention, rather than to limit the scope of the present invention. Without departing from the spirit and technical scope of the present invention, any application of the present invention Equivalent changes and modifications accomplished through the disclosed content should still be covered by the scope of the claims.
Claims (23)
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