CN101378267B - Primary and secondary switching device, and switching method using the same - Google Patents

Abstract

The present invention relates to an active-standby switching device and a method for using the device to switch between active and standby. The device includes a backplane and a first veneer and a second veneer that are completely identical in structure, components and logic circuits to each other. , the first single board is provided with a programmable logic device, a central processing unit and peripheral circuits, the programmable logic device and the central processing unit communicate bidirectionally through a local bus, and the input signals of the programmable logic device include: MS_IN, CL_IN, MS_HAND, SYS_DEF And CPU_WDI; output signals include: MS_OUT, CL_OUT; MS_OUT and CL_OUT output by the first board pass through the backplane and then input to the second board as MS_IN and CL_IN of the second board; MS_OUT and CL_OUT output by the second board pass through After the backplane, the MS_IN and CL_IN of the first board are respectively input to the first board. The technical scheme of the invention occupies a small amount of backplane interconnection signals, and reliably realizes active/standby switchover.

Description

An active/standby switching device and a method for performing active/standby switching using the device

technical field

The invention relates to an active-standby switching device and a method for using the device to perform active-standby switching.

Background technique

Communication network system equipment has very high reliability requirements. In order to improve system reliability, the main and standby hot backup working mode is usually adopted for key single boards. The main board interface signal output is enabled in the system, that is, works online in real time; while the standby board interface signal output is disabled in the system. The interface signals of the two boards are multiplexed together on the back board. When the main board fails, the system should be able to switch automatically to ensure the reliability of the system.

The existing master and backup technologies are as follows:

1. Use the RS trigger to realize simple interlocking of the hardware master and backup states. When one party initiates the master and slave switch command, the other party immediately changes the state accordingly. For example, the patent No. 02261600 is a patent named "Master and Standby Board Switching Device". The problem is that when a single board is removed or inserted or there is external interference, it is easy to cause abnormal active-standby switchover or even infinite oscillation in active-standby competition, resulting in system failure. On this basis, the patent application No. 03113177.8 titled "A master-standby switchover device and its switchover method" proposes a method of adding an unbalanced filter to the input master-standby signal to remove line jitter. The problem is that the sampling frequency of the unbalanced filter is determined according to the slot information of the board. When a board is plugged in or there is interference on the active and standby signals, the final decision on who will be active is entirely determined by the slot information. It may cause the original main board to become a backup, resulting in abnormal switching;

2. Patent No. 99229246.8 is a patent titled "A Switching Method of Main and Standby Boards of Electronic Communication System". If the system is ready for the switchover, the master-standby switchover process can be initiated. At this time, the master-standby switchover may cause the system to fall into a fault state. Moreover, during the process of unplugging and inserting a single board, the presence signal of the opposite board may fall off before the active/standby state pin/be contacted after the active/standby state pin, causing the unplugged/inserted single board to mistakenly believe that the state of the opposite board is abnormal, and the Due to the interlock mechanism of the active and standby states, the original active single board may become the standby at this time, causing the entire system to fail.

3. In order to solve the impact of plugging and unplugging the standby board on the main board, some master and backup technologies adopt the master lock method. If a fault occurs, the active state will be locked. For example, the patent No. 01121975.0 is entitled "Active-standby circuit switching equipment and its method", which can ensure that the active-standby relationship will not be abnormal during the normal unplugging process. However, in If the boards are not tightly inserted, loose during work, or interference signals appear on the backboard, it is likely that both boards will enter the active state. Or reset the single board, the two single boards will maintain the dual-master state, which may cause permanent damage to the device.

4. In order to achieve master-standby switchover without abnormality, the patent No. 01130715.3 titled "master-standby switchover control circuit and implementation method" implements a method of master-standby state control through a serial command interface. The implementation is complicated, and all operations need to be controlled by software. Once the software of the main single board fails, the system may be interrupted for a long time. Patent No. 98118143.0 The patent titled "Active/Standby Switching Device" proposes to determine the active and standby boards through the ID signal set on the motherboard. However, when a single board fails, it cannot autonomously control the main board Switching to standby, and at the same time, another single board is immediately converted from standby to active, which will cause system interruption.

5. In order to improve the reliability of the system, the patent application No. 200310111916 titled "A Master-Standby Switchover Control Method for Communication Equipment" proposes that the standby board resets the master board or the backup board initiates master-standby switchover function, but the reset protection work is not done enough, and abnormal active/standby switchover and active single board reset may occur when the board is unplugged or disturbed.

6. In order to achieve reliable master-standby switching, some designs introduce a lot of master-standby interconnection signals on the backplane, such as: master-standby competition signal, master-standby switchover signal, master-standby board power-on signal, master-standby failure signal, software configuration complete signal, watchdog overflow signal, etc. With the improvement of board integration, backplane wiring resources are becoming more and more precious, especially the boards that adopt the active/standby mechanism are mostly in the control and switching centers, and this problem becomes more prominent. At the same time, too many interfaces Signals make hardware less reliable.

Contents of the invention

The technical problem to be solved by the present invention is to provide an active-standby switchover device which occupies a small amount of backplane interconnection signals and reliably realizes active-standby switchover and a method for using the device to perform active-standby switchover.

The technical solution adopted by the present invention to solve its technical problems is:

A master-standby switching device, comprising a backplane and a first single board and a second single board which are mutually active and standby, the first single board is provided with a programmable logic device connected with a reset signal, a central processing unit and a peripheral A circuit, the programmable logic device and the central processing unit communicate bidirectionally through a local bus, and the logic input signal of the programmable logic device includes:

Board status indicator signal (MS_IN) and board command signal (CL_IN) are used to judge the status of the board and the board;

The manual master-standby switching signal (MS_HAND) and the single-board hardware working state signal (SYS_DEF) are output signals of the peripheral circuit, which are used as input signals of the programmable logic device;

The hardware feeding dog signal (CPU_WDI) of central processing unit is the output signal of described central processing unit, as the input signal of described programmable logic device, is used for the protection of central processing unit operation abnormal state;

The logic output signals of the programmable logic device include:

The board status indication signal (MS_OUT) is used to indicate the status of the board to the other board;

The command signal (CL_OUT) of this board is used to send commands or respond to the opposite board;

The structure, components, and logic circuits of the second single board are exactly the same as those of the first single board;

The board state indication signal (MS_OUT) and the board command signal (CL_OUT) output by the programmable logic device of the first single board are respectively used as the board-to-board status indication signal ( MS_IN) and board command signal (CL_IN) are input to the programmable logic device of the second single board; the board status indication signal (MS_OUT) and the board command signal ( CL_OUT) pass through the backplane and input to the programmable logic device of the first single board respectively as the board matching state indication signal (MS_IN) and the board matching command signal (CL_IN) of the first single board.

In the above solution, the programmable logic devices of the first single board and the second single board include an active/standby state command detection module, a board working state detection module, a central processing unit interface module, an active/standby state command storage module, The master-standby state decision-making module, the output interface module and the clock module; the master-standby state command detection module receives the board status indication signal (MS_IN) and the board command signal (CL_IN) to judge the presence of the board and the board 1. The active and standby state of the board and the indication of the board command, its output is connected to the main and standby state decision-making module; the said board working state detection module receives the single board hardware working state signal (SYS_DEF), manual mastering Standby switching signal (MS_HAND), the hardware feeding dog signal (CPU_WDI) of central processing unit and reset signal, its output is connected to described master-standby state decision-making module and master-standby state order storage module; Described central processing unit interface module passes local The bus communicates bidirectionally with the central processing unit, and the main-standby state command storage module communicates with the central processing unit interface module, the main-standby state decision-making module, and the output interface module respectively, and the output of the main-standby state decision-making module is connected to to the output interface module, and the output interface module outputs the local board status indication signal (MS_OUT) and local board command signal (CL_OUT) to the programmable logic device.

In the above scheme, the board-to-board status indication signal (MS_IN) and the board-to-board command signal (CL_IN) of the first single board and the second single board are pulled down by the board, and the first single board and the second single board The board status indication signal (MS_OUT) and the board command signal (CL_OUT) of the board are pulled on the backboard, so that the board status indication signal (MS_OUT) and the board command signal of the first single board and the second board are When the signal (CL_OUT) is not output, the outputs of the board alignment status indication signal (MS_IN) and the board alignment command signal (CL_IN) of the first board and the second board are at high level.

A method for performing master-standby switchover using the above-mentioned master-standby switchover device, after the first single board and the second single board are powered on and reset and determine the master-standby state, when the main board receives a switchover command to initiate the switchover, the master-standby Switching includes steps 4.1, 4.2, 4.3 and 4.4; where,

The power-on reset of the first single board and the second single board is realized through the power-on reset process of the single board, and the power-on reset process of the single board includes:

6.1 After the board is powered on and reset, it will remain offline and locked within the preset time;

6.2 The single board judges whether the board is in place through the board-to-board status indication signal (MS_IN) and the board-to-board command signal (CL_IN), if it is in place, then customize the delay according to the board position, otherwise, return to step 6.1;

6.3 After the delay, determine whether the board is in the offline locked state, if the board is not in the offline locked state, then determine the main and standby status of the board and the board status of the board The indication signal (MS_OUT) and the board command signal (CL_OUT) send corresponding signals, otherwise, the single board continues to maintain the offline locking state and repeat step 6.3;

The step 4.1 includes: judging whether the standby board is in place, if not, ending the master-standby switching process and determining the master-standby state, otherwise, entering step 4.2; the judgment of whether the slave board is in place is through the presence of a single board Judgment rules, the board in-position judgment rules include:

The rules for judging the presence of boards are as follows:

When the board is in the active state, the board-to-board status indication signal (MS_IN) of the board is a signal equal to or higher than the preset frequency;

When the board is in the standby state, the board-to-board status indication signal (MS_IN) and the board-to-board command signal (CL_IN) of the board are both signals equal to or higher than the preset frequency;

The rules for judging the presence of this board are as follows:

The board is in place or the board status indication signal (MS_IN) and the board command signal (CL_IN) of the board are high level;

Wherein, the determination of the main standby state is carried out through the main standby state determination process, and the main standby state determination process performs corresponding processing according to the judgment result of the board presence:

When the board is not in place: lock the board as an offline state within a preset timing period that is greater than the judgment time of the board status indication signal (MS_IN) of the board. After the timing period ends, re-query the status of the board. bit situation;

When the board is in place and the opposite board is not in place: set the board as the main state, and the board outputs the corresponding board status indication signal (MS_OUT) and the board command signal (CL_OUT);

When the board is in place and the opposite board is in place: determine the state of the opposite board according to the state indication signal (MS_IN) of the current board. The board is set to the active state;

The step 4.2 includes: the main board judges whether the pairing board is standby and working normally through the pairing board status indication signal (MS_IN) of the main board, and if it is in an abnormal working state, ends the master-standby switching process and enters the pairing board abnormal state Processing flow, otherwise, go to step 4.3;

The step 4.3 includes: the main board sends a master-standby switching preparation command through the board command signal (CL_OUT) of the main board, and the backup board receives the master-standby switchover through the board-to-board command signal (CL_IN) of the backup board Prepare command, after carrying out the preparation of main-standby switching, set the local board state indicating signal (MS_OUT) of described standby board as standby and get ready to switch state;

The main board waits for the board-to-board status indication signal (MS_IN) of the main board to be turned into a standby and ready to switch state and enter step 4.4;

The step 4.4 includes: the main board sends an active-standby switching command through the main board command signal (CL_OUT) of the main board, and the standby board receives the active-standby switching command through the board-to-board command signal (CL_IN) of the standby board. After the switching command, the board status indication signal (MS_OUT) of the backup board is set to the active state, and the main board then switches from the active state to the standby state.

In the above scheme, the process for processing the abnormal state of the board is the main board process, including:

8.1 After the alarm is reported, a reset board signal is sent through the board command signal (CL_OUT) of the main board;

8.1 Determine whether the board is in place, if it is in place, the board command signal (CL_OUT) of the main board continues to send the reset board signal, otherwise, the board command signal (CL_OUT) of the main board stops sending the reset board signal Signal.

In the above solution, the abnormal state processing process of the board is the backup board process, including:

9.1 After the alarm is reported, the standby board decides whether to reset the alignment board according to the instruction or the preset mode;

9.2 If the pairing board is not reset, end the abnormal state processing flow of the pairing board, otherwise enable the output of the backup board, set the status indication signal (MS_OUT) of the backup board as the main board, and pass the The board command signal (CL_OUT) of the standby board sends a reset board signal;

9.3 Determine whether the opposite board is in place, if it is in place, the command signal (CL_OUT) of the standby board continues to send the reset signal to the board, otherwise, the command signal (CL_OUT) of the standby board stops sending reset board signal.

In the above scheme, if the single-board hardware working status signal (SYS_DEF) of the main board or the backup board and the hardware feeding dog signal (CPU_WDI) of the central processing unit are in an abnormal state, the main board or the backup board enters the abnormal state processing flow of the board ;in,

When the main board is the main board, the processing flow of the abnormal status of the main board includes the following steps:

10.1.1 After the alarm is reported, the board status indication signal (MS_OUT) of the said board is set to be active and the work is abnormal;

10.1.2 Determine whether the opposite board is in place and works normally, if the opposite board is in place and works normally, then the said board sends the master/standby switching command, otherwise, return to step 10.1.1;

When the standby board is the main board, the process of handling the abnormal state of the main board includes the following steps:

10.2.1 After the alarm is reported, the board status indication signal (MS_OUT) of the said board is set to standby and works abnormally;

10.2.2 Decide whether to reset the board or put the board offline according to the preset mode.

Regardless of whether the board is active or standby, when the hardware feed dog signal (CPU_WDI) of the central processing unit is abnormal, the board will be reset directly.

The beneficial effects of the technical solution provided by the invention mainly show the following aspects:

1. The intercommunication information between the active and standby boards is very sufficient: including the active and standby status of the opposite board, the in-position status of the opposite board, the working state of the opposite board, etc., providing a reliable reference for issuing operation commands to the opposite board;

2. Strictly monitor the internal information of the board, including the on-site status of the board, the main and standby status of the board, the working status of the board, etc., to provide a reliable reference for determining the main and backup working mode of the board;

3. All the status information of the local board and the opposite board can be interacted to provide reliable and flexible control strategies;

4. The main and standby interconnection signals on the backplane are very simple, and only two pairs are needed to complete all status and command interaction functions;

5. Combining hardware autonomous control and software mandatory control, providing a stable and reliable master/standby switching and fault protection method;

6. Cooperating with programmable logic devices and software, it has the characteristics of flexible design, strong adaptability, and easy upgrade.

Description of drawings

Fig. 1 is a schematic structural view of the master-standby switching device of the present invention;

Fig. 2 is a schematic structural diagram of a programmable logic device in an active/standby switching device according to the present invention;

Fig. 3 is a flow chart of the method for performing master-standby switchover using the master-standby switchover device according to the present invention.

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings.

With reference to Fig. 1, a kind of main-standby switching device comprises backplane 115 and the first veneer 114 and the second veneer 119 of mutual main and standby, the first veneer 114 is provided with the PLD that is connected with RESET (reset) signal (Programable Logic Device, programmable logic device) 112, CPU (Central Processing Unit, central processing unit) 111 and peripheral circuit 113, PLD112 and CPU111 communicate bidirectionally through Local Bus (local bus), the logic input signal of PLD112 includes:

The board status indicator signal MS_IN and the board command signal CL_IN are used to judge the status of the board and the board;

The manual master/standby switching signal MS_HAND and the single-board hardware working status signal SYS_DEF are the output signals of the peripheral circuit, which are used as the input signal of the PLD112. SYS_DEF is the status indication signal synthesized after detection and collection of the main chip voltage, clock, temperature and other indicators. ;

The CPU’s hardware feed dog signal CPU_WDI is the output feed dog signal of the CPU, which is used as the input signal of the PLD112 to protect the abnormal state of the CPU on this board. , directly reset the board; it works together with the hardware watchdog to achieve double protection of system reliability without increasing the burden on the system;

The logic output signals of PLD112 include:

The status indication signal MS_OUT of this board is used to indicate the status of the board to the other board. MS_OUT has 5 status indications: main and working normally, main and working abnormally, standby and working normally, standby and ready to switch , standby and working abnormally; MS_OUT uses a group of signals of different frequencies to indicate the different states of the board. The higher the frequency selected, the faster the system response speed, but too high a frequency may interfere with other signals , can be selected according to specific circumstances;

The command signal CL_OUT of this board is used to send commands or respond to the opposite board; under normal circumstances, only the CL_OUT of the main board is used to send various commands to the backup board, such as reset, switching, etc., and the backup board will continuously monitor the corresponding The CL_IN of the standby board, and make corresponding operations, the CL_OUT of the standby board outputs a low-level pulse as a response when necessary; like the MS_OUT signal, the CL_OUT signal also uses a group of signals with different frequencies to represent different commands, and the frequency of this group can be the same as that of MS_OUT The same; CL_OUT has 4 states: active/standby switchover preparation command, active/standby switchover command, board reset command, and idle. When the standby board receives the master-standby switching command, it switches to the active state and outputs a low-level pulse on CL_OUT; after the main board enters the active-standby switching state and receives the falling edge of CL_IN, it sets the board to the standby state ;

The structure, components and logic circuits of the second veneer 119 are exactly the same as those of the first veneer 114;

The MS_OUT and CL_OUT output by the PLD112 of the first single board 114 pass through the backplane 115 and are respectively input as the MS_IN and CL_IN of the second single board 119 to the PLD117 of the second single board 119; the MS_OUT and CL_OUT output by the PLD117 of the second single board 119 pass through After the backplane 115, the MS_IN and CL_IN of the first single board 114 are respectively input to the PLD112 of the first single board 114; wherein, the MS_IN and CL_IN of the first single board 114 and the second single board 119 are pulled down on this board, and the first single board 114 and the MS_OUT and CL_OUT of the second single board 119 are pulled up on the backplane 115, so that when the MS_OUT and CL_OUT of the first single board 114 and the second single board 119 are not output, the first single board 114 and the second single board 119 The outputs of MS_IN and CL_IN are high level. The advantage of pulling MS_IN and CL_IN on this board is that whether the backplane pins are not in good contact, or hardware problems cause the MS_IN or CL_IN input pins to float, pulling MS_IN and CL_IN on the backplane will make the board offline.

The structure of PLD112 and PLD117 is as shown in Figure 2, respectively comprises main-standby state command detection module 202, this board working state detection module 203, CPU interface module 204, main-standby state command storage module 205, main-standby state decision-making module 206, output Interface module 207 and clock module 201; master-standby state command detection module 202 receives MS_IN and CL_IN to judge the presence of this board and the opposite board, the master-standby state of the opposite board and the command indication of the opposite board, and its output is connected to the master-standby State decision-making module 206; This board working state detection module 203 receives SYS_DEF, MS_HAND, CPU_WDI and RESET signal, and its output is connected to master-standby state decision-making module 206 and master-standby state command storage module 205; CPU interface module 204 communicates with CPU through Local Bus Two-way communication, the master-standby state command storage module 205 communicates with the CPU interface module 204, the master-standby state decision-making module 206, and the output interface module 207 respectively, and the output of the master-standby state decision-making module 206 is connected to the output interface module 207, and the output interface module 207 Output MS_OUT and CL_OUT to the PLD; where,

Clock module 201: generate clock and timer signals required by other modules;

The active/standby state command detection module 202 has three functions:

a. According to MS_IN, judge the active and standby status of the paired board;

b. According to MS_IN and CL_IN, jointly judge the presence of the board and the opposite board;

c. Monitor the order from the board.

The working state detection module 203 of this board has two functions:

a. Receive the fault detection signal of the board, the active/standby switching signal, and the reset signal, and perform necessary filtering to prevent misoperation caused by transient interference or false alarm;

b. Judging whether the CPU_WDI signal has timed out or not, which is used for system protection;

The CPU interface module 204 has two functions:

a. It is used to receive the software command word. If it is sent to the master-standby switching device and conforms to the preset format, the command word is written into the master-standby status command register;

b. Query the status of the current board and the board;

The master/standby status command storage module 205 has 3 functions:

a. Store software command words;

b. Store the running status of the software;

c. Store the status information of the board and the board;

Active/standby state decision module 206: determine the active/standby state information and command information of the own board according to the state information of the own board and the paired board, the command of the own board, and the command of the paired board;

Output interface module 207: convert the main/standby status information and command information of this board into preset specific waveforms.

In the process of using the above-mentioned active/standby switching device, if the mainboard needs to be plugged in, the mainboard must be switched to the standby state through manual or background operation before pulling out; the standby board is locked in the offline state during the plugging process Avoid the occurrence of the problem of standby board grabbing the master.

With reference to Fig. 3, use above-mentioned master-standby switching device to carry out the method for master-standby switchover, after the first veneer 114 and the second veneer 119 are powered on and reset and determine the master-standby state, when the mainboard receives a switchover command and initiates the switchover, the master-standby Switching involves the following steps:

Step 1: Determine whether the standby board is in place, if not, end the master-standby switching process and determine the master-standby status, otherwise, go to step 2;

Step 2: The motherboard judges through its MS_IN whether the opposite board is in standby and working normally. If it is in an abnormal working state, end the master-standby switching process and enter the abnormal state processing process of the opposite board. Otherwise, enter step 3;

Step 3: The main board sends the master-standby switchover preparation command through its CL_OUT, and the standby board receives the master-standby switchover preparation command through its CL_IN, and after preparing for the master-standby switchover, sets its MS_OUT to standby and is ready for the switchover state ;The main board waits for its MS_IN to turn to standby and is ready to switch to step 4;

Step 4: The main board sends the active/standby switching command through its CL_OUT, and after receiving the active/standby switching command through its CL_IN, the standby board sets its MS_OUT to the active state, enables all outputs, and at the same time switches on its CL_OUT Send a low pulse, the main board uses the CL_IN of the standby board to jump from high to low, and switch from the active state to the standby state.

In the above method, judging whether the board is in place is based on board presence judgment rules, and the board presence judgment rules include:

The rules for judging the presence of boards are as follows:

When the board is in the active state, the MS_IN of the board is a signal equal to or higher than the preset frequency;

When the board is in the standby state, the MS_IN and CL_IN of the board are signals equal to or higher than the preset frequency;

The rules for judging the presence of this board are as follows:

The opposite board is in position or the MS_IN and CL_IN of this board are both high.

The power-on reset master/standby status of the first single board 114 and the second single board 119 is determined to be realized through a single-board power-on reset process, and the single-board power-on reset process includes:

1. After the board is powered on and reset, it will remain in the offline locked state within the preset time;

2. The board judges whether the board is in place through MS_IN and CL_IN. If it is in place, customize the delay according to the board position, otherwise, return to the previous step;

3. After the delay, determine whether the board is in the offline locked state. If the board is not in the offline locked state, then the board determines its active and standby status and the MS_OUT and CL_OUT of the board send corresponding signals, otherwise , the board remains locked offline and repeats this step.

Set the preset time according to the system characteristics. Within this time, the single board should be in reliable contact with the socket and reach a stable working state in terms of electrical performance; According to the slot information, set different power-on to allow master and backup competition waiting delays.

Determining the primary and standby states of the first veneer 114 and the second veneer 119 needs to go through the primary and secondary state determination process, and the primary and secondary state determination process performs corresponding processing according to the judgment result of the board presence:

When the board is not in place: lock the board as offline within the preset timing period that is greater than the judgment time of the board's MS_IN, and re-query the board's presence status after the timing period ends;

When the board is in place and the opposite board is not: set the board as the main state, and the board outputs the corresponding MS_OUT and CL_OUT;

When the own board is in place and the opposite board is in place: determine the state of the opposite board according to the MS_IN of the current board.

The abnormal state processing process of the board includes two cases: the main board process and the standby board process;

The motherboard process includes:

1. After the alarm is reported, send a reset signal to the board through the CL_OUT of the main board;

2. Determine whether the board is in place. If it is in place, the CL_OUT of the main board will continue to send the reset board signal, otherwise, the CL_OUT of the board will stop sending the reset board signal;

The backup process includes:

1. After the alarm is reported, the standby board decides whether to reset the alignment board according to the instructions or the preset mode;

2. If the alignment board is not reset, the abnormal state processing flow of the alignment board is ended, otherwise, the output of the standby board is enabled, the MS_OUT of the standby board is set as the master, and the reset alignment signal is sent through its CL_OUT;

3. Determine whether the paired board is in place. If yes, the CL_OUT of the standby board continues to send the reset boarding signal, otherwise, the CL_OUT of the standby board stops sending the reset boarding signal.

If the SYS_DEF and CPU_WDI of the main board or the standby board are in the abnormal state, the main board or the standby board enters the process of processing the abnormal state of the board; among them,

When the main board is the main board, the processing flow of the abnormal status of the main board includes the following steps:

1. After the alarm is reported, the MS_OUT of this board is set as the master and works abnormally;

2. Determine whether the opposite board is in place and works normally. If the opposite board is in place and works normally, the board will send the master/standby switching command, otherwise, return to the previous step;

When the standby board is the main board, the process of handling the abnormal state of the main board includes the following steps:

1. After the alarm is reported, the MS_OUT of this board is set to standby and works abnormally;

2. Decide whether to reset the board or put the board offline according to the preset mode.

Regardless of whether the board is active or standby, when the hardware feed dog signal (CPU_WDI) of the central processing unit is abnormal, the board will be reset directly.

Claims (7)

1. A master-slave switching device comprises a back plate, a first single plate and a second single plate which are mutually a master-slave, and is characterized in that:

the first single board is provided with a programmable logic device connected with a reset signal, a central processing unit and a peripheral circuit, the programmable logic device and the central processing unit are in two-way communication through a local bus, and a logic input signal of the programmable logic device comprises:

the system comprises a pair board state indication signal (MS _ IN) and a pair board command signal (CL _ IN), wherein the pair board state indication signal (MS _ IN) and the pair board command signal (CL _ IN) are used for judging the IN-place conditions of a board and a pair board;

a manual master/standby switching signal (MS _ HAND) and a single-board hardware working state signal (SYS _ DEF) are output signals of the peripheral circuit and serve as input signals of the programmable logic device;

a hardware dog feeding signal (CPU _ WDI) of the central processing unit, which is an output signal of the central processing unit and is used as an input signal of the programmable logic device and is used for protecting the running abnormal state of the central processing unit of the board;

the logic output signals of the programmable logic device comprise:

a board status indication signal (MS _ OUT) for indicating a board status to the pair of boards;

a native board command signal (CL _ OUT) for sending commands to or responding to the native board;

the structure, components and logic circuits of the second single board are completely the same as those of the first single board;

a board state indicating signal (MS _ OUT) and a board command signal (CL _ OUT) output by the programmable logic device of the first board pass through the backplane and are respectively used as a board state indicating signal (MS _ IN) and a board command signal (CL _ IN) of the second board to be input to the programmable logic device of the second board; and the board state indication signal (MS _ OUT) and the board command signal (CL _ OUT) output by the programmable logic device of the second board pass through the backplane and are respectively used as a board state indication signal (MS _ IN) and a board command signal (CL _ IN) of the first board to be input to the programmable logic device of the first board.

2. The active-standby switching device according to claim 1, wherein: the programmable logic devices of the first single board and the second single board comprise a main/standby state command detection module, a local board working state detection module, a central processing unit interface module, a main/standby state command storage module, a main/standby state decision module, an output interface module and a clock module; the main/standby state command detection module receives the opposite board state indication signal (MS _ IN) and the opposite board command signal (CL _ IN) to judge the on-position condition of the board and the opposite board, the main/standby state of the opposite board and the opposite board command indication condition, and the output of the main/standby state command detection module is connected to the main/standby state decision module; the board working state detection module receives the single board hardware working state signal (SYS _ DEF), the manual master-slave switching signal (MS _ HAND), the hardware dog feeding signal (CPU _ WDI) of the central processing unit and the reset signal, and the output of the local board working state detection module is connected to the master-slave state decision module and the master-slave state command storage module; the CPU interface module is in bidirectional communication with the CPU through a local bus, the main/standby state command storage module is in bidirectional communication with the CPU interface module, the main/standby state decision module and the output interface module respectively, the output of the main/standby state decision module is connected to the output interface module, and the output interface module outputs the board state indication signal (MS _ OUT) and the board command signal (CL _ OUT) to the programmable logic device.

3. The active-standby switching device according to claim 2, wherein: the board state indicating signal (MS _ IN) and the board command signal (CL _ IN) of the first board and the second board are pulled down IN the board, and the board state indicating signal (MS _ OUT) and the board command signal (CL _ OUT) of the first board and the second board are pulled up IN the backplane, so that when the board state indicating signal (MS _ OUT) and the board command signal (CL _ OUT) of the first board and the second board are not output, the output of the board state indicating signal (MS _ IN) and the board command signal (CL _ IN) of the first board and the second board is at a high level.

4. A method of performing active-standby switching using the active-standby switching device according to claim 1, characterized in that: after the first single board and the second single board are powered on and reset and the main/standby states are determined, when the main board receives a switching command to initiate switching, the main/standby switching comprises steps 4.1, 4.2, 4.3 and 4.4; wherein,

the power-on reset of the first single board and the second single board is realized through a single board power-on reset process, and the single board power-on reset process comprises the following steps:

6.1 the single board keeps an offline locking state within a preset time after power-on reset;

6.2 the single board judges whether the board is IN place or not according to the board state indication signal (MS _ IN) and the board command signal (CL _ IN), if so, the time delay is customized according to the board position, otherwise, the step 6.1 is returned to;

6.3 after the time delay, judging whether the single board is in an offline locking state, if the single board is in a non-offline locking state, determining the active/standby state of the single board by the single board, and sending corresponding signals to a local board state indication signal (MS _ OUT) and a local board command signal (CL _ OUT) of the single board, otherwise, continuously keeping the offline locking state by the single board and repeating the step 6.3;

the step 4.1 comprises the following steps: judging whether the standby board is in place, if not, ending the main/standby switching process and determining the main/standby state, otherwise, entering the step 4.2; the judging whether the standby board is in place is based on a single board in-place judgment rule, where the single board in-place judgment rule includes:

the in-place judgment rule of the board is as follows:

when the board is IN a main state, a board state indication signal (MS _ IN) of the board is a signal equal to or higher than a preset frequency;

when the board is IN a standby state, the board state indication signal (MS _ IN) and the board command signal (CL _ IN) of the board are both signals with the frequency equal to or higher than the preset frequency;

the on-site judgment rule of the board is as follows:

the on-board state indication signal (MS _ IN) and the on-board command signal (CL _ IN) of the on-board or the local board are both high level;

the determination of the main standby state is performed through a main standby state determination process, and the main standby state determination process performs corresponding processing according to the judgment result of the in-place board:

when the plate is not in place: locking the board to be IN an off-line state within a preset timing period which is longer than the judging time of a board state indicating signal (MS _ IN) of the board, and after the timing period is finished, re-inquiring the on-site condition of the board;

the plate is in place, and when the plate is not in place: setting the board to be in a main state, and outputting a corresponding board state indication signal (MS _ OUT) and a corresponding board command signal (CL _ OUT) by the board;

this board is on the throne, when the board is on the throne: determining the state of the opposite board according to an opposite board state indication signal (MS _ IN) of the local board, if the opposite board is IN a main state, the local board is IN a standby state, otherwise, the local board is IN the main state;

the step 4.2 comprises the following steps: the main board judges whether the board is IN a standby and normal working state or not through a board-to-board state indication signal (MS _ IN) of the main board, if the board is IN an abnormal working state, the main-standby switching process is ended, and a board-to-board abnormal state processing process is started, otherwise, the step 4.3 is started;

the step 4.3 comprises the following steps: the main board sends a main-standby switching preparation command through a main board command signal (CL _ OUT) of the main board, the standby board receives the main-standby switching preparation command through a pair board command signal (CL _ IN) of the standby board, and after preparation of main-standby switching is carried OUT, a main board state indication signal (MS _ OUT) of the standby board is set to be standby and ready for switching; the mainboard waits for the board-to-board state indication signal (MS _ IN) of the mainboard to be converted into a standby state and enters a step 4.4 after the standby state and the ready switching state;

the step 4.4 comprises: the main board sends a main/standby switching command through a main board command signal (CL _ OUT) of the main board, the standby board sets a main board state indication signal (MS _ OUT) of the standby board to be IN a main state after receiving the main/standby switching command through a pair board command signal (CL _ IN) of the standby board, and the main board then switches from the main state to the standby state.

5. The method of performing active-standby switching according to claim 4, wherein: the processing flow for the abnormal state of the board is a mainboard flow, and the processing flow comprises the following steps:

8.1 sending a reset board-to-board signal through a board command signal (CL _ OUT) of the main board after alarming;

8.1 judging whether the board is in place, if so, continuing to send the reset board-to-board signal by the local board command signal (CL _ OUT) of the main board, otherwise, stopping sending the reset board-to-board signal by the local board command signal (CL _ OUT) of the main board.

6. The method of performing active-standby switching according to claim 4, wherein: the processing flow of the abnormal state of the board is a standby board flow, and the method comprises the following steps:

9.1 after the alarm is given, the standby board determines whether to reset the opposite board according to the indication or the preset mode;

9.2 if the opposite board is not reset, ending the abnormal state processing flow of the opposite board, otherwise enabling the output of the standby board, setting a local board state indication signal (MS _ OUT) of the standby board as a main use, and simultaneously sending a reset opposite board signal through a local board command signal (CL _ OUT) of the standby board;

9.3, judging whether the pair board is in place, if so, continuing to send the reset pair board signal by the local board command signal (CL _ OUT) of the standby board, otherwise, stopping sending the reset pair board signal by the local board command signal (CL _ OUT) of the standby board.

7. The method of performing active-standby switching according to claim 4, wherein: if the single-board hardware working state signal (SYS _ DEF) of the main board or the standby board and the hardware dog feeding signal (CPU _ WDI) of the central processing unit are in abnormal states, the main board or the standby board enters a local board abnormal state processing flow; wherein,

when the main board is the main board, the abnormal state processing flow of the main board comprises the following steps:

10.1.1, when alarming, the state indication signal (MS _ OUT) of the board is set as the primary state and the working state is abnormal;

10.1.2, judging whether the pair boards are in place and work normally, if the pair boards are in place and work normally, sending a main/standby switching command by the board, otherwise, returning to the step 10.1.1;

when the standby board is the board, the abnormal state processing flow of the board comprises the following steps:

10.2.1, after alarming, setting a local board state indication signal (MS _ OUT) of the local board to be standby and in an abnormal working state;

10.2.2 determining whether to reset the board or to put the board in an off-line state according to a preset mode;

no matter the board is in use or standby, when the hardware dog feeding signal (CPU _ WDI) of the CPU is abnormal, the board is directly reset.

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