CN101452918A - Carrier plate module with embedded phase-locked loop, integrated system and manufacturing method thereof - Google Patents
Carrier plate module with embedded phase-locked loop, integrated system and manufacturing method thereof Download PDFInfo
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Abstract
Description
技术领域 technical field
本发明涉及一种整合型系统,尤指一种使用内部嵌入锁相回路(Embedded phase-locked loop)的载板模块的整合型系统,及其相关的制造方法。The present invention relates to an integrated system, especially an integrated system using a carrier board module with an embedded phase-locked loop (Embedded phase-locked loop) inside, and a related manufacturing method.
背景技术 Background technique
参考振荡讯号为数字逻辑运作的基础。晶体振荡器输出讯号的频率稳定度虽优于LC振荡器,然其频率却不易改变,而使用锁相回路(Phase-locked loop)所制作的振荡电路则兼具振荡频率范围广阔,及频率稳定度高等优异性能,因而被诸多电子系统所采用。The reference oscillator signal is the basis of digital logic operation. Although the frequency stability of the output signal of the crystal oscillator is better than that of the LC oscillator, its frequency is not easy to change, and the oscillation circuit made by using a phase-locked loop (Phase-locked loop) has both a wide range of oscillation frequency and stable frequency. High precision and other excellent performance, so it is adopted by many electronic systems.
请参阅图1,该图为一典型的锁相回路的系统架构示意图,显示锁相回路10的基本架构,用以简述其动作原理。如图1所示,锁相回路10主要包括有一基准频率振荡器101、相位频率比较器103、压控振荡器105及环路滤波器107。基准频率振荡器101输出频率为fr的振荡讯号,压控振荡器105则输出频率为fo的振荡讯号。相位频率比较器103比较fr与fo,从而输出误差讯号PD以正负脉冲来表示fr与fo大小关系。环路滤波器107再将误差讯号PD转换为直流电压讯号Vr,输出控制压控振荡器105的输出频率fo,通过此回授架构便能控制fo与fr达到一致,使得压控振荡器105的输出频率与基准频率振荡器101同步稳定。Please refer to FIG. 1 , which is a schematic diagram of a typical PLL system structure, showing the basic structure of the PLL 10 to briefly describe its operating principle. As shown in FIG. 1 , the phase locked loop 10 mainly includes a reference frequency oscillator 101 , a phase frequency comparator 103 , a voltage controlled oscillator 105 and a loop filter 107 . The reference frequency oscillator 101 outputs an oscillating signal with a frequency fr, and the voltage-controlled oscillator 105 outputs an oscillating signal with a frequency fo. The phase-frequency comparator 103 compares fr and fo, thereby outputting the error signal PD as positive and negative pulses to represent the relationship between fr and fo. The loop filter 107 then converts the error signal PD into a DC voltage signal Vr, and outputs the output frequency fo to control the voltage-controlled oscillator 105. Through this feedback structure, fo and fr can be controlled to be consistent, so that the voltage-controlled oscillator 105 The output frequency is stabilized synchronously with the reference frequency oscillator 101 .
运用除频器来改变锁相回路回馈路径的参数,便能得到各种不同的输出频率,可应用为计算机系统的时脉产生器。通讯系统中,设于各种有线及无线收发装置前端的频率合成器,亦是利用锁相回路来产生精准的本地振荡频率讯号,以达到对射频讯号升频与降频功能。此外,许多控制系统(例如:光驱控制系统)也利用锁相回路技术来达成精密控制。因此,锁相回路渐为许多电子系统的必备单元。By using the frequency divider to change the parameters of the phase-locked loop feedback path, various output frequencies can be obtained, which can be used as a clock generator for computer systems. In the communication system, the frequency synthesizer installed at the front end of various wired and wireless transceiver devices also uses the phase-locked loop to generate accurate local oscillator frequency signals to achieve the function of up-converting and down-converting radio frequency signals. In addition, many control systems (such as optical drive control systems) also use phase-locked loop technology to achieve precise control. Therefore, the phase-locked loop has gradually become an essential unit of many electronic systems.
由于制造工艺持续精进,结合半导体制程技术、芯片封装技术以及印刷电路板制造技术,电子系统便可整合为小型化的模块产品,成为后端产品的零元件之一,直接配设于电路板上,而达到降低后端产品设计复杂度的功效。为了配合电子产品多功能整合及小型化的趋势,模块产品也面临持续整合化与小型化的需求。以射频模块为例,整合多个通讯系统,或整合通讯系统与应用系统于单一模块内部便是目前的主要发展方向。然如此一来,模块内部的电路便会相对增加。Due to the continuous improvement of the manufacturing process, combined with semiconductor process technology, chip packaging technology and printed circuit board manufacturing technology, the electronic system can be integrated into a miniaturized module product, which becomes one of the components of the back-end product and is directly arranged on the circuit board. , so as to achieve the effect of reducing the complexity of back-end product design. In order to meet the trend of multi-functional integration and miniaturization of electronic products, module products are also facing the demand for continuous integration and miniaturization. Taking RF modules as an example, integrating multiple communication systems, or integrating communication systems and application systems in a single module is the current main development direction. However, in this way, the circuit inside the module will increase relatively.
本发明人有鉴于锁相回路的零件线路往往占据着一定的构装面积,使得剩余可用区域有限,将造成整合功能单元面临困难,从而提出本发明以改善此缺陷。In view of the fact that the parts and circuits of the phase-locked loop often occupy a certain construction area, the remaining available area is limited, which will cause difficulties in integrating functional units, and thus propose the present invention to improve this defect.
发明内容 Contents of the invention
因此,本发明的目的在于克服现有技术的不足与缺陷,提出一种具嵌入式锁相回路(Phase-locked loop)的载板模块,及其应用的整合型系统与相关的制造方法,其通过将锁相回路整合内嵌于载板模块,可减少整合型系统的表面元件及线路,从而降低构装面积,提升构装密度,并可缩短讯号传输路径,从而提升载板模块及相关整合型系统性能与可靠度。Therefore, the object of the present invention is to overcome the deficiencies and defects of the prior art, and propose a carrier module with an embedded phase-locked loop (Phase-locked loop), an integrated system for its application, and a related manufacturing method. By integrating and embedding the phase-locked loop in the carrier module, the surface components and circuits of the integrated system can be reduced, thereby reducing the construction area, increasing the construction density, and shortening the signal transmission path, thereby improving the carrier module and related integration. system performance and reliability.
为达上述目的,本发明提供一种具嵌入式锁相回路的载板模块,此载板模块包括一基板、一多层板结构、一内埋电路单元及一外部电路单元。多层板结构形成于基板之内,内埋电路单元整合于多层板结构内部,外部电路单元设置于基板的上表面,并电性耦接于内埋电路单元,以与其共同组成一锁相回路。To achieve the above purpose, the present invention provides a carrier module with an embedded phase-locked loop, the carrier module includes a substrate, a multi-layer board structure, an embedded circuit unit and an external circuit unit. The multi-layer board structure is formed in the substrate, the embedded circuit unit is integrated inside the multi-layer board structure, the external circuit unit is arranged on the upper surface of the substrate, and is electrically coupled to the embedded circuit unit to form a phase-locked circuit together. circuit.
为达上述目的,本发明再提供一种制造方法,适用于制作所述的具嵌入式锁相回路的载板模块,此制造方法的步骤包括:首先,提供基板;其次,整合内埋电路单元形成多层板结构于基板之内;最后,设置外部电路单元于基板的上表面,使外部电路单元电性耦接于内埋电路单元。In order to achieve the above purpose, the present invention further provides a manufacturing method, which is suitable for manufacturing the carrier module with an embedded phase-locked loop. The steps of the manufacturing method include: firstly, providing the substrate; secondly, integrating the embedded circuit unit A multi-layer board structure is formed in the substrate; finally, an external circuit unit is arranged on the upper surface of the substrate, so that the external circuit unit is electrically coupled to the embedded circuit unit.
为达上述目的,本发明另提供一种整合型系统,其具有所述的具嵌入式锁相回路的载板模块及至少一功能单元,此功能单元搭载于基板的上表面,并电性耦接于锁相回路。In order to achieve the above purpose, the present invention further provides an integrated system, which has the above-mentioned carrier module with an embedded phase-locked loop and at least one functional unit, the functional unit is mounted on the upper surface of the substrate, and is electrically coupled connected to the phase-locked loop.
为达上述目的,本发明再提供一种整合型系统的制造方法,其步骤包括:首先,提供所述的具嵌入式锁相回路的载板模块;以及,搭载至少一功能单元于基板的上表面,使功能单元电性耦接于锁相回路。In order to achieve the above purpose, the present invention further provides a method for manufacturing an integrated system, the steps of which include: first, providing the carrier module with an embedded phase-locked loop; and carrying at least one functional unit on the substrate On the surface, the functional unit is electrically coupled to the phase-locked loop.
以上的概述与接下来的详细说明及附图,皆是为了能进一步说明本发明为达成预定目的所采取的方式、手段及功效。而有关本发明的其它目的及优点,将在后续的说明及附图中加以阐述。The above overview, the following detailed description and accompanying drawings are all for further explaining the ways, means and effects of the present invention to achieve the intended purpose. Other purposes and advantages of the present invention will be described in the subsequent description and accompanying drawings.
附图说明 Description of drawings
图1为一典型的锁相回路的系统架构示意图;FIG. 1 is a schematic diagram of a system architecture of a typical phase-locked loop;
图2为本发明的整合型系统的系统架构示意图;2 is a schematic diagram of the system architecture of the integrated system of the present invention;
图3为本发明的锁相回路的元件架构示意图;3 is a schematic diagram of the component architecture of the phase-locked loop of the present invention;
图4为本发明的具嵌入式锁相回路的载板模块暨整合型系统的结构示意图;FIG. 4 is a structural schematic diagram of a carrier board module and an integrated system with an embedded phase-locked loop of the present invention;
图5为本发明的具嵌入式锁相回路的载板模块暨整合型系统的第一实施例的结构示意图;5 is a schematic structural view of a first embodiment of a carrier module with an embedded phase-locked loop and an integrated system of the present invention;
图6为本发明的具嵌入式锁相回路的载板模块暨整合型系统的第二实施例的结构示意图;6 is a schematic structural view of a second embodiment of a carrier module with an embedded phase-locked loop and an integrated system of the present invention;
图7为本发明的具嵌入式锁相回路的载板模块的制造方法的步骤流程图;7 is a flow chart of the steps of the manufacturing method of the carrier module with an embedded phase-locked loop of the present invention;
图8为本发明的整合型系统的制造方法的步骤流程图。FIG. 8 is a flow chart of the steps of the manufacturing method of the integrated system of the present invention.
图中符号说明Explanation of symbols in the figure
10、200、300、400 锁相回路10, 200, 300, 400 Phase-locked loop
101、201 基准频率振荡器101, 201 Reference frequency oscillator
103 相位频率比较器103 Phase Frequency Comparator
105 压控振荡器105 Voltage Controlled Oscillator
107 环路滤波器107 Loop filter
20、30、40 整合型系统20, 30, 40 Integrated systems
203 主要电路芯片203 main circuit chip
205 外围被动元件单元205 Peripheral passive component unit
21、31、41 基板21, 31, 41 Substrate
33、43 多层板结构33, 43 Multilayer board structure
25、35、45 载板模块25, 35, 45 Carrier module
220、320、420 外部电路单元220, 320, 420 External circuit unit
225、325、425 内埋电路单元225, 325, 425 Embedded circuit unit
250 功能单元250 Functional units
PD、Vr 讯号PD, Vr Signal
fr、fo 频率fr, fo frequency
S100~S202 各个步骤流程S100~S202 Each step process
具体实施方式 Detailed ways
本发明将锁相回路内嵌于载板模块的内部,从而达到提高整合形系统的表面构装区域的功效。请参阅图2,该图为本发明的整合型系统的系统架构示意图。如图2所示,整合型系统20包括有一锁相回路200及一功能单元250,功能单元250电性耦接于锁相回路200,以与其共同运作。The invention embeds the phase-locked loop inside the carrier board module, so as to achieve the effect of improving the surface mounting area of the integrated system. Please refer to FIG. 2 , which is a schematic diagram of the system architecture of the integrated system of the present invention. As shown in FIG. 2 , the
所述的整合型系统20为利用半导体成型、封装制程技术及印刷电路板制造技术所制成的模块系统产品,而功能单元250则是泛指须与锁相回路200协同运作的电子系统。于一具体实施例,功能单元250为一逻辑运算系统(例如:一计算机系统),而锁相回路200作为此系统的时脉产生源(Clock source),可产生至少一工作时脉讯号输出至功能单元250。The
于另一具体实施例,功能单元250为一通信前端射频讯号处理系统,而锁相回路200作为此系统的频率合成器(Frequency synthesizer),用以产生至少一本地震荡讯号输出至功能单元250的混波器,支持射频讯号处理;或由功能单元250将射频讯号输出至锁相回路200,利用锁相回路200对射频讯号作升、降频等调频处理后,再将经调整的射频讯号传回功能单元250。In another specific embodiment, the
于再一实施例,功能单元250为一同步光通讯系统,利用锁相回路200对资料讯号作时脉回复处理(Clock data recovery)。In yet another embodiment, the
除了上述实例之外,功能单元250亦可为任一控制系统,利用锁相回路200来达成精密控制,或产生工作时脉讯号。上述实例的锁相回路200的应用电路架构为现有技术,因此在此便不再作赘述。In addition to the above examples, the
再者,整合型系统20内部可包括一或多个锁相回路及功能单元,图中以单一锁相回路200与功能单元250作为图例,然其并非用以限定本发明的范围。Furthermore, the
接着,请参阅图3,该图为本发明的锁相回路200的元件架构示意图。锁相回路200的主要电路已可被整合为集成电路芯片以便于应用,因此,如图3所示,锁相回路200的零元件大体包括有至少一基准频率振荡器201、一主要电路芯片203及一外围被动元件单元205,基准频率振荡器201与外围被动元件单元205耦接于主要电路芯片203,以共同达成电路机能。Next, please refer to FIG. 3 , which is a schematic diagram of the component structure of the phase-locked
鉴于现有技术将模块电路搭载于载板模块的表面,对模块表面的可用区域造成限制,导致功能整合面临困难的缺陷,故本发明运用元件埋入构装技术,将锁相回路200嵌入载板模块内部。请同时参阅图3及图4,图4为本发明的具嵌入式锁相回路的载板组暨整合型系统的结构示意图。其中将锁相回路200的基准频率振荡器201、主要电路芯片203及外围被动元件205,按元件类别与线路关系,区分为一内埋电路单元225及一外部电路单元220。In view of the fact that the existing technology mounts the module circuit on the surface of the carrier module, which limits the usable area of the module surface and leads to the difficulty of functional integration, so the present invention uses the component embedding technology to embed the phase-locked
图4中,具嵌入式锁相回路的载板模块25包括有一基板21、一多层板结构(图未示)、一内埋电路单元225及一外部电路单元220。多层板结构形成于基板21之内,内埋电路单元225则是以半导体制程技术或印刷电路板增层技术整合于多层板结构内部,外部电路单元220设置于基板21的上表面,并电性耦接于内埋电路单元225,以与其共同组成锁相回路20。功能单元250同样是搭载于基板21的上表面,并电性耦接于锁相回路20。In FIG. 4 , the
请参阅图5及图6,该二图为本发明的具嵌入式锁相回路的载板模块暨整合型系统的二实施例的结构示意图。Please refer to FIG. 5 and FIG. 6 , which are structural schematic diagrams of two embodiments of the carrier module with embedded phase-locked loop and the integrated system of the present invention.
图5的整合型系统30中,内埋电路单元325主要为被动元件,而基准频率振荡器201、主要电路芯片203与部份不适合埋入的元件,分布于外部电路单元320。In the
基板31中的多层板结构33与内埋电路单元325的整合方法大致包括两种:There are roughly two methods for integrating the
第一种方法是以硅芯片材料经由半导体制程技术,按照电路特性,采用特定介电系数及电阻基板材料、有机玻璃纤维基板,来进行被动元件的堆叠整合,形成内埋电容、电阻与传输线,进而形成多层板结构33;The first method is to use silicon chip materials through semiconductor process technology, according to circuit characteristics, use specific dielectric coefficient and resistance substrate materials, and organic glass fiber substrates to stack and integrate passive components to form embedded capacitors, resistors and transmission lines. And then form the
第二种方法则是运用印刷电路板增层技术,利用金属导线或与薄层金属电阻薄膜元件于介电材料上,来形成多层板结构33。The second method is to use the printed circuit board build-up technology to form the
基板31中的多层板结构33形成后,便可接着形成其表面的线路及焊垫,以供搭载外部电路单元320元件与功能单元250。而外部电路单元320的元件可与功能单元250同时以SMT制程黏着于基板31的表面;或将全部或部分的外部电路单元320零件黏着于基板31,形成次模块。After the
图6的整合型系统40中,内埋电路单元425除了被动元件之外,尚包括主要电路芯片203。多层板结构43可采用印刷电路板增层结构来形成,整合金属导线与薄层金属电阻薄膜元件于介电材料上,过程中并将主要电路芯片203埋藏于其中。此实施例中,主要电路芯片203应选用厚度较薄的芯片较佳。基板41中的多层板结构43形成后,再形成其表面线路及焊垫,以搭载外部电路单元420元件与功能单元250,完成整合型系统40。In the
埋入式零件线路将使得传输距离缩短,进而可让模块的电性与可靠度更为优化;而采用此制程,可利用导热柱连接至基板31、41的底层,帮助主要电路芯片203散热。另外附带一提的是,上述多层板结构33、43内部整合的内埋电路单元325、425可预先经由电路仿真软件,参照基板材料介电参数等特性,来配置被动元件与传输线结构,使得电气特性最佳化。Embedded component lines will shorten the transmission distance, thereby optimizing the electrical performance and reliability of the module; and using this process, the heat conduction column can be used to connect to the bottom layer of the
以下提出所述的具嵌入式锁相回路的载板模块与整合型系统的制造方法。请参阅图7,该图为本发明的具嵌入式锁相回路的载板模块的制造方法的步骤流程图。其中相关的结构请同时参阅图4。如图7所示,此制造方法包括有下列步骤:The manufacturing method of the above-mentioned carrier module with embedded PLL and integrated system is proposed below. Please refer to FIG. 7 , which is a flow chart of the steps of the manufacturing method of the carrier module with embedded PLL of the present invention. Please refer to FIG. 4 for related structures. As shown in Figure 7, this manufacturing method comprises the following steps:
首先,提供基板21(步骤S100);First, a substrate 21 is provided (step S100);
其次,整合内埋电路单元225形成多层板结构于基板21之内(步骤S102)及Next, integrate the embedded
最后,设置外部电路单元220于基板21的上表面,使外部电路单元220电性耦接于内埋电路单元225,以与其共同组成一锁相回路200(步骤S104)。Finally, the
多层板结构可经由半导体制程技术或印刷电路板增层技术来形成。The multi-layer board structure can be formed by semiconductor process technology or printed circuit board build-up technology.
接着,请参阅图8,该图为本发明的整合型系统的制造方法的步骤流程图。其中相关的结构亦请同时参照图4。如图8所示,该制造方法包括下列步骤:Next, please refer to FIG. 8 , which is a flowchart of steps of the manufacturing method of the integrated system of the present invention. Please also refer to FIG. 4 for related structures. As shown in Figure 8, the manufacturing method comprises the following steps:
首先,提供具嵌入式锁相回路200的载板模块25(步骤S200);及First, provide a
接着,搭载功能单元250于载板模块25的基板21的上表面,使功能单元250电性耦接于锁相回路200(步骤S202)。Next, mount the
通过以上实例详述,本发明的具嵌入式锁相回路的载板模块与整合型系统及其相关的制造方法,将锁相回路整合于载板模块的基板内,以减少锁相回路所占用的面积,从而使得功能线路的配置更具余裕;将锁相回路嵌入基板并可缩短讯号传输路径,而提升载板模块与整个整合型系统性能与可靠度。由此可见,本发明将锁相回路嵌入载板模块的基板内部的技术,将可使得载板模块构装简化,降低相关制程成本,也增加了其它线路的可用空间,降低载板模块整合更多功能单元的难度,并使得载板模块的电气特性更佳,对制造端与后端应用者均有所裨益。Through the above examples, the carrier module with embedded phase-locked loop and the integrated system and the related manufacturing method of the present invention integrate the phase-locked loop into the substrate of the carrier module to reduce the occupation of the phase-locked loop The area is smaller, so that the configuration of functional circuits is more plentiful; the phase-locked loop is embedded in the substrate and the signal transmission path can be shortened, thereby improving the performance and reliability of the carrier board module and the entire integrated system. It can be seen that the technology of embedding the phase-locked loop inside the substrate of the carrier module in the present invention will simplify the structure of the carrier module, reduce related manufacturing costs, increase the available space for other circuits, and reduce the integration of the carrier module. The difficulty of the multi-function unit and the better electrical characteristics of the carrier board module are beneficial to both the manufacturing end and the back-end application.
以上所述,仅为本发明的具体实施例的详细说明及附图,并非用以限制本发明,本发明的所有范围应以权利要求书的范围为准,任何本领域技术人员在本发明的领域内,可轻易思及的变化或修饰皆可涵盖在本发明的权利要求范围内。The above is only a detailed description and drawings of specific embodiments of the present invention, and is not intended to limit the present invention. All scopes of the present invention should be based on the scope of the claims. Within the field, easily conceivable changes or modifications can be covered within the scope of the claims of the present invention.
Claims (10)
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| CN2007101961400A CN101452918B (en) | 2007-11-28 | 2007-11-28 | Carrier plate module with embedded phase-locked loop, integrated system and manufacturing method thereof |
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| CN2007101961400A CN101452918B (en) | 2007-11-28 | 2007-11-28 | Carrier plate module with embedded phase-locked loop, integrated system and manufacturing method thereof |
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| CN101452918B CN101452918B (en) | 2010-06-23 |
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| US5381085A (en) * | 1993-07-06 | 1995-01-10 | Motorola, Inc. | Phase lock loop with self test circuitry and method for using the same |
| US6956415B2 (en) * | 2003-11-19 | 2005-10-18 | International Business Machines Corporation | Modular DLL architecture for generating multiple timings |
| US7148758B1 (en) * | 2004-08-13 | 2006-12-12 | Xilinx, Inc. | Integrated circuit with digitally controlled phase-locked loop |
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