CN101494417B - Asynchronous Boost Converter - Google Patents

Abstract

An asynchronous step-up converter includes a low voltage device connected between the input and output of the converter, when the converter is closed, the low voltage device cuts off the connection between the input and output of the converter to achieve load cut-off, because the converter uses the low voltage device to achieve load switching, it can improve efficiency and reduce cost.

Description

Asynchronous Boost Converter

technical field

The invention relates to an asynchronous boost converter, in particular to an asynchronous boost converter using low-voltage components to achieve load cut-off. the

Background technique

Fig. 1 is a traditional asynchronous boost converter 10, which obtains a current by switching the power switch (not shown in the figure) in the chip 12 and charges the capacitor C2 through the inductor L1 and the Schottky diode D1 to generate an output Voltage VOUT, since the Schottky diode D1 has a smaller forward bias voltage VF, better efficiency can be obtained. However, when the boost converter 10 is turned off by the signal Enable, assuming that the input voltage VIN provided by the battery is still 3.7V, the diode D1 will be turned on, thereby generating an output voltage of about 3.3V at the output terminal, thus generating The leakage current flows to the ground terminal GND through the resistors R1 and R2. In order to avoid leakage current, McGinty et al. proposed in US Pat. No. 7,126,314 to use LDMOS or JFET to enable Schottky diodes to achieve load disconnection when the converter is shut down. In addition, there is another known method of connecting a switch between the Schottky diode D1 and the output terminal VOUT to achieve load cut-off. However, the output voltage VOUT of the boost converter 10 is a high voltage of 10-40V, so It is necessary to use high-voltage components as switches. High-voltage components are not only more expensive, but also have a large conduction resistance, so the efficiency is poor. the

Therefore, the above-mentioned inconveniences and problems exist in the known asynchronous boost converter. the

Contents of the invention

The purpose of the present invention is to propose an asynchronous boost converter using low voltage components to achieve load shedding. the

Another object of the present invention is to provide an asynchronous boost converter with short-circuit protection and load cut-off functions. the

Another object of the present invention is to provide an asynchronous boost converter capable of providing stable pre-charging current and short-circuit protection current. the

For realizing the above object, technical solution of the present invention is:

An asynchronous step-up converter comprising a capacitor, an inductor, a diode, a switch, a load cut-off transistor and a voltage limiting circuit, characterized in that:

The capacitor is connected to the output end of the converter;

the inductor is connected between the input of the converter and a node;

the diode is connected between the node and the output;

The switch is connected to the node, and an inductive current is generated by switching the switch to charge the capacitor through the inductance and diode to generate an output voltage;

The load cut-off transistor is connected in series with the inductor and the diode between the input end and the output end, and when the converter is turned off, the connection between the input end and the output end is cut off, and the load cut-off transistor is low voltage components;

The voltage limiting circuit limits the voltage between the gate and source of the load cutoff transistor. the

The device for improving the feedback linearity of the 1.5-bit Σ-Δ modulation class D amplifier of the present invention can be further realized by adopting the following technical measures. the

The aforementioned converter further includes a resistor connected between the gate and the source of the load cut-off transistor for turning off the load cut-off transistor when the converter is turned off. the

The aforementioned converter further includes a short-circuit protection circuit to detect the output voltage and send a short-circuit protection signal to close the switch when the output terminal is short-circuited. the

In the aforementioned converter, wherein the short-circuit protection circuit includes a comparator to generate the short-circuit protection signal when the output voltage is lower than a critical value. the

The aforementioned converter further includes a current supply circuit providing a short-circuit protection current to the capacitor when the output terminal is short-circuited. the

In the aforementioned converter, the current supply circuit includes a current mirror to mirror a reference current to generate the short circuit protection current. the

In the aforementioned converter, the current mirror includes a reference branch connected to the reference current and a mirror branch mirroring the reference current to generate the short circuit protection current. the

The aforementioned converter, wherein said mirrored branch includes said load cut transistor. the

The aforementioned converter further includes a current supply circuit that provides a pre-charging current to charge the capacitor when the converter starts up. the

In the aforementioned converter, wherein the current supply circuit includes a current mirror to mirror a reference current to generate the pre-charging current. the

In the aforementioned converter, the current mirror includes a reference branch connected to the reference current and a mirror branch mirroring the reference current to generate the pre-charging current. the

The aforementioned converter, wherein said mirrored branch includes said load cut transistor. the

After adopting the above technical solution, the asynchronous boost converter of the present invention uses low-voltage components to achieve load switching, thereby achieving the advantages of improving efficiency and reducing costs. the

Description of drawings

Figure 1 is a traditional asynchronous boost converter;

Fig. 2 is an embodiment of the present invention;

Figure 3 illustrates the limitation of the voltage VGS in the converter of Figure 2;

Fig. 4 illustrates the short-circuit protection of Fig. 2 converter;

Figure 5 shows the precharge current for the converter of Figure 2;

FIG. 6 illustrates load shedding of converter 20 in an embodiment of the invention. the

Detailed ways

Please refer to FIG. 2. FIG. 2 is an embodiment of the present invention. In the asynchronous boost converter 20, the inductor L is connected between the input voltage VIN and the node V24LX, and the switch N1 is connected between the node V24LX and the ground terminal GND. The switch N1 should be switched in response to the control signal PWM from the PWM logic circuit 24, thereby generating an inductive current Iout to charge the capacitor Co through the inductance L, embedded diode D1 and transistor P1 to generate an output voltage V24OUT to the load RL, and the inverter 22 inverts The phase enable signal EN generates the signal ENB. The transistor P1 is a load cut-off component. Since the transistor P1 is a low-voltage component, in order to prevent the transistor P1 from being damaged due to high voltage, a voltage limiting circuit 26 is used to limit the voltage between the gate and the source of the transistor P1. VGS, so that it is not greater than a critical value, such as not greater than 5V, the current supply circuit 28 is used to provide a stable pre-charging current and short-circuit current to charge the capacitor Co, and the short-circuit protection circuit 30 detects the output voltage V24OUT for output of the converter 20 When it is short-circuited to the ground terminal GND, a short-circuit protection signal Sc is generated to the PWM logic circuit 24 to turn off the switch N1. the

3 illustrates the limitation of the voltage VGS in the converter 20, wherein the waveform 40 is the enable signal supplied to the external pin of the converter 20, the waveform 42 is the delayed enable signal EN inside the converter 20, and the waveform 44 is the transistor P1 The voltage VDS1 between the drain and source, waveform 46 is the voltage VDS2 between the drain and source of transistor P0, and waveform 48 is the voltage VGS between the gate and source of transistor P1. 4 illustrates short circuit protection of converter 20, where waveform 50 is the voltage on node V24LX, waveform 52 is output voltage V24OUT, and waveform 54 is current Iout. 5 shows the pre-charging current of the converter 20, wherein the waveform 56 is the current Iout, the waveform 58 is the output voltage V24OUT, the waveform 60 is the voltage on the node V24LX, and the waveform 62 is the signal EN. 6 illustrates load shedding of converter 20 in an embodiment of the invention, where waveform 64 is current Iout, waveform 66 is output voltage V24OUT, waveform 68 is the voltage on node V24LX, and waveform 70 is signal EN. the

Please refer to FIG. 2, FIG. 3 and FIG. 5, when the signal EN turns to a high level, as shown at time t0, the converter 20 starts, assuming that the input voltage VIN is 3.7V, since the PWM logic circuit 24 has not provided a control signal PWM is used to switch the switch N1, so the voltage on the node V24DD is approximately equal to the input voltage VIN, assuming that the voltage limiting circuit 26 includes five diodes connected by low-voltage transistors, and the forward bias voltage of each diode is 1V, so the transistor P1 The maximum value of the voltage VGS between the gate and the source will be limited to about 5V, and at this time the voltage on the node V24DD is only about 3.7V, so the voltage on the node A will be equal to 0, so the current supply circuit 28 Transistors P0 and P1 and transistors N2, N3 and N4 are all turned on, and transistors P0 and P1 form a current mirror, wherein transistor P0 is used as a reference branch to connect current I3, and transistor P1 is used as a mirror branch to mirror current I3 to generate a stable pre- The charging current Iout charges the capacitor Co, so that the output voltage V24OUT rises to 3.7V, as shown in the waveform 56 of Figure 5, and the current I3=I1+I2, so the pre-charging current can be obtained

Iout＝(I1+I2)×K Formula 1

Wherein, K is the current mirror ratio of the transistor P0 and the flat P1. When the output voltage V24OUT is charged to 3.7V by the precharge current, the transistors N2, N3 and N4 are all turned off, and the voltage VDS1 between the drain and the source of the transistor P1 will drop to 0, as shown by the waveform 44 in FIG. 3 , In addition, the voltage VDS2 between the drain and source of transistor P0 is about 1.2V, so the voltage VGS between the gate and source of transistor P1 is also pulled to about 1.2V, as shown in waveforms 46 and 48 in FIG. At time t1, the PWM logic circuit 24 provides the control signal PWM to switch the switch N1, so the output voltage V24OUT rises, and the voltage VGS rises accordingly, and is finally limited to about 5V by the voltage limiting circuit 26 . the

2 and 4, when the output of the converter 20 is short-circuited to the ground terminal GND, as shown at time t2, the current Iout increases and the voltage on the node V24LX and the output voltage V24OUT decrease. When the output voltage V24OUT is lower than a critical value , the switch N8 is opened, and the comparator 32 in the short-circuit protection circuit 30 compares a reference voltage Vr and a voltage Vs related to the output voltage V24OUT. When the voltage Vs is lower than the reference voltage Vr, the comparator 32 outputs a short-circuit protection signal Sc to make the PWM The logic circuit 24 turns off the switch N1. After the switch N1 is turned off, the voltage on the node V24DD is equal to the input voltage VIN again. Therefore, the switches N2, N3 and N4 in the current supply circuit 28 are turned on again to form a current mirror. The mirror current I3 generates a stable The short-circuit protection current Iout=(I1+I2)×K, as shown in the waveform 54 of FIG. 4 . the

Referring to FIG. 2 and FIG. 6, when the signal EN turns to a low level to turn off the converter 20, as shown at time t3, the transistor N0 is turned on so that the output voltage V24OUT slowly drops to 0, and at this time, the resistor R1 slowly Pull the potential of the gate of transistor P1 to the same potential as node V24DD, so the voltage VGS between the gate and source of transistor P1 will also gradually drop to 0, as shown in waveform 48 in Figure 3, and finally, transistor P1 is Turn off to cut off the connection between the input voltage VIN and the output terminal V24OUT, so as to prevent the current Iout from flowing from the input terminal VIN to the output terminal V24OUT. It can be seen from the waveform 64 of FIG. 6 that when the converter 20 is turned off, no current Iout is generated. the

The above embodiments are only for illustrating the present invention, rather than limiting the present invention. Those skilled in the relevant technical field can also make various transformations or changes without departing from the spirit and scope of the present invention. Therefore, all equivalent technical solutions should also belong to the category of the present invention and should be defined by each claim. the

Claims (12)

1. an asynchronous voltage-boosting converter comprises an electric capacity, an inductance, and a diode, a switch, a transistor and a pressure limiting circuit are cut off in a load, it is characterized in that:

Said electric capacity connects the output of said transducer;

Said inductance is connected between the input and a node of said transducer;

Said diode is connected between said node and the said output;

Said switch connects said node, through switch said switch produce an inductive current through the said electric capacity charging of said inductance and diode pair to produce an output voltage;

The said inductance of transistor AND gate is cut off in said load and diode is connected between said input and the output, when said transducer is closed, cuts off the binding between said input and the output, and it is the low pressure assembly that transistor is cut off in said load;

Said pressure limiting circuit limits said load and cuts off the voltage between transistor gate and the source electrode.

2. transducer as claimed in claim 1 is characterized in that: comprise that also a resistance is connected said load and cuts off between transistorized gate and the source electrode, cut off transistor in order to when said transducer is closed said load.

3. transducer as claimed in claim 1 is characterized in that: comprise that also a short-circuit protection circuit detects said output voltage, when said output short circuit, see a short-circuit protection signal off to close said switch.

4. transducer as claimed in claim 3 is characterized in that: said short-circuit protection circuit comprises a comparator when said output voltage is lower than a critical value, produces said short-circuit protection signal.

5. transducer as claimed in claim 3 is characterized in that: comprise that also a current providing circuit provides a short circuit current protection to said electric capacity when said output short circuit.

6. transducer as claimed in claim 5 is characterized in that: said current providing circuit comprises that a current mirror mirror one reference current produces said short circuit current protection.

7. transducer as claimed in claim 6 is characterized in that: said current mirror comprises that one connects said reference current and a mirror branch said reference current of mirror produces said short circuit current protection with reference to branch.

8. transducer as claimed in claim 7 is characterized in that: said mirror branch comprises that said load cuts off transistor.

9. transducer as claimed in claim 1 is characterized in that: comprise that further a current providing circuit provides pre-charge current that said electric capacity is charged when said transducer starts.

10. transducer as claimed in claim 9 is characterized in that: said current providing circuit comprises that current mirror mirror one reference current produces said pre-charge current.

11. transducer as claimed in claim 10 is characterized in that: said current mirror comprises that one connects said reference current and a mirror branch said reference current of mirror produces said pre-charge current with reference to branch.

12. transducer as claimed in claim 11 is characterized in that: said mirror branch comprises that said load cuts off transistor.

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