CN101576536B - Multi-mode micro-driving force source based on phased array technology - Google Patents

Abstract

The invention discloses a multi-mode micro-driving power source based on phased array technology. The whole system includes the upper computer based on the industrial computer, CAN bus, ultrasonic transmitting card, high-frequency linear power amplifier and ultrasonic transducer array; the CAN interface of the upper computer based on the industrial computer is connected to the An array of ultrasound transducers is connected. The system has good adaptability, adopts the bus structure, and forms flexible and expandable modules. The digital system structure ensures high phase control accuracy and deflection angle, and is easy to operate, maintain and debug.

Description

Multi-mode micro-drive power source based on phased array technology

technical field

The present invention relates to a power source for micro-driving, in particular to a multi-mode micro-driving power source based on phased array technology.

Background technique

In recent years, with the continuous development of material science, many new thin film materials have emerged and are widely used in every corner of people's lives. The mechanical properties of thin film materials are important indicators for evaluating thin film materials. In the design of components using thin films as materials, their mechanical properties are the basis for design and have a great impact on the performance, reliability and service life of components. The mechanical properties of the film include mechanical parameters such as the elastic modulus, yield strength and interface bonding strength of the film. Among them, the elastic modulus of the film is not only a necessary parameter for the design of thin film devices, but also the basis for the measurement and evaluation of mechanical properties such as yield strength, fracture toughness and residual stress. Due to the size factor, the measurement of the elastic modulus of thin films is much more difficult than that of bulk materials. According to the characteristics of the film, many scientists have carried out a lot of research on the measurement method and measuring instrument of its elastic modulus.

At present, the commonly used test methods are ultrasonic velocimetry, beam bending method and indentation method. Among them, the basic principle of the ultrasonic velocity measurement method is that the propagation velocity of the ultrasonic wave is determined by the elastic constant of the medium, and the elastic constant of the material can be obtained by measuring the ultrasonic wave velocity. However, this method is limited by the nature of the material and can only be applied to isotropic materials. In the beam bending method, the basic principle of the cantilever beam method is to calculate the elastic modulus of the film by comparing the deflection. The specific method is to compare two sets of samples under the same load (substrate with known elastic constant and coated film The substrate) indirectly obtains the elastic modulus of the film. The principle of the three-point bending method is to apply a force to the beam to generate a deflection, thereby calculating the amount of bending stiffness, and calculating the elastic modulus according to the relationship between the bending stiffness and the elastic modulus. Because the indentation method is simple and has no special requirements for the sample, it has been widely used. The basic principle of the indentation method is to use an indenter of a certain shape to press the sample under a certain pressure, keep it for a period of time, and then unload it. Use related equipment such as rulers, microscopes, displacement sensors, etc. to measure the depth of the indentation, and then make a corresponding load-displacement curve (P-h curve) based on the obtained displacement and the provided pressure, and then analyze the displacement curve. The elastic modulus of the film can be obtained. However, due to the incomplete mechanical model of this experimental method, the thickness of the film must not be too small, and the experimental results of the same sample under different measurement conditions, including different indenter shapes and different indentation depths, cannot be unified. In addition, errors are introduced due to the deformation of the indenter, the surface tension of the film, and the friction between the film and the indenter.

Contents of the invention

Aiming at the shortcomings of the traditional indentation method, the purpose of the present invention is to provide a multi-mode micro-driving force source based on phased array technology for characterizing the properties of thin film materials with accurate and stable work and easy operation.

Based on ultrasonic phased array technology, the system uses digital sound beam synthesis technology to form a stable sound field. According to the theory of ultrasonic radiation force, the film in the sound field is subjected to non-contact force, so that the film surface is deformed, and the force is further measured. The size and deformation size are used to calculate the strain, and then the elastic modulus can be calculated according to Hooke's law. The frequency, amplitude, and phase of each transmission circuit channel of the system are separately controllable, have high repetition frequency and transmission efficiency, and have good consistency among channels, are easy to be modularized, easy to operate, and easy to maintain and debug.

The technical scheme that the present invention adopts is as follows:

The whole system includes the upper computer based on the industrial computer, CAN bus, ultrasonic transmitting card, high-frequency linear power amplifier and ultrasonic transducer array; the CAN interface of the upper computer based on the industrial computer is connected to the The ultrasound transducer array is connected.

Described ultrasonic transmitting card: comprise 15 signal generation units and signal generation and synchronous control unit; One end of 15 signal generation units and signal generation and synchronous control unit is respectively connected with CAN bus through respective CAN interface, 15 The other ends of each signal generating unit and the signal generating and synchronous control unit are respectively connected to four high-frequency linear power amplifiers in the high-frequency linear power amplifier; the signal generating and synchronous control units are respectively connected to fifteen signal generating units.

The fifteen signal generating units have the same structure, and all include a CAN interface, an embedded system based on DSP, an address bus, a data bus, a control bus, an interface module based on FPGA, four 10-bit high-speed D/A converters, 4 high-speed D/A converters and 4 power amplifiers and compensation circuits for generating comparative amplitudes; the DSP-based embedded system is connected to the CAN bus through the CAN interface, and communicates with the FPGA-based system through the address bus, data bus and control bus respectively. Connected to the interface module; 4 10-bit high-speed D/A converters and one end of the 4 high-speed D/A converters used to generate comparative amplitudes are respectively connected to the FPGA-based interface module, and 4 10-bit high-speed D/A converters The other ends of the amplifiers are connected to their respective power amplifiers and compensation circuits; the four high-speed D/A converters used to generate comparative amplitudes are connected to their respective 10-bit high-speed D/A converters.

Described signal generating and synchronous control unit: except having the same structure as the fifteen signal generating units, it also has a synchronous control module, which is connected with the interface module based on FPGA and the embedded system based on DSP respectively.

The described embedded system based on DSP: consists of digital signal processor DSP, crystal oscillator, CAN interface circuit, reset chip, JTAG debugging port, power supply interface, RAM chip and input and output interface;

The crystal oscillator, CAN interface circuit, reset chip, JTAG debugging port, power supply interface and RAM chip are respectively connected with the digital signal processor DSP.

The synchronous control module: includes two tri-state conversion arrays with the same structure, and 2 8-unit high-speed optocoupler elements; each tri-state conversion array is connected to the I/O pin of DSP and a high-speed optocoupler; the optocoupler Connect to FPGA trigger pin.

High-frequency linear power amplifier 4: composed of PA19 chip, IN4148 type diode D1, D2, PK MUR 120 type diode D3, D4, capacitor C1, C2, C3, C4, Cc, Cf, resistor Ri, Rf, Rcl+, Rcl1, power supply Composed of +40V and -40V.

The beneficial effects that the present invention has are:

1. The phased array technology is used to synthesize a stable sound field, which can generate non-contact focused radiation force on the film material located in it, thereby deforming the film and overcoming the shortcomings of the traditional indentation method;

2. The system has good adaptability, adopts the bus structure, and forms a flexible and expandable module;

3. The digital system structure ensures high phase control accuracy and deflection angle, and is easy to operate, maintain and debug;

4. The system has high gain and wide frequency band;

5. The system adopts high-speed A/D to ensure the reliability of data;

6. Each channel is independently controllable and has multiple working modes.

Description of drawings

Figure 1 is a structural diagram of a multi-mode micro-drive power source system based on phased array technology.

Figure 2 is a structural diagram of the signal generation and synchronization control unit.

Fig. 3 is the functional block diagram of the embedded system based on DSP.

Figure 4 is a functional block diagram of the synchronous control module.

Fig. 5 is a circuit diagram of the power amplifier and compensation circuit.

Figure 6 is a circuit diagram of a high-frequency linear power amplifier.

In the figure: 1-host computer based on industrial computer, 2-CAN bus, 3-ultrasonic transmitting card, 4-high-frequency linear power amplifier, 5-ultrasonic transducer array, 6-signal generation unit, 7-signal generation and synchronization Control unit, 8-CAN bus interface, 9-DSP-based embedded system, 10-address bus, 11-data bus, 12-control bus, 13-FPGA-based interface module, 14-used to generate comparison amplitude High-speed D/A converter, 15-10-bit high-speed D/A converter, 16-power amplifier and compensation circuit, 17-synchronous control module.

Detailed ways

Below in conjunction with accompanying drawing, the present invention is described in further detail:

As shown in Figure 1, the device consists of a host computer 1, a CAN bus 2, an ultrasonic transmitting card 3, a high-frequency linear power amplifier 4, and an ultrasonic transducer array 5, and is characterized in that:

The ultrasonic transducer array 5 includes 64 ultrasonic transducer units. Through research and demonstration, the sound field formed by emitting ultrasonic waves with 64 ultrasonic transducers has an energy deviation of less than 4% from the ideal sound field within a spherical volume with a radius of 2mm. If a single transducer is used to synthesize the sound field, the mechanical structure will be quite complicated. , and if the synthesized sound field is to be changed, the mechanical structure must also be changed. In order to improve the adaptability of the system, a two-dimensional transducer array based on phased array technology is used for sound field synthesis, which can be performed with little or no movement and can improve accuracy.

According to the acoustic array theory, when other parameters are fixed, increasing the number of array elements can increase the amplitude of the main lobe, suppress side lobes, and suppress the width of the main lobe at the same time, which is conducive to improving the quality of the phased array ultrasonic probe. Considering the accuracy Requirements and directivity characteristics as well as system complexity, an 8×8 circular piston transducer array is used here. While considering the array element spacing and effective working array elements, the efficiency and directivity of a single array element, as well as the ease of manufacturing are given priority.

According to the requirement of accuracy, 1.75MHz ultrasonic waves are used. According to the sound beam directivity function of the phased array probe, when the distance between the array elements is between the half wavelength and the wavelength, within the allowable deflection range, there will be no grating lobes. The diameter of the array elements is 2.5mm, and the distance between the centers of the array elements is 3mm. In order to improve the generation performance of the transducer, the chip uses lead titanate piezoelectric composite material, and the backing adopts epoxy resin-based composite material. Changing the phase difference between the transducers during work can generate sound beams at different angles, thereby synthesizing a focused sound field.

As shown in Figure 1, the upper computer 1 is connected with the ultrasonic transmitting card through the CAN bus, and its function is to control the ultrasonic transmitting card according to the needs of the work.

The CAN bus 2 is connected to the host computer 1 and the ultrasonic transmitting card 3 respectively, and its function is to transmit the parameters (such as frequency, amplitude, and phase difference) set by the host computer to the ultrasonic transmitting card.

Ultrasonic transmitting card 3 is connected with CAN bus 2 and high-frequency linear power amplifier 4 respectively. Its function is to generate signals of different modes under the control of the host computer, and to excite the ultrasonic transducer array to generate ultrasonic waves through high-frequency linear power amplifier.

The high-frequency linear power amplifier 4 is connected with the ultrasonic transmitting card 3 and the ultrasonic transducer array 5 respectively, and its function is to amplify the signal sent by the ultrasonic transmitting card 3 to meet the needs of driving the ultrasonic transducer array.

The ultrasonic transducer array 5 is connected with the high-frequency linear power amplifier 4, and its function is to generate ultrasonic beams for focusing sound field synthesis according to the control signal.

Ultrasonic transmitting card 3 is made up of a signal generation and synchronous control unit 7 and fifteen signal generation units, signal generation unit 6, signal generation and synchronous control unit 7 are connected with CAN bus 2 and high-frequency linear power amplifier 4, and its function is to generate Independently controllable signals for each channel. The signal generation and synchronization control unit 7 is connected with each signal generation unit 6, and its function is to ensure that the signals of each channel have high synchronization, thereby ensuring the phase difference between each channel, and achieving the purpose of synthesizing a focused sound field.

As shown in Figure 2, described fifteen signal generation units 6 are identical in structure, all comprise CAN interface 8, embedded system 9 based on DSP, address bus 10, data bus 11, control bus 12, interface module based on FPGA 13. Four high-speed D/A converters 14 for generating comparative amplitudes, four 10-bit high-speed D/A converters 15 and four power amplifiers and compensation circuits 16; DSP-based embedded system 9 through CAN interface 8 It is connected with the CAN bus 2, and is connected with the FPGA-based interface module 13 through the address bus 10, the data bus 11 and the control bus 12 respectively; 4 10-bit high-speed D/A converters 15 and 4 high-speed One end of D/A converter 14 is connected with FPGA interface module 13 based on respectively, and the other end of 4 10 high-speed D/A converters 15 is connected with respective power amplifier and compensation circuit 16 respectively; The four high-speed D/A converters 14 are respectively connected with respective 10-bit high-speed D/A converters 15 . The 10-bit high-speed D/A converter 15 converts the analog waveform signal into an analog waveform signal, amplifies the amplitude through the on-board operational amplification and compensation circuit, and inputs it to the high-frequency linear power amplifier, and finally excites the ultrasonic transducer array to emit ultrasonic waves. The clock frequency of the D/A converter is 50MHz, and the maximum output delay is 1ns. The minimum phase change of each channel is 0.35°, and the frequency resolution is 3Hz.

As shown in Figure 2, signal generation and synchronous control unit 7 are used for generating comparison by CAN bus interface 8, embedded system 9 based on DSP, address bus 10, data bus 11, control bus 12, interface module 13 based on FPGA A high-speed D/A converter 14 of amplitude, a 10-bit high-speed D/A converter 15, an on-board power amplification and compensation circuit 16, and a synchronous trigger module 17 are characterized in that:

The DSP-based embedded system 9 is connected to the CAN bus 2 through the CAN bus interface 8 , and connected to the FPGA-based interface module 13 through the address bus 10 , the data bus 11 and the control bus 12 . Its function is to receive the data sent by the CAN bus, and send the data to the FPGA-based interface module through the address bus 10, data bus 11, and control bus 12 after processing.

FPGA-based interface module 13 is connected with address bus 10, data bus 11, control bus 12, and 10-bit high-speed D/A conversion module 14. The data stored in the waveform is output to the D/A chip, and the FPGA-based interface module is connected to the D/A converter 14 for generating comparative amplitudes. The FPGA chip can adopt the XC3S400 chip produced by XILINX Company.

The digital input terminal of the 10-bit high-speed D/A conversion module 15 is connected to the I/O pin of the XC3S400, the analog output terminal is connected to the power amplifier and the compensation circuit 16, and the reference voltage input terminal is connected to the D/A converter for generating the comparative amplitude The output terminal of device 14 is connected. The function of the 10-bit high-speed D/A converter 15 is to convert the digital quantity obtained by looking up the table in the FPGA into an analog quantity and input it to the power amplifier and compensation circuit. There are four connections in total, that is, each signal generating unit has four independent channels. The 10-bit high-speed D/A converter can adopt the AD9751 chip produced by the American Analog Devices Company.

The digital input terminal of the D/A converter 14 used to generate comparative amplitude is connected with the I/O pin of XC3S400, and the analog output terminal is connected with the external reference voltage input terminal of AD9751. Its function is to convert the digital quantity output by FPGA into analog quantity and input it to the external reference voltage input terminal of AD9751, so as to control the amplitude of the transmitted signal. The D/A converter used to generate the comparative amplitude here can adopt the AD9708 chip produced by the American Analog Devices Company.

As shown in Figure 3, the DSP-based embedded system 9 is composed of a digital signal processor DSP, crystal oscillator, CAN interface circuit, signal driver chip, reset chip, JTAG debugging port, power interface, RAM chip and input and output interfaces. The digital signal processor DSP can adopt the TMS320F2407 chip produced by TI Company, and the RAM chip adopts the IDT71V124 chip of the American Integrated Device Technology Company. Static RAM is connected with DSP through address bus, data bus, chip select /CS, /RD, /WE interface. The JTAG debugging port, the power supply port, the reset circuit and the crystal array are respectively connected with the corresponding ports of the digital signal processor DSP. One end of the CAN interface circuit is connected with the digital signal processor DSP through the CANRX and CANTX interfaces, and the other end is connected with the input and output interfaces. The direction of the arrow in the figure indicates the direction of signal transmission. The DSP is connected to the synchronous control module 17 through the I/O interface.

As shown in FIG. 4 , the synchronous control module 17 includes two three-state conversion arrays and two 8-unit high-speed optocoupler elements with the same structure. The input pin of each tri-state logic gate array is connected with the I/O pin of DSP, which is used for synchronous trigger signal input; the output terminal is connected with the trigger interface. The input end of the high-speed optocoupler is connected to the corresponding trigger interface, and the output end is connected to the FPGA pin. The tri-state logic gate array can adopt the 74LVC245 chip produced by PHILIPS Company. A synchronous trigger module has two pieces of 74LVC245, with a total of 2×8 trigger channels, which can trigger 16 FPGA modules at the same time, ensuring the simultaneity of signals between 64 channels. In order to avoid interference between channels, the trigger interfaces are connected with shielded wires.

As shown in FIG. 5 , the power amplifier and compensation circuit 16 is mainly composed of an integrated operational amplifier U1, resistors R1, R2, R3, and R4, and the integrated operational chip can be an AD812 chip from American Analog Devices. One end of the resistor R1 is connected to the positive output of the 10-bit high-speed D/A conversion chip, and the other end is connected to the positive input of the AD812; one end of the resistor R2 is connected to the inverting output of the 10-bit high-speed D/A conversion chip , the other end is connected to the inverting input terminal of AD812; resistor R3 is connected to R1 and ground respectively; resistor R4 is connected to R2 and AD812 output terminal respectively. The amplitude of the analog waveform output by AD971 is 1.25V at most, and the output is 7V after differential amplification.

As shown in Figure 6, the high-frequency linear power amplifier consists of PA19 chip, IN4148 type diodes D1, D2, PK MUR120 type diodes D3, D4, capacitors C1, C2, C3, C4, Cc, Cf, resistors Ri, Rf, Rcl+, Rcl -, power supply +40V, -40V composition. The operational amplifier integrated chip can adopt the high-voltage power operational amplifier integrated chip PA19 produced by American APEX Company. Pin 1 of PA19 is connected to terminal 1 of interface JP2, pins 2 and 3 of PA19 are connected through resistor Rcl+, and pins 6 and 7 are connected through resistor Rcl-. Rcl+ and Rcl- are current-limiting resistors, and their function is to limit the maximum output current. 1 and 3 of PA19 are connected through diode D3, and between pins 1 and 6 are connected through diode D4. Fast recovery diodes D3 and D4 are used for output stage protection to avoid the surge voltage of PA19 due to unstable load from affecting the entire System stability. Pins 1 and 8 are connected through a capacitor Cc, and its function is to perform phase compensation to avoid high-end boost and oscillation caused by excessive phase shift. Pins 1 and 5 are connected in parallel through a resistor Rf and a capacitor Cf. The function of the capacitor Cf is to improve the amplitude-frequency output characteristics of the circuit at high frequencies. The positive and negative input terminals are connected through diodes D1 and D2, and the clamping diodes D1 and D2 are used for input stage protection to avoid damage to the entire circuit due to excessive transient voltage. Pin 3 is connected to the ground through capacitors C1 and C2, and pin 6 is connected to the ground through capacitors C3 and C4, which are used for power protection and filtering. After the signal passes through the high-frequency linear power amplifier, the voltage can reach ±35V.

The working process of the present invention is as follows: the parameters of each transmitting channel are set in the upper computer 1, such as frequency, phase difference, amplitude, etc., and these parameters are sent to 15 signal generation units 6 and 1 of the ultrasonic transmitting card 3 by the CAN bus 2 A DSP-based embedded system 9 in a signal generation and synchronization control unit 7 . After the DSP receives and processes the data, it sends it to the FPGA module 13 through the address bus 10 , the data bus 11 and the control bus 12 . After all data transmission is completed, the DSP-based embedded system 9 in the signal generation and synchronization control unit 7 sends a trigger signal through the I/O port. The trigger signal triggers 16 FPGA modules through the synchronous trigger module 17 . According to the sent parameters, the FPGA searches for the data previously stored in the waveform storage through the direct digital synthesis technology and outputs it to the 10-bit high-speed D/A converter 15, and the FPGA sends the amplitude parameters to the D/A for generating comparative amplitudes Converter 14. The D/A converter 14 for generating the comparison amplitude outputs the reference voltage to the external reference voltage input terminal of the 10-bit high-speed D/A converter 15 . The 10-bit high-speed D/A converter 15 outputs the required waveform according to the value output by the FPGA and the reference voltage value. The power amplifier and compensation circuit 16 amplifies the signal output by the 10-bit high-speed D/A converter in the first stage, and the high-frequency linear power amplifier 4 amplifies the signal amplified in the first stage, and finally sends it to the ultrasonic phased array transducer. Each ultrasonic transducer is focused according to the set phase delay, thereby synthesizing the focused sound field. According to the ultrasonic radiation force theory, objects located in it will be subjected to force.

Claims (4)

1. A multi-mode micro-drive power source based on phased array technology, characterized in that: comprise an upper computer (1), a CAN bus (2), an ultrasonic transmitting card (3), a high-frequency linear power amplifier ( 4) and the ultrasonic transducer array (5); the CAN interface of the host computer (1) based on the industrial computer passes through the CAN bus (2), the ultrasonic transmitting card (3), the high-frequency linear power amplifier (4) and the ultrasonic transducer The array (5) is connected; The ultrasonic transmitting card (3) includes fifteen signal generation units (6) and a signal generation and synchronization control unit (7); fifteen signal generation units (6) and signal generation and synchronization control unit (7) One end of each is connected to the CAN bus (2) via their respective CAN interfaces, and the other ends of the fifteen signal generation units (6) and the signal generation and synchronization control unit (7) are respectively connected to the respective high-frequency linear power amplifiers (4). 4 high-frequency linear power amplifiers are connected; the signal generation and synchronization control unit (7) is connected with fifteen signal generation units (6) respectively; the fifteen signal generation units (6) have the same structure, and all include a CAN interface ( 8), DSP-based embedded system (9), address bus (10), data bus (11), control bus (12), FPGA-based interface module (13), four 10-bit high-speed D/A converters (14), 4 high-speed D/A converters (15) and 4 power amplifiers and compensation circuits (16) for producing comparative amplitude; Embedded system (9) based on DSP communicates with CAN through CAN interface (8) Bus (2) links to each other, links to each other with the interface module (13) based on FPGA respectively by address bus (10), data bus (11) and control bus (12); 4 10 high-speed D/A converters (15) and One end of 4 high-speed D/A converters (14) for producing comparative amplitudes is connected with FPGA interface module (13) based on FPGA respectively, for producing 4 high-speed D/A converters (14) of comparative amplitudes The other ends are respectively connected with respective power amplifiers and compensation circuits (16); 4 high-speed D/A converters (14) for generating comparative amplitudes are respectively connected with respective 10-bit high-speed D/A converters (15); Described signal generation and synchronous control unit (7) are except identical with described fifteen signal generation units (6) structure, also have synchronous control module (17), synchronous control module (17) and FPGA-based respectively The interface module (13) is connected with the embedded system (9) based on DSP. 2. a kind of multi-mode micro-drive power source based on phased array technology according to claim 1, is characterized in that: described embedded system (9) based on DSP is made up of digital signal processor DSP, crystal oscillator, CAN The interface circuit, reset chip, JTAG debugging port, power interface, RAM chip and input and output interface are composed; the crystal oscillator, CAN interface circuit, reset chip, JTAG debugging port, power interface and RAM chip are respectively connected with the digital signal processor DSP. 3. A kind of multi-mode micro-drive force source based on phased array technology according to claim 1, characterized in that: the synchronous control module (17) includes two tri-state switching arrays with the same structure, 2 8 units of high-speed optocoupler components; each three-state conversion array is connected to the I/O pin of the DSP and the high-speed optocoupler; the optocoupler is connected to the trigger pin of the FPGA. 4. a kind of multi-mode micro-drive power source based on phased array technology according to claim 1, is characterized in that: high-frequency linear power amplifier (4) is made of PA19 chip, IN4148 type diode D1, D2, PK MUR120 type diode D3, D4, capacitors C1, C2, C3, C4, Cc, Cf, resistors Ri, Rf, Rcl+, Rcl-, power supply +40V, -40V.

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