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CN101667533B - Plasma processing method and plasma processing apparatus - Google Patents

Plasma processing method and plasma processing apparatus Download PDF

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CN101667533B
CN101667533B CN2009101732006A CN200910173200A CN101667533B CN 101667533 B CN101667533 B CN 101667533B CN 2009101732006 A CN2009101732006 A CN 2009101732006A CN 200910173200 A CN200910173200 A CN 200910173200A CN 101667533 B CN101667533 B CN 101667533B
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CN101667533A (en
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松本直树
舆水地盐
岩田学
田中谕志
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32091Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
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    • H01J37/32935Monitoring and controlling tubes by information coming from the object and/or discharge

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Abstract

本发明涉及等离子体处理方法及等离子体处理装置。在阴极耦合方式中,尽可能防止在阳极侧的电极上附加沉积膜而对后续工序造成影响,并尽量提高处理的均匀性。将被处理基板(W)载置在下部电极的基座(16)上,并由高频电源(30)施加等离子体生成用的高频。将在基座(16)的上方与它平行相对配置的上部电极(34)经由环状的绝缘体(35)在电气浮起的状态下安装在腔室(10内。在上部电极(34)的上面和腔室(10)的顶棚之间的空间(50)中设置电容可变的可变电容器(86)。根据处理条件由电容控制部(85)改变可变电容器(86)的电容,对上部电极(34)的接地电容进行切换。

Figure 200910173200

The invention relates to a plasma treatment method and a plasma treatment device. In the cathode coupling method, it is possible to prevent the additional deposited film on the electrode on the anode side from affecting the subsequent process, and to improve the uniformity of the treatment as much as possible. A substrate to be processed (W) is placed on a susceptor (16) of the lower electrode, and a high frequency for plasma generation is applied from a high frequency power supply (30). The upper electrode (34) disposed parallel to it above the base (16) is installed in the chamber (10) in an electrically floating state via a ring-shaped insulator (35). The upper electrode (34) A variable capacitor (86) with variable capacitance is set in the space (50) between the ceiling of the above and chamber (10). According to the processing condition, the capacitance of the variable capacitor (86) is changed by the capacitance control section (85). The ground capacitance of the upper electrode (34) is switched.

Figure 200910173200

Description

等离子体处理方法及等离子体处理装置Plasma treatment method and plasma treatment device

本案是申请日为2007年3月30日、申请号为200710091348.6、发明名称为等离子体处理方法及等离子体处理装置的专利申请的分案申请。This case is a divisional application of a patent application with an application date of March 30, 2007 , an application number of 200710091348.6 , and an invention title of plasma processing method and plasma processing device .

技术领域technical field

本发明涉及对被处理基板实施等离子体处理的技术,尤其涉及电容耦合型的等离子体处理装置及等离子体处理方法。The present invention relates to the technique of implementing plasma processing on a substrate to be processed, in particular to a capacitively coupled plasma processing device and a plasma processing method.

背景技术Background technique

在半导体器件或FPD(Flat Panel Display:平板显示器)的制造工艺中的蚀刻、沉积、氧化和溅射等的处理中,为了在处理气体中以比较低的温度进行良好的反应经常利用等离子体。在现有技术中,在枚页式的等离子体处理装置、尤其是等离子体蚀刻装置中,电容耦合型的等离子体处理装置已成为主流。In the processes of etching, deposition, oxidation, sputtering, etc. in the manufacturing process of semiconductor devices or FPD (Flat Panel Display: Flat Panel Display), plasma is often used in order to perform a good reaction at a relatively low temperature in the process gas. In the prior art, capacitively coupled plasma processing apparatuses have become the mainstream among sheet-type plasma processing apparatuses, especially plasma etching apparatuses.

一般来说,电容耦合型的等离子体处理装置在作为真空腔室来形成的处理容器内平行地配置有上部电极和下部电极,在下部电极之上载置被处理基板(半导体晶片、玻璃基板等),在两电极的任何一方施加高频电压。凭借由该高频电压在两电极之间形成的电场使电子加速,由电子与处理气体的碰撞电离产生等离子体,由等离子体中的自由基和离子在基板表面上实施需要的微细加工(例如蚀刻加工)。这里,由于施加了高频率的一侧电极经由匹配器内的隔离电容器(blockingcapacitor)连接到高频电源上,就作为阴极(cathode)(阴极)来工作。Generally, in a capacitively coupled plasma processing apparatus, an upper electrode and a lower electrode are arranged in parallel in a processing container formed as a vacuum chamber, and a substrate to be processed (semiconductor wafer, glass substrate, etc.) is placed on the lower electrode. , apply a high-frequency voltage to either side of the two electrodes. The electrons are accelerated by the electric field formed between the two electrodes by the high-frequency voltage, the plasma is generated by the impact ionization of the electrons and the processing gas, and the required microprocessing (such as etching process). Here, since the side electrode to which the high frequency is applied is connected to the high frequency power supply via a blocking capacitor in the matching unit, it operates as a cathode (cathode).

在支承基板的下部电极上施加高频率来将它当作阴极的阴极耦合方式,通过利用在下部电极上产生的自身偏置电压来将等离子体中的离子几乎垂直地引入到基板上,有可能进行各向异性蚀刻。另外,阴极耦合方式,在聚合物等的沉积物(堆积沉淀物、以下简称为“沉积”)容易付着在上部电极上的工艺中,还有凭借入射到上部电极上的离子的轰击即溅射能够除去沉积膜(附加有氧化膜的话也一样)的优点。In the cathode coupling method, where a high frequency is applied to the lower electrode of the supporting substrate to use it as a cathode, it is possible to introduce ions in the plasma almost vertically to the substrate by using its own bias voltage generated on the lower electrode. Perform anisotropic etching. In addition, in the cathode coupling method, in a process in which deposits such as polymers (accumulated deposits, hereinafter referred to as "deposition") are easily attached to the upper electrode, there is also sputtering by bombardment of ions incident on the upper electrode. The advantage of being able to remove a deposited film (the same is true if an oxide film is added).

专利文献1日本特开平6-283474Patent Document 1 Japanese Patent Application Laid-Open No. 6-283474

使用阴极耦合方式的现有电容耦合型等离子体处理装置,一般来说将不施加高频率电压的阳极侧的上部电极直流接地。通常,由于处理容器由铝或不锈钢等的金属组成并被安全接地,能够通过处理容器将上部电极作为接地电位,所以采用将上部电极直接附加在处理容器的顶棚上来组成一体的结构或采用将处理容器的顶棚原封不动地作为上部电极加以利用的结构。In a conventional capacitively coupled plasma processing apparatus using a cathode coupling method, generally, the upper electrode on the anode side to which a high-frequency voltage is not applied is DC-grounded. Usually, since the processing container is made of metal such as aluminum or stainless steel and is grounded safely, the upper electrode can be used as the ground potential through the processing container, so the upper electrode is directly attached to the ceiling of the processing container to form an integrated structure or the processing A structure in which the ceiling of the container is used as the upper electrode as it is.

然而,随着近年来半导体制造工艺中设计规则的微细化,要求在低压下的高密度的等离子体,在电容耦合型等离子体处理装置中,高频率电的频率逐渐变高,最近,标准使用40MHz以上的频率。然而,频率变高的话,它的高频电流在电极的中心部分聚集,在两电极之间的处理空间中生成的等离子体的密度,在电极中心部侧也比在电极边缘部侧高,工艺的面内均匀性降低的问题加大。However, with the miniaturization of design rules in semiconductor manufacturing processes in recent years, high-density plasma at low pressure is required. In capacitively coupled plasma processing equipment, the frequency of high-frequency electricity is gradually increasing. Recently, the standard use Frequency above 40MHz. However, as the frequency becomes higher, its high-frequency current gathers at the center of the electrode, and the density of the plasma generated in the processing space between the two electrodes is also higher at the center of the electrode than at the edge of the electrode. The problem of reduced in-plane uniformity is aggravated.

发明内容Contents of the invention

本发明就是鉴于上述现有技术的问题点而提出的,其第一个目的是提供在阴极耦合方式中,尽可能防止在阳极侧的电极上附加沉积膜而对后续工序造成影响,并尽量提高处理的均匀性的等离子体处理方法及等离子体处理装置。The present invention is proposed in view of the problems of the above-mentioned prior art, and its first purpose is to provide, in the cathode coupling mode, to prevent as much as possible the additional deposited film on the electrode on the anode side from affecting the subsequent process, and to improve the efficiency as much as possible. A plasma processing method and a plasma processing device for processing uniformity.

另外,本发明的第二个目的是提供一种等离子体处理方法及等离子体处理装置,该等离子体处理方法及等离子体处理装置通过重复等离子体处理的次数,即使在处理容器内的处理环境中产生随时间的变化也能够稳定地保证处理的均匀性。In addition, the second object of the present invention is to provide a plasma processing method and a plasma processing apparatus which, by repeating the number of times of plasma processing, even in the processing environment in the processing container The generation of time-dependent changes can also stably ensure the uniformity of treatment.

为了达到上述第一个目的,本发明的第一种等离子体处理方法,其特征在于:在可真空的、接地的处理容器内,隔开规定的间隔平行配置第一电极和第二电极,由第二电极支承被处理基板使其与上述第一电极相对,对上述处理容器内进行真空排气达到规定的压力,向上述第一电极、上述第二电极和上述处理容器的侧壁之间的处理空间提供所希望的处理气体,并且在上述第二电极上施加第一高频,由在上述处理空间中生成的等离子体对上述基板实施所希望的处理,其中,经由绝缘体或空间将上述第一电极安装在上述处理容器内,并且经由静电电容可变的静电电容可变部电气地连接到接地电位上,根据对上述基板实施等离子体处理的处理条件,切换上述静电电容可变部的静电电容。In order to achieve the above-mentioned first object, the first plasma processing method of the present invention is characterized in that: in a vacuumable, grounded processing container, the first electrode and the second electrode are arranged in parallel at a predetermined interval, by The second electrode supports the substrate to be processed so that it is opposed to the first electrode, and evacuates the inside of the processing container to a predetermined pressure, and supplies the substrate between the first electrode, the second electrode, and the side wall of the processing container. The processing space supplies the desired processing gas, and applies the first high frequency to the above-mentioned second electrode, and performs the desired processing on the above-mentioned substrate by the plasma generated in the above-mentioned processing space, wherein the above-mentioned first An electrode is installed in the above-mentioned processing container, and is electrically connected to the ground potential through the electrostatic capacitance variable part with variable electrostatic capacitance, and switches the static electricity of the above-mentioned electrostatic capacitance variable part according to the processing conditions for implementing plasma processing on the above-mentioned substrate. capacitance.

另外,本发明的第一种等离子体处理装置,其特征在于,包括:可真空排气的、接地的处理容器;经由绝缘物或空间安装在上述处理容器内的第一电极;电气地连接在上述第一电极和接地电位之间的静电电容可变的静电电容可变部;在上述处理容器内隔开规定的间隔与上述第一电极平行配置,并与上述第一电极相对,支承被处理基板的第二电极;向上述第一电极、上述第二电极和上述处理容器的侧壁之间的处理空间提供所希望的处理气体的处理气体供给部;为了在上述处理空间生成上述处理气体的等离子体,在上述第二电极上施加第一高频的第一高频供电部;以及根据对上述基板实施的等离子体处理的处理条件,切换上述静电电容可变部的静电电容的静电电容控制部。In addition, the first plasma processing apparatus of the present invention is characterized in that it includes: a vacuum-exhaustable, grounded processing container; a first electrode installed in the above-mentioned processing container via an insulator or a space; A variable electrostatic capacity section for variable electrostatic capacitance between the first electrode and ground potential; disposed in parallel with the first electrode at a predetermined interval in the processing container, facing the first electrode, and supporting the processed a second electrode of the substrate; a processing gas supply unit for supplying a desired processing gas to a processing space between the first electrode, the second electrode, and the side wall of the processing container; and a processing gas supply unit for generating the processing gas in the processing space plasma, a first high-frequency power supply unit that applies a first high frequency to the second electrode; and a capacitance control that switches the capacitance of the capacitance variable unit according to processing conditions of the plasma treatment performed on the substrate. department.

在本发明所采用的电容耦合型的结构中,如果将来自高频电源的高频施加在第二电极上,则由第二电极和第一电极之间的高频放电及第二电极与处理容器的侧壁(内壁)之间的高频放电,在处理空间内生成处理气体的等离子体,所生成的等离子体向四方尤其是向上方及半径方向外侧扩散,等离子体中的电子电流通过第一电极或处理容器侧壁等流向大地。In the structure of the capacitive coupling type adopted in the present invention, if the high frequency from the high frequency power supply is applied to the second electrode, the high frequency discharge between the second electrode and the first electrode and the second electrode and the processing The high-frequency discharge between the side walls (inner walls) of the container generates plasma of the processing gas in the processing space, and the generated plasma diffuses in all directions, especially upward and outward in the radial direction, and the electron current in the plasma passes through the first An electrode or the side wall of the processing vessel etc. flows to the ground.

这里,通过根据该等离子体处理的处理条件,切换静电电容可变部的静电电容,能够从高电容(低阻抗)到低电容(高阻抗)任意地切换第一电极的周围的静电电容或接地电容。尤其是,高电容(低阻抗)接地的模式,使在等离子体的电子电流中、在第一电极和第二电极之间流过的比例变大,能够增强针对第一电极的离子的溅射效果,所以对于聚合物等沉积膜容易付着在第二电极上的处理是有利的。另外,低电容(高阻抗)接地的模式,使在等离子体的电子电流中、在第一电极和处理容器的侧壁之间流过的比例变大,能够使等离子体密度的空间分布向半径方向外侧扩展,所以适用于重视处理的均匀性的处理和即使沉积膜付着在第二电极上也没有问题的处理(例如最终工序的处理)。Here, by switching the electrostatic capacitance of the electrostatic capacitance variable part according to the processing conditions of the plasma treatment, it is possible to arbitrarily switch the electrostatic capacitance around the first electrode or the ground from high capacitance (low impedance) to low capacitance (high impedance). capacitance. In particular, the high-capacitance (low-impedance) grounding mode increases the ratio of the plasma electron current flowing between the first electrode and the second electrode, thereby enhancing sputtering of ions directed at the first electrode. Effect, so it is advantageous for the treatment that the deposited film such as polymer is easy to adhere to the second electrode. In addition, the low-capacitance (high-impedance) grounding mode increases the proportion of the plasma electron current flowing between the first electrode and the side wall of the processing vessel, enabling the spatial distribution of the plasma density to radial Since the direction spreads outward, it is suitable for a process where the uniformity of the process is important and a process in which there is no problem even if the deposited film adheres to the second electrode (for example, a final process process).

另外,还可以在第二电极上施加比第一高频的频率低的第二高频、或在第一电极上施加所希望的直流电压。In addition, a second high frequency lower than the first high frequency may be applied to the second electrode, or a desired DC voltage may be applied to the first electrode.

为了达到上述第二个目的,本发明的第二种等离子体处理方法,其特征在于:在可真空的、接地的处理容器内,隔开规定的间隔平行配置第一电极和第二电极,由第二电极支承被处理基板使其与上述第一电极相对,对上述处理容器内进行真空排气达到规定的压力,向上述第一电极、上述第二电极和上述处理容器的侧壁之间的处理空间提供所希望的处理气体,并且在上述第二电极上施加第一高频,由在上述处理空间中生成的等离子体对上述基板实施所希望的处理,其中,经由绝缘体或空间将上述第一电极安装在上述处理容器内,并且经由静电电容可变的静电电容可变部电气地连接到接地电位上,根据实施等离子体处理的上述基板的处理片数切换上述静电电容可变部的静电电容。In order to achieve the above-mentioned second object, the second plasma processing method of the present invention is characterized in that: in a vacuumable, grounded processing container, the first electrode and the second electrode are arranged in parallel at a predetermined interval, by The second electrode supports the substrate to be processed so that it is opposed to the first electrode, and evacuates the inside of the processing container to a predetermined pressure, and supplies the substrate between the first electrode, the second electrode, and the side wall of the processing container. The processing space supplies the desired processing gas, and applies the first high frequency to the above-mentioned second electrode, and performs the desired processing on the above-mentioned substrate by the plasma generated in the above-mentioned processing space, wherein the above-mentioned first An electrode is installed in the above-mentioned processing container, and is electrically connected to the ground potential through the electrostatic capacitance variable part with variable electrostatic capacitance. capacitance.

另外,本发明的第二种等离子体处理装置,其特征在于,包括:可真空排气的、接地的处理容器;经由绝缘物或空间安装在上述处理容器内的第一电极;电气地连接在上述第一电极和接地电位之间的静电电容可变的静电电容可变部;在上述处理容器内隔开规定的间隔与上述第一电极平行配置,并与上述第一电极相对,支承被处理基板的第二电极;向上述第一电极、上述第二电极和上述处理容器的侧壁之间的处理空间提供所希望的处理气体的处理气体供给部;为了在上述处理空间生成上述处理气体的等离子体,在上述第二电极上施加第一高频的第一高频供电部;以及根据实施等离子体处理的上述基板的处理片数切换上述静电电容可变部的静电电容的静电电容控制部。In addition, the second plasma processing apparatus of the present invention is characterized in that it includes: a grounded processing container that can be evacuated; a first electrode installed in the above-mentioned processing container via an insulator or a space; A variable electrostatic capacity section for variable electrostatic capacitance between the first electrode and ground potential; disposed in parallel with the first electrode at a predetermined interval in the processing container, facing the first electrode, and supporting the processed a second electrode of the substrate; a processing gas supply unit for supplying a desired processing gas to a processing space between the first electrode, the second electrode, and the side wall of the processing container; and a processing gas supply unit for generating the processing gas in the processing space Plasma: a first high-frequency power supply unit that applies a first high frequency to the second electrode; and a capacitance control unit that switches the capacitance of the capacitance variable unit according to the number of substrates that are subjected to plasma processing. .

在上述的第二种方法或装置中,通过根据实施等离子体处理的上述基板的处理片数切换上述静电电容可变部的静电电容,能够控制等离子体密度的空间分布特性甚至处理的面内分布特性,结果能够稳定地保持处理的均匀性。In the above-mentioned second method or apparatus, by switching the electrostatic capacitance of the above-mentioned electrostatic capacitance variable part according to the number of processed substrates to be subjected to plasma treatment, the spatial distribution characteristics of the plasma density and even the in-plane distribution of the treatment can be controlled. characteristics, resulting in the ability to stably maintain treatment uniformity.

根据本发明优选的一个实施方式,预先将静电电容可变部的静电电容的值调大,随着处理片数的增加,减小静电电容的值。According to a preferred embodiment of the present invention, the value of the electrostatic capacitance of the electrostatic capacitance variable part is adjusted to be large in advance, and the value of the electrostatic capacitance is decreased as the number of sheets processed increases.

根据本发明的等离子体处理方法及等离子体处理装置,通过如上所述的结构和作用,能够在阴极耦合方式中,尽可能防止在阳极侧的电极上附加沉积膜而对后续工序造成影响,并尽量提高处理的均匀性。另外,通过重复等离子体处理的次数,即使在处理容器内的处理环境中产生随时间的变化也能够稳定地保证处理的均匀性。According to the plasma processing method and plasma processing apparatus of the present invention, through the above-mentioned structure and function, in the cathode coupling method, it is possible to prevent the additional deposition film on the electrode on the anode side from affecting the subsequent process, and Maximize treatment uniformity. In addition, by repeating the number of times of plasma processing, uniformity of processing can be stably ensured even if a temporal change occurs in the processing environment in the processing container.

附图说明Description of drawings

图1是表示本发明的一个实施方式的等离子体蚀刻装置的结构的纵截面图。FIG. 1 is a longitudinal sectional view showing the structure of a plasma etching apparatus according to one embodiment of the present invention.

图2是表示实施方式的等离子体蚀刻装置中的可变电容器的一个结构的例子的图。FIG. 2 is a diagram showing an example of a configuration of a variable capacitor in the plasma etching apparatus according to the embodiment.

图3是表示实施方式的等离子体蚀刻装置中的可变电容器的一个结构的另外例子的图。3 is a diagram showing another example of a configuration of a variable capacitor in the plasma etching apparatus according to the embodiment.

图4是表示实施方式的一个变形例的等离子体蚀刻装置的结构的纵截面图。4 is a longitudinal sectional view showing the configuration of a plasma etching apparatus according to a modified example of the embodiment.

图5是表示实施方式的一个变形例的等离子体蚀刻装置的结构的纵截面图。5 is a longitudinal sectional view showing the configuration of a plasma etching apparatus according to a modified example of the embodiment.

图6是模式化地表示将实施方式的等离子体蚀刻装置切换为高电容(低阻抗)接地模式的情况下的腔室内高频放电的式样的图。6 is a diagram schematically showing a pattern of high-frequency discharge in a chamber when the plasma etching apparatus according to the embodiment is switched to a high-capacitance (low-impedance) grounding mode.

图7是模式化地表示将实施方式的等离子体蚀刻装置切换为低电容(高阻抗)接地模式的情况下的腔室内高频放电的式样的图。7 is a diagram schematically showing a pattern of high-frequency discharge in a chamber when the plasma etching apparatus according to the embodiment is switched to a low-capacitance (high-impedance) grounding mode.

图8是表示实施方式的蚀刻方法使用的等离子体蚀刻装置的结构的纵断面图。8 is a longitudinal sectional view showing the configuration of a plasma etching apparatus used in the etching method according to the embodiment.

图9是表示实施方式的蚀刻方法中的多步骤的各阶段状态的粗略截面图。FIG. 9 is a rough cross-sectional view showing the state of each stage of multi-steps in the etching method according to the embodiment.

符号说明Symbol Description

10 腔室(处理容器)10 chambers (processing vessels)

16 基座(下部电极)16 base (lower electrode)

30 高频电源30 high frequency power supply

34 上部电极34 Upper electrode

35 环状绝缘体35 ring insulator

36 电极板36 electrode plates

36a 气体喷出孔36a Gas ejection hole

38 电极支承体38 Electrode support

40 气体缓冲室40 gas buffer chamber

42 气体供给管42 Gas supply pipe

44 处理气体供给管44 Process gas supply pipe

50 空间50 spaces

52 绝缘体52 Insulators

64 高频电源64 high frequency power supply

70、72 电容器70, 72 Capacitors

85 静电电容控制部85 Capacitance Control Department

86 可变电容(静电电容可变部)86 variable capacitor (capacitance variable part)

具体实施方式Detailed ways

下面,参照附图对本发明适合的实施方式进行说明。Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

在图1中,表示了本发明的一个实施方式的等离子体处理装置的结构。该等离子体处理装置是作为阴极耦合的电容耦合型(平行平板型)等离子体蚀刻装置来构成的,例如,具有由表面进行过氧化铝膜处理(阳极氧化处理)的铝构成的圆筒形真空腔室(处理容器)10。腔室10安全地接地。In FIG. 1, the structure of the plasma processing apparatus which concerns on one Embodiment of this invention is shown. This plasma processing apparatus is configured as a cathode-coupled capacitively coupled (parallel plate type) plasma etching apparatus, for example, having a cylindrical vacuum chamber made of aluminum whose surface is treated with an aluminum oxide film (anodized treatment). Chamber (processing container) 10 . Chamber 10 is securely grounded.

在腔室10的底部,经由陶瓷等的绝缘板12配置有圆柱状的基座支承台14,在该基座支承台14的上面设置有例如由铝构成的基座16。基座16构成下部电极,在它之上作为被处理基板载置有例如半导体晶片W。At the bottom of the chamber 10 , a cylindrical susceptor support 14 is disposed via an insulating plate 12 such as ceramics, and a susceptor 16 made of, for example, aluminum is provided on the upper surface of the susceptor support 14 . The susceptor 16 constitutes a lower electrode, on which, for example, a semiconductor wafer W is placed as a substrate to be processed.

在基座16的上面设置有用于由静电吸附力保持半导体晶片W的静电卡盘18。该静电卡盘18是将由导电膜构成的电极20夹入到一对绝缘层或绝缘片之间的结构,直流电源22电气地连接到电极20上。凭借来自直流电源22的直流电压,能够靠库仑力将半导体晶片W吸附保持在静电卡盘18上。在静电卡盘18的周围,在基座16的上面配置有用于提高蚀刻的均匀性的例如由硅构成的聚焦环24。在基座16及基座支承台14的侧面上贴加有例如由石英构成的圆筒状的内壁部件25。An electrostatic chuck 18 for holding the semiconductor wafer W by electrostatic attraction is provided on the upper surface of the susceptor 16 . This electrostatic chuck 18 has a structure in which an electrode 20 made of a conductive film is sandwiched between a pair of insulating layers or insulating sheets, and a DC power supply 22 is electrically connected to the electrode 20 . With the DC voltage from the DC power supply 22, the semiconductor wafer W can be attracted and held on the electrostatic chuck 18 by Coulomb force. Around the electrostatic chuck 18 , a focus ring 24 made of, for example, silicon is arranged on the upper surface of the susceptor 16 to improve the uniformity of etching. A cylindrical inner wall member 25 made of, for example, quartz is attached to the side surfaces of the susceptor 16 and the susceptor support 14 .

在基座支承台14的内部设置有例如在圆周方向延伸的致冷剂室26。凭借安装在外部的冷却单元(图中没有表示出)经由配管27a、27b向该致冷剂室26中,循环提供规定温度的致冷剂例如冷却水。凭借致冷剂的温度能够控制基座16上半导体晶片W的处理温度。再者,通过气体供给管线28向静电卡盘18的上面与半导体晶片W的背面之间供给来自传热气供给机构(图中没有表示)的传热气体例如He气。Inside the susceptor support 14 is provided a refrigerant chamber 26 extending in the circumferential direction, for example. A refrigerant of a predetermined temperature, such as cooling water, is circulated into the refrigerant chamber 26 via pipes 27a and 27b by a cooling unit (not shown) installed outside. The processing temperature of the semiconductor wafer W on the susceptor 16 can be controlled by the temperature of the cryogen. Furthermore, a heat transfer gas such as He gas from a heat transfer gas supply mechanism (not shown) is supplied between the upper surface of the electrostatic chuck 18 and the back surface of the semiconductor wafer W through the gas supply line 28 .

在基座16上经由匹配器32及供电棒33电气地连接着等离子体生成用的高频电源30。该高频电源30在腔室10内进行等离子体处理的时候向基座16施加规定的高频率例如40MHz的高频。A high-frequency power supply 30 for plasma generation is electrically connected to the susceptor 16 via a matching unit 32 and a power supply rod 33 . This high-frequency power supply 30 applies a predetermined high frequency, for example, a high frequency of 40 MHz, to the susceptor 16 when plasma processing is performed in the chamber 10 .

在基座16的上方,与该基座平行相对地设置有上部电极34。该上部电极34包括具有多个气体喷出孔36a的、例如Si、SiC等的半导体材料构成的电极板36;和可以自由装卸地支承该电极板36、由导电材料例如表面经过了氧化铝膜处理的铝构成的电极支承体38,经由环状的绝缘体35在电气浮起状态下安装在腔室10内。由该上部电极34、基座16与腔室10的侧壁形成等离子体生成空间或处理空间PS。Above the susceptor 16 , an upper electrode 34 is provided parallel to and opposite to the susceptor. The upper electrode 34 includes an electrode plate 36 made of a semiconductor material such as Si, SiC, etc. with a plurality of gas ejection holes 36a; The electrode support 38 made of processed aluminum is mounted in the chamber 10 in an electrically floating state via the ring-shaped insulator 35 . A plasma generation space or a processing space PS is formed by the upper electrode 34 , the susceptor 16 , and the side walls of the chamber 10 .

环状绝缘体35例如由氧化铝(Al2O3)构成并被安装成气密地堵塞上部电极34的外周面与腔室10的侧壁之间的间隙,在物理地支承上部电极34的同时,构成上部电极34与腔室10之间的静电电容的一部分。The annular insulator 35 is made of, for example, aluminum oxide (Al 2 O 3 ) and installed so as to airtightly close the gap between the outer peripheral surface of the upper electrode 34 and the side wall of the chamber 10, while physically supporting the upper electrode 34. , constituting a part of the electrostatic capacitance between the upper electrode 34 and the chamber 10 .

电极支承体38在它的内部具有气体缓冲室40,同时在它的下面具有从气体缓冲室40连通到电极板36的气体喷出孔36a上的多个气体通气孔38a。处理气体供给部44通过气体供给管42连接到气体缓冲室40。如果从处理气体供给部44将规定的处理气体导入到气体缓冲室40,则从电极板36的气体喷出孔36a朝向基座16上的半导体晶片W向处理空间PS呈喷淋状地喷出处理气体。这样,上部电极34兼用作向处理空间PS提供处理气体用的喷头。The electrode support 38 has a gas buffer chamber 40 inside it, and has a plurality of gas vent holes 38a connected from the gas buffer chamber 40 to the gas ejection holes 36a of the electrode plate 36 on its lower surface. The processing gas supply part 44 is connected to the gas buffer chamber 40 through the gas supply pipe 42 . When a predetermined processing gas is introduced into the gas buffer chamber 40 from the processing gas supply unit 44, it is sprayed from the gas discharge holes 36a of the electrode plate 36 toward the semiconductor wafer W on the susceptor 16 in a shower-like manner to the processing space PS. Handle gas. In this way, the upper electrode 34 also serves as a shower head for supplying the processing gas to the processing space PS.

另外,在电极支承体38的内部设置有流过制冷剂例如冷却水的通路(图中没有表示),凭借外部的冷却单元经由制冷剂将上部电极34的整体尤其是电极板36调整到规定的温度。另外,为了使针对上部电极34的温度控制更加稳定,可以使用在电极支承体38的内部或上面安装例如由电阻发热元件组成的加热器(图中没有表示)的结构。In addition, a passage (not shown) flowing through a refrigerant such as cooling water is provided inside the electrode support body 38, and the whole of the upper electrode 34, especially the electrode plate 36, is adjusted to a specified value by means of an external cooling unit through the refrigerant. temperature. In addition, in order to stabilize the temperature control of the upper electrode 34, a heater (not shown) composed of a resistance heating element, for example, may be installed inside or on the electrode support 38.

在上部电极34的上面与腔室10的顶棚之间设置有具有适当空隙尺寸的间隙,并在那里形成有空间50。该空间50虽然可以是大气空间,但优选作为真空空间来构成,不仅实现了上部电极34与腔室10乃至周围温度的热遮断,还具有凭借气体的排除防止上部电极34与腔室10之间的放电的功能。在这样使空间50成为真空的情况下,与处理空间PS分别进行真空排气,凭借气密结构保持真空状态。在该实施方式中,为了进一步提高放电防止功能,用片状的绝缘体52覆盖空间50的内壁的全部或一部分(图中表示的只是上面)。虽然能够在该绝缘体52上适当地使用耐热性好的聚酰亚胺系的树脂,也可以使用泰富龙(注册商标)或石英等。A gap having an appropriate gap size is provided between the upper surface of the upper electrode 34 and the ceiling of the chamber 10 , and a space 50 is formed there. Although this space 50 can be an atmospheric space, it is preferably constituted as a vacuum space, which not only realizes the thermal isolation between the upper electrode 34 and the chamber 10 and the ambient temperature, but also prevents the gap between the upper electrode 34 and the chamber 10 by virtue of the removal of gas. The discharge function. When the space 50 is evacuated in this way, it is evacuated separately from the processing space PS, and the vacuum state is maintained by the airtight structure. In this embodiment, in order to further improve the discharge prevention function, all or part of the inner wall of the space 50 is covered with a sheet-shaped insulator 52 (only the upper side is shown in the figure). A heat-resistant polyimide-based resin can be suitably used for the insulator 52 , but Teflon (registered trademark), quartz, or the like can also be used.

在基座16、基座支承台14和腔室10的侧壁之间形成的环状的空间成为排气空间,在该排气空间的底上设置有腔室10的排气口54。排气装置58通过排气管56连接到该排气口54。排气装置58具有涡轮分子泵等的真空泵,能够将腔室10的室内尤其是处理空间PS减压到所要求的真空度。另外,在腔室10的侧壁上安装有对半导体晶片W的搬入搬出口60进行开闭的闸阀62。The annular space formed between the susceptor 16 , the susceptor support 14 and the side wall of the chamber 10 serves as an exhaust space, and an exhaust port 54 of the chamber 10 is provided at the bottom of the exhaust space. An exhaust device 58 is connected to the exhaust port 54 through an exhaust pipe 56 . The exhaust device 58 has a vacuum pump such as a turbomolecular pump, and can depressurize the interior of the chamber 10, especially the processing space PS, to a desired vacuum degree. In addition, a gate valve 62 for opening and closing the loading and unloading port 60 of the semiconductor wafer W is attached to the side wall of the chamber 10 .

该等离子体蚀刻装置在空间50内设置有电容可变的可变电容器86,由设置在腔室10的外部例如上面的静电电容控制部85可以改变可变电容器86的电容。In this plasma etching apparatus, a variable capacitor 86 with variable capacitance is provided in the space 50 , and the capacitance of the variable capacitor 86 can be changed by a capacitance control unit 85 provided outside the chamber 10 , for example, on the upper surface.

这里,在图2及图3中表示了可变电容器86的结构例。该可变电容器86具有可以在接触或接近上部电极34的上面的第一个位置和从上部电极34向上方分离的第二个位置之间移动的导体板88;与使该导体板88上下移动或改变位置的操作机构、例如操作棒90。这里,在导体板88和上部电极34之间形成电容器。导体板88的面积越大,电容可变的灵敏度或范围能够变得越大。图2的操作机构90由导电性的材料、或对高频率有导电性的材料或针对高频率有低阻抗的材料构成,直接或经由腔室10接地。图3的操作机构90可以是绝缘性的材料。静电电容控制部85具有例如能够任意地控制旋转量的步进电动机和将该步进电动机的旋转驱动轴的旋转变换成操作机构90的直进(升降)运动的运动变换机构(例如滚珠螺杆机构)等,能够通过导体板88高度位置的可变控制连续地改变可变电容器86的电容。越使导体板88接近腔室10的顶棚面,上部电极34的接地电容就能变得越小。相反,越使导体板88接近上部电极34的上面,上部电极34的接地电容就能变得越大。在极端的情况下,使导体板88与上部电极34相接触并使上部电极34接地,能够使接地电容无限大。Here, a configuration example of the variable capacitor 86 is shown in FIGS. 2 and 3 . The variable capacitor 86 has a conductor plate 88 movable between a first position on top of or close to the upper electrode 34 and a second position separated upward from the upper electrode 34; and moving the conductor plate 88 up and down Or change the position of the operating mechanism, such as the operating rod 90. Here, a capacitor is formed between the conductor plate 88 and the upper electrode 34 . The greater the area of the conductor plate 88, the greater the sensitivity or range in which the capacitance can be varied can become. The operating mechanism 90 of FIG. 2 is made of a conductive material, or a material that is conductive to high frequencies or a material that has low impedance to high frequencies, and is grounded directly or via the chamber 10 . The operating mechanism 90 of FIG. 3 may be made of insulating material. The electrostatic capacity control unit 85 has, for example, a stepping motor capable of arbitrarily controlling the amount of rotation, and a motion conversion mechanism (such as a ball screw mechanism) that converts the rotation of the rotational drive shaft of the stepping motor into the linear (elevating) motion of the operating mechanism 90. ) etc., the capacitance of the variable capacitor 86 can be continuously changed by variable control of the height position of the conductor plate 88 . The closer the conductor plate 88 is to the ceiling surface of the chamber 10, the smaller the ground capacitance of the upper electrode 34 becomes. Conversely, the closer the conductor plate 88 is to the upper surface of the upper electrode 34, the larger the ground capacitance of the upper electrode 34 becomes. In an extreme case, the ground capacitance can be infinitely increased by bringing the conductive plate 88 into contact with the upper electrode 34 and grounding the upper electrode 34 .

在图4中,表示了别的实施方式的静电电容可变部85。该实施方式,在上部电极34与腔室10的侧壁之间设置有环状绝缘体35,在该环状绝缘体中形成有环状的液体收容室94,成为能够经由配管92从腔室10的外面导出和导入具有适当介电常数的液体(例如Galden那样的有机溶剂)Q的结构。通过变化介电性液体Q的种类(介电常数)或液体量,能够使环状绝缘体35整体的静电电容以及上部电极34的接地电容可变。In FIG. 4 , a capacitance variable unit 85 according to another embodiment is shown. In this embodiment, an annular insulator 35 is provided between the upper electrode 34 and the side wall of the chamber 10, and an annular liquid storage chamber 94 is formed in the annular insulator, so that it can be accessed from the chamber 10 through the pipe 92. A structure in which a liquid Q with a suitable dielectric constant (for example, an organic solvent like Galden) is derived and introduced from the outside. By changing the type (permittivity) or the amount of the dielectric liquid Q, the capacitance of the entire annular insulator 35 and the ground capacitance of the upper electrode 34 can be varied.

另外,从控制该等离子体处理装置内的各部分的动作及整体装置的顺序(sequence)的控制器96向静电电容控制部85给出指示可变电容器86的电容(目标值)的控制信号。In addition, a control signal indicating the capacitance (target value) of variable capacitor 86 is given to capacitance control unit 85 from controller 96 that controls the operation of each part in the plasma processing apparatus and the sequence of the entire apparatus.

在该等离子体蚀刻装置中,为了进行蚀刻,首先使闸阀62成为开状态并将加工对象的半导体晶片W搬入到腔室10内,载置在静电卡盘18的上面。于是,按照规定的流量或流量比从处理气体供给部44将处理气体即蚀刻气体(一般来说是混合气体)导入到腔室10内,由凭借排气装置58的真空排气使腔室10内的压力成为设定值。另外,由高频电源30按照规定的功率向基座16施加高频(40MHz)。另外,由直流电源22向静电卡盘18的电极20施加直流电压,将半导体晶片W固定在静电卡盘18上。从上部电极34的喷头吐出的蚀刻气体在处理空间PS中凭借高频电的放电而等离子体化,凭借由该等离子体产生的自由基或离子对半导体晶片W的主面的膜进行蚀刻。In this plasma etching apparatus, to perform etching, first, the gate valve 62 is opened, and the semiconductor wafer W to be processed is carried into the chamber 10 and placed on the upper surface of the electrostatic chuck 18 . Then, the processing gas, that is, the etching gas (generally, a mixed gas) is introduced into the chamber 10 from the processing gas supply part 44 according to a predetermined flow rate or flow ratio, and the chamber 10 is evacuated by the vacuum exhaust device 58. The pressure inside becomes the set value. In addition, a high frequency (40 MHz) is applied to the susceptor 16 by a high frequency power supply 30 at a predetermined power. In addition, a DC voltage is applied from a DC power supply 22 to the electrodes 20 of the electrostatic chuck 18 to fix the semiconductor wafer W on the electrostatic chuck 18 . The etching gas discharged from the shower head of the upper electrode 34 is converted into plasma by high-frequency electric discharge in the processing space PS, and the film on the main surface of the semiconductor wafer W is etched by radicals or ions generated by the plasma.

该电容耦合型等离子体蚀刻装置通过在基座(下部电极)16上施加40MHZ或40MHz以上的高频电,将等离子体在优选的离解状态下高密度化,即使是在更低压的条件下也能形成高密度等离子体。并且,是阴极耦合方式,利用在基座16上生成的自身偏置电压将等离子体中的离子几乎垂直地引入到晶片W上,能够进行各向异性的蚀刻。This capacitively coupled plasma etching device applies high-frequency electricity of 40 MHz or higher to the susceptor (lower electrode) 16 to increase the density of the plasma in a preferred dissociated state, even under lower pressure conditions. Can form high-density plasma. In addition, the cathode coupling method is used, and ions in the plasma are introduced almost vertically onto the wafer W by the self-bias voltage generated on the susceptor 16, thereby enabling anisotropic etching.

另外,将与等离子体生成相适应的比较高的频率(例如40MHz)的第一高频和与离子引入相适应的比较低的频率(例如2MHz)的第二高频重叠、施加在下部电极上的下部两频率重叠施加方式也是可以的。作为这样的装置结构,例如如图5所示,可以增设向基座16供给第二高频电用的高频电源64、匹配器66及供电棒68。在这样的下部两频率重叠施加方式中,能够由第一高频(40MHz)使在处理空间PS生成的等离子体的密度最优化,由第二高频(2MHz)使在基座16上生成的自身偏置电压或离子层最优化,可以实现选择性更高的各向异性蚀刻。In addition, a first high frequency with a relatively high frequency (for example, 40 MHz) suitable for plasma generation and a second high frequency with a relatively low frequency (for example, 2 MHz) suitable for ion introduction are superimposed and applied to the lower electrode. The overlapping application of the lower two frequencies is also possible. As such an apparatus configuration, for example, as shown in FIG. 5 , a high-frequency power supply 64 for supplying the second high-frequency power to the base 16, a matching unit 66, and a power supply rod 68 may be added. In such a lower two-frequency overlapping application method, the density of the plasma generated in the processing space PS can be optimized by the first high frequency (40 MHz), and the density of the plasma generated on the susceptor 16 can be optimized by the second high frequency (2 MHz). Self-bias voltage or ion layer optimization can achieve more selective anisotropic etching.

下面,说明在该等离子体蚀刻装置中的可变电容器(静电电容可变部)86的作用。在图6及图7中,上部电极34经由可变电容器86及固定电容器即电容器70、72电气地连接(接地)到接地电位的腔室10。这里,电容器70是在上部电极34与腔室10的侧壁之间存在的电容(固定电容),主要由环状绝缘体35赋予。另一方面,电容器72与可变电容86并列,是在上部电极34和腔室10的顶棚之间存在的电容(固定电容)。上部电极34周围的静电电容或者说接地电容是作为将可变电容器86的电容与电容器70、72的电容加在一起的合成电容而被给出的。Next, the function of the variable capacitor (capacitance variable unit) 86 in this plasma etching apparatus will be described. In FIGS. 6 and 7 , the upper electrode 34 is electrically connected (grounded) to the chamber 10 at the ground potential via a variable capacitor 86 and capacitors 70 and 72 which are fixed capacitors. Here, the capacitor 70 is a capacitance (fixed capacitance) existing between the upper electrode 34 and the side wall of the chamber 10 , and is mainly provided by the annular insulator 35 . On the other hand, the capacitor 72 is parallel to the variable capacitor 86 and is a capacitor (fixed capacitor) existing between the upper electrode 34 and the ceiling of the chamber 10 . The electrostatic capacitance around the upper electrode 34 or the ground capacitance is given as a composite capacitance obtained by adding the capacitance of the variable capacitor 86 and the capacitances of the capacitors 70 and 72 .

首先,调高可变电容器86的电容,对将上部电容34的接地电容(合成电容)选择为例如20000pF以上的情况(在极端的情况下,是使导体板88与上部电极板34接触、变成无限大的电容值的情况)的作用进行说明。在这种情况下,如图6所示,如果将来自高频电源30的高频施加在基座16上,则凭借在基座16和上部电极34之间的高频放电及在基座16与腔室10的侧壁之间的高频放电在处理空间PS内生成处理气体的等离子体,所生成的等离子体向四方尤其是向上方及半径方向外侧扩散,等离子体中的电子电流通过上部电极34和腔室10的侧壁等向大地流动。这里,在基座16上,高频的频率数越高,高频电流越容易由集肤效应在基座中心部分集中,并且,由于正对面的上部电极34经由高电容即低阻抗接地,所以在等离子体中的电子电流中流向腔室10的侧壁的比例相当低,大部分流向上部电极34,并且流向它的中心部分。其结果是,等离子体密度的空间分布特性容易变成,电极中心部分最高并且越往半径方向外侧的周边部分移动越低的山形的分布轮廓。然而,另一方面,凭借向上部电极34流过大量的高频电流或电子电流,也有在上部电极34上由自身偏置引起的离子的入射量增大从而溅射效果增强的一面。First, the capacitance of the variable capacitor 86 is increased, and when the ground capacitance (synthetic capacitance) of the upper capacitor 34 is selected to be, for example, 20,000 pF or more (in an extreme case, the conductive plate 88 is brought into contact with the upper electrode plate 34, and In the case of an infinite capacitance value), the function will be described. In this case, as shown in FIG. 6, if the high frequency from the high frequency power supply 30 is applied to the susceptor 16, by virtue of the high frequency discharge between the susceptor 16 and the upper electrode 34 and in the susceptor 16 The high-frequency discharge between the side wall of the chamber 10 generates plasma of the processing gas in the processing space PS, and the generated plasma diffuses in all directions, especially upward and outward in the radial direction, and the electron current in the plasma passes through the upper part. The electrodes 34 and the side walls of the chamber 10 etc. flow toward the ground. Here, on the base 16, the higher the frequency of the high frequency, the easier it is for the high frequency current to concentrate in the central part of the base by the skin effect, and since the upper electrode 34 directly opposite is grounded via a high capacitance, that is, a low impedance, A relatively low proportion of the electron current in the plasma goes to the side walls of the chamber 10, most of it goes to the upper electrode 34, and to its central part. As a result, the spatial distribution characteristic of the plasma density tends to be a mountain-shaped distribution profile in which the central portion of the electrode is the highest and becomes lower as it moves toward the outer peripheral portion in the radial direction. However, on the other hand, by flowing a large amount of high-frequency current or electron current to the upper electrode 34 , the incident amount of ions on the upper electrode 34 due to its own bias increases, thereby enhancing the sputtering effect.

与此相对,将可变电容器86的电容调低,在将上部电极34的接地电容(合成电容)选择为例如250pF以下的情况,如图7中所示,处理空间PS内的等离子体分布向半径方向外侧扩张。在这样的情况下,如果由高频电源30向基座16施加高频,则凭借在基座16和上部电极34之间的高频放电及在基座16与腔室10的侧壁之间的高频放电,也会在处理空间PS内生成蚀刻气体的等离子体,所生成的等离子体向上方及半径方向外侧扩散,等离子体中的电子电流通过上部电极34或腔室10的侧壁等向大地流动。于是,在基座16上,高频电流容易在基座中心部分集中也与图6的情况是一样的。然而,由于上部电极34的接地电容或阻抗是低的,所以即使高频电流集中在基座16的中心部分,也难以从该处向正对面的上部电极34流动。因此,在等离子体中的电子电流中流向腔室10的侧壁的比例决对不低,根据接地电容的值,即根据可变电容器86的电容值,能够对分别在基座16和上部电极34之间及在基座16与腔室10的侧壁之间流过的电子电流的比进行任意的控制。另一方面,如果向上部电极34流动的高频电流或电子电流变少,则也有上部电极34上的离子入射量乃至溅射效果降低的一面。On the other hand, when the capacitance of the variable capacitor 86 is lowered, and the ground capacitance (synthetic capacitance) of the upper electrode 34 is selected to be, for example, 250 pF or less, the plasma distribution in the processing space PS becomes Radially outward expansion. In such a case, if a high frequency is applied to the susceptor 16 from the high frequency power supply 30 , by virtue of the high frequency discharge between the susceptor 16 and the upper electrode 34 and between the susceptor 16 and the side wall of the chamber 10 The high-frequency discharge will also generate plasma of etching gas in the processing space PS, and the generated plasma will diffuse upward and outward in the radial direction, and the electron current in the plasma will pass through the upper electrode 34 or the side wall of the chamber 10, etc. flow to the earth. Therefore, on the susceptor 16, the high-frequency current tends to concentrate at the central portion of the susceptor as in the case of FIG. 6 . However, since the ground capacitance or impedance of the upper electrode 34 is low, even if the high-frequency current is concentrated in the central portion of the susceptor 16, it is difficult to flow from there to the upper electrode 34 directly opposite. Therefore, the proportion of the electron current flowing to the side wall of the chamber 10 in the plasma is absolutely not low, and according to the value of the capacitance to ground, that is, according to the capacitance value of the variable capacitor 86, it is possible to control the current flow on the base 16 and the upper electrode respectively. 34 and between the pedestal 16 and the side walls of the chamber 10, the ratio of the electron currents is arbitrarily controlled. On the other hand, if the high-frequency current or electron current flowing to the upper electrode 34 decreases, the incident amount of ions on the upper electrode 34 and the sputtering effect may also decrease.

如上所述,该实施方式的等离子体蚀刻装置具有能够改变静电电容可变部86的静电电容的结构,通过根据处理条件适当地切换上部电极34的接地电容,尤其是选择高电容接地(低阻抗)模式或低电容接地(高阻抗)模式的任何一种,能够使后述的记忆效果防止乃至减低与工艺均匀性的平衡或折衷选择最优化,从而能够提高整体处理的加工性。As described above, the plasma etching apparatus of this embodiment has a structure capable of changing the electrostatic capacitance of the electrostatic capacitance variable portion 86, by appropriately switching the ground capacitance of the upper electrode 34 according to processing conditions, in particular, selecting a high-capacitance ground (low-impedance ground). ) mode or low-capacitance grounding (high-impedance) mode can optimize the balance or trade-off between preventing or even reducing the memory effect described later and process uniformity, thereby improving the processability of the overall process.

下面,对该实施方式的等离子体蚀刻装置的具体等离子体蚀刻加工的一个例子进行说明。该蚀刻加工是在作为层间绝缘膜的有机系low-k膜中形成连接孔(通孔),成为使用下部两频率重叠施加方式(图5)的处理。Next, an example of a specific plasma etching process performed by the plasma etching apparatus of this embodiment will be described. This etching process forms a connection hole (via hole) in an organic low-k film as an interlayer insulating film, and is a process using the lower two-frequency superposition method (FIG. 5).

在图8中,表示了在该实施方式中的处理气体供给部44的详细的结构例。在主气体供给管42上,经由各专用或分支气体供给管连接有各种原料气体的供给源,作为处理气体供给系统。在该实施方式中,如后面所述,由于作为蚀刻用混合气体的原料气体,使用CF4、CHF3、CH3F、C4F8、Ar、N2的6种,所以准备有供给这些原料气体的气体供给源100~110。在各个专用气体供给管上分别设置有可以由控制器96分别独立并任意地控制的质量流量控制器(MFC)100a~110a及开关阀100b~110b。FIG. 8 shows a detailed configuration example of the processing gas supply unit 44 in this embodiment. The main gas supply pipe 42 is connected to supply sources of various source gases via individual dedicated or branch gas supply pipes as a process gas supply system. In this embodiment, as will be described later, six types of CF 4 , CHF 3 , CH 3 F, C 4 F 8 , Ar, and N 2 are used as the source gas of the mixed gas for etching. The gas supply sources 100-110 of raw material gas. Mass flow controllers (MFCs) 100 a to 110 a and on-off valves 100 b to 110 b that can be independently and arbitrarily controlled by the controller 96 are provided on the respective dedicated gas supply pipes.

在成为蚀刻加工的对象的半导体晶片W的主面上,如图9的(a)中所示,从下方开始依次层积有多层配线结构的下层侧配线层112、阻挡(barrier)层114、有机系low-k膜(层间绝缘膜)116及掩模118。配线层112是例如Cu配线层,例如由双镶嵌加工来形成。阻挡层114是例如具有

Figure G2009101732006D00121
(0.1μm)的膜厚的氮化硅(SiN)膜,由例如CVD(Chemical Vapor Deposition:化学气相沉积)法形成。有机系low-k膜116是例如具有1μm的膜厚的SiOC系low-k膜,由例如CVD法形成。掩模118是抗蚀剂膜,由通常的光刻形成,在通孔的开孔位置具有开口部118a。On the main surface of the semiconductor wafer W to be etched, as shown in (a) of FIG. layer 114 , an organic low-k film (interlayer insulating film) 116 , and a mask 118 . The wiring layer 112 is, for example, a Cu wiring layer, and is formed by, for example, dual damascene processing. Barrier layer 114 is, for example, having
Figure G2009101732006D00121
The silicon nitride (SiN) film with a film thickness of (0.1 μm) is formed by, for example, a CVD (Chemical Vapor Deposition: Chemical Vapor Deposition) method. The organic low-k film 116 is, for example, a SiOC-based low-k film having a film thickness of 1 μm, and is formed by, for example, a CVD method. The mask 118 is a resist film formed by ordinary photolithography, and has an opening 118a at the opening position of the via hole.

在该实施方式中,针对涉及的被处理体的半导体晶片W进行三步骤方式的蚀刻。首先,作为第一步骤,进行沉积(deposition)处理的蚀刻。该第一步骤的主要蚀刻条件如下。In this embodiment, three-step etching is performed on the semiconductor wafer W of the object to be processed. First, as a first step, etching of a deposition process is performed. The main etching conditions of this first step are as follows.

处理气体:CF4/CH3F/N2=流量50/5/100sccmProcessing gas: CF 4 /CH 3 F/N 2 = flow 50/5/100sccm

腔室内的压力:20mTorrPressure in the chamber: 20mTorr

高频电力:40MHz/2MHz=1000/0WHigh frequency power: 40MHz/2MHz=1000/0W

在该第一步骤中,在蚀刻气体中使用了全氟化碳(perfluorocarbon)系的CH3F。于是,CH3F中的等离子体分解出的H分子很快与F起反应,作为HF被进行排气,由此,容易残留下C。其结果,大量地产生碳系的沉积并就近附着在抗蚀剂掩模118的开口部118a及上面,它成为在后续工序中提高掩模选择比的保护膜。然而,通过大量产生聚合物,并且由于在基座16上没有施加第二高频(2MHz)(即,由于朝向上部电极34的离子入射弱),沉积容易附着在上部电极34上。In this first step, perfluorocarbon-based CH 3 F was used as an etching gas. Then, H molecules decomposed by the plasma in CH 3 F quickly react with F and are exhausted as HF, whereby C is likely to remain. As a result, a large amount of carbon-based deposits occurs and adheres to the opening 118a and the upper surface of the resist mask 118 nearby, and serves as a protective film for improving the mask selectivity in subsequent steps. However, by generating a large amount of polymer, and since the second high frequency (2 MHz) is not applied on the susceptor 16 (ie, due to weak ion incidence toward the upper electrode 34 ), deposits easily adhere to the upper electrode 34 .

根据这样的情况,针对上部电极34的接地电容,如图5所示,将可变电容器86的电容调高,切换到高电容接地(低阻抗)模式,在极端的情况下成为短路接地。由此,提高了针对上部电极34的离子的入射效率,促进溅射,能够使得不附加沉积膜。In such a case, as shown in FIG. 5 , the capacitance of the variable capacitor 86 is increased for the ground capacitance of the upper electrode 34 to switch to a high-capacitance ground (low impedance) mode, and in extreme cases, it becomes a short-circuit ground. Thereby, the incident efficiency of ions to the upper electrode 34 is improved, sputtering is promoted, and an additional deposited film can be avoided.

如图9(b)所示,该第一步骤,在形成于有机系low-k膜116上的孔116a的底达到规定的深度、例如

Figure G2009101732006D00122
附近的深度的时候结束。在该第一步骤结束之际,停止供给CF4/CH3F/N2的混合气体,即在关闭开关阀100b、104b、110b的同时,将高频电源30的输出置于关闭(off)。但是,排气装置58的排气动作保持原来的状态继续。As shown in FIG. 9(b), in this first step, the bottom of the hole 116a formed in the organic low-k film 116 reaches a predetermined depth, for example,
Figure G2009101732006D00122
near the end of the depth. When the first step is completed, the supply of the mixed gas of CF 4 /CH 3 F/N 2 is stopped, that is, the output of the high-frequency power supply 30 is turned off (off) while closing the on-off valves 100b, 104b, and 110b. . However, the exhaust operation of the exhaust device 58 continues as it is.

然后,作为第二步骤,进行主蚀刻。在该第二步骤中的主要的蚀刻条件如下。Then, as a second step, main etching is performed. The main etching conditions in this second step are as follows.

处理气体:CHF3/CF4/Ar/N2=流量40/30/1000/150sccmProcess gas: CHF 3 /CF 4 /Ar/N 2 = flow 40/30/1000/150sccm

腔室内的压力:30mTorrPressure in the chamber: 30mTorr

高频电力:40MHz/2MHz=1000/1000WHigh frequency power: 40MHz/2MHz=1000/1000W

在第二步骤中,在凭借化学反应的等离子体辅助蚀刻中加上凭借离子照射的离子辅助蚀刻,进行高速的各向异性蚀刻。在这样的时候,由于是在没有于上部电极34上附加在之前第一步骤的处理中生成的沉积膜的状态下,开始第二步骤的处理,所以不受第一步骤的处理的影响。In the second step, high-speed anisotropic etching is performed by adding ion-assisted etching by ion irradiation to plasma-assisted etching by chemical reaction. At this time, since the second-step process starts without adding the deposited film formed in the preceding first-step process to the upper electrode 34 , it is not affected by the first-step process.

但是,在第二步骤的处理中,从全氟化碳系的CHF3产生大量的聚合物,即使不像第一步骤的时候那样,也容易在上部电极34上附加沉积,在处理时间比较长的情况下,沉积膜积蓄并且成长为较大的可能性变大。However, in the process of the second step, a large amount of polymer is produced from perfluorocarbon-based CHF 3 , and even if it is not as in the first step, it is easy to be additionally deposited on the upper electrode 34, and the process time is relatively long. In the case of , there is a greater possibility that the deposited film accumulates and grows larger.

鉴于这点,即使是在第二步骤,使上部电极34的接地电容成为图5那样的高电容接地模式,在极端的情况下成为短路接地。由此,提高了针对上部电极34的离子的入射效率并促进了离子溅射,能够使得不附加沉积膜。In view of this point, even in the second step, the ground capacitance of the upper electrode 34 is made into a high-capacitance ground mode as shown in FIG. 5 , and in extreme cases, it becomes a short-circuit ground. As a result, the incident efficiency of ions to the upper electrode 34 is improved, ion sputtering is promoted, and an additional deposited film can be avoided.

如图9(c)所示,第二步骤在有机系low-k膜116的孔116a的底达到规定的深度、例如附近的深度的时候结束。在该步骤结束之际,关闭开关阀102b、100b、108b、110b,停止CHF3/CF4/Ar/N2的混合气体的供给。同时,将两高频电源30、64的输出暂时置于关闭(off)。As shown in FIG. 9(c), the second step reaches a predetermined depth at the bottom of the hole 116a of the organic low-k film 116, for example, near the end of the depth. When this step ends, the on-off valves 102b, 100b, 108b, and 110b are closed to stop the supply of the mixed gas of CHF 3 /CF 4 /Ar/N 2 . At the same time, the outputs of the two high-frequency power supplies 30, 64 are temporarily turned off.

然后,作为最后的第三步骤,进行过蚀刻。该第三步骤中的主要的蚀刻条件如下。Then, as the final third step, overetching is performed. Main etching conditions in this third step are as follows.

处理气体:C4F8/Ar/N2=流量6/1000/150sccmProcess gas: C 4 F 8 /Ar/N 2 = flow 6/1000/150sccm

腔室内的压力:50mTorrPressure in the chamber: 50mTorr

高频电力:40MHz/2MHz=1000/1000WHigh frequency power: 40MHz/2MHz=1000/1000W

在第三步骤中,在保持孔116a的各向异性(垂直形状)的状态下对有机系low-k膜116进行蚀刻,直到达到基底膜(氮化硅)62。即使是在这样的情况下,由于是在没有于上部电极34上附加在之前第二步骤的处理中生成的沉积膜的状态下,开始第三步骤的处理,所以不受第二步骤的处理的影响。In the third step, the organic low-k film 116 is etched up to the base film (silicon nitride) 62 while maintaining the anisotropy (vertical shape) of the hole 116 a. Even in such a case, since the process of the third step is started without adding the deposited film formed in the process of the previous second step to the upper electrode 34, it is not affected by the process of the second step. Influence.

在第三步骤的处理中在蚀刻气体中使用的C4F8/Ar/N2混合气体有对基底膜(氮化硅)62的选择比高这样的优点,尽管产生了碳氟化合物的聚合物,它的产生量是比较小的,并且,没有接着该第三步骤的后续工序的处理。即,在该第三步骤的处理中,即使在上部电极34上附加了沉积膜,也不用考虑由于该沉积膜使以后的处理受到前面的处理的影响的效果(记忆效果)就可以了。另外,例如能够由等离子体清扫另外除去附加在上部电极34或腔室10的侧壁上的沉积膜。The C 4 F 8 /Ar/N 2 mixed gas used in the etching gas in the treatment of the third step has such an advantage that the selectivity ratio to the base film (silicon nitride) 62 is high, although polymerization of fluorocarbons occurs matter, its production amount is relatively small, and there is no subsequent processing of the third step. That is, in the processing of the third step, even if a deposited film is added to the upper electrode 34, it is not necessary to consider the effect (memory effect) that the subsequent processing is affected by the previous processing due to the deposited film. In addition, for example, a deposited film attached to the upper electrode 34 or the side wall of the chamber 10 can be additionally removed by plasma cleaning.

鉴于这一点,在第三步骤中,将上部电极34的接地电容切换到图6所表示的低电容接地(高阻抗)模式。通过这样的方式,能够相对地减少在基座16和上部电极34之间流过的电子电流,并且能够相对地增加在基座16和腔室10的侧壁之间流过的电子电流,能够使在处理空间PS生成的等离子体的密度向半径方向外侧扩展。In view of this, in the third step, the ground capacitance of the upper electrode 34 is switched to the low capacitance ground (high impedance) mode shown in FIG. 6 . In this way, the electron current flowing between the base 16 and the upper electrode 34 can be relatively reduced, and the electron current flowing between the base 16 and the side wall of the chamber 10 can be relatively increased, which can The density of the plasma generated in the processing space PS is expanded radially outward.

在这样的情况下,虽然也可以使半导体晶片W上的蚀刻速率在空间上(特别是在半径方向上)均匀化,但是,优选使边缘部分的蚀刻速率相对地比中心部分高。即,在先前的第一及第二步骤中,由于重视防止上述那样的记忆效果,将上部电极34的接地电容设定地高,所以等离子体密度相对地有在中心部分变高、在周边部分变低的倾向,由此,通孔形成的蚀刻速率也容易相对地在中心部分变高、在周边部分变低。作为结果,在第二步骤的结束时刻,在孔116a的底的深度方面有空间上(特别是半径方向上)的偏差,在中心部分相对地变深,在边缘部分相对地变浅。In such a case, although the etching rate on the semiconductor wafer W can also be uniformized spatially (especially in the radial direction), it is preferable to make the etching rate relatively higher in the edge portion than in the central portion. That is, in the previous first and second steps, the ground capacitance of the upper electrode 34 was set high due to the emphasis on preventing the above-mentioned memory effect, so the plasma density was relatively high in the central part and high in the peripheral part. Therefore, the etching rate for via hole formation tends to be relatively high in the central part and low in the peripheral part. As a result, at the end of the second step, there is a spatial (particularly radial) deviation in the depth of the bottom of the hole 116a, being relatively deep at the center and relatively shallow at the edge.

这里,在最后的第三步骤中,相反地,通过使等离子体密度在中心部分相对地较低而在周边部分相对地较高并且使半导体晶片W上的蚀刻速率在中心部分相对地较低而在边缘部分相对地较高,能够在一定的程度上抵消到此为止的蚀刻深度的偏差。由此,能够提高通过第一~第三步骤的整体处理的蚀刻速率的面内均匀性。Here, in the final third step, conversely, by making the plasma density relatively low in the central portion and relatively high in the peripheral portion and making the etching rate on the semiconductor wafer W relatively low in the central portion, The edge portion is relatively high, and the variation in etching depth so far can be offset to a certain extent. Thereby, the in-plane uniformity of the etching rate through the overall processing of the first to third steps can be improved.

如上所述,根据该实施方式,可变地构成上部电极34的接地电容,根据处理条件,例如在连续的处理中,在先前的处理容易在上部电极34上附加沉积膜的时候,在该处理中将上部电极34的接地电容切换到高电容接地(低阻抗)模式,使在上部电极34上难以附加沉积膜,能够防止或减低对随后的处理产生的影响或记忆效果。另外,在难以于上部电极34上附加沉积膜的处理或最终工序的处理的时候,将上部电极34的接地电容切换到低电容接地(高阻抗)模式,使在处理空间PS内生成的等离子体的密度向半径方向外侧扩展,由此,能够提高处理均匀性。As described above, according to this embodiment, the ground capacitance of the upper electrode 34 is variably configured, and depending on the processing conditions, for example, in the continuous processing, when the previous processing tends to additionally deposit a film on the upper electrode 34, in this processing Switching the ground capacitance of the upper electrode 34 to a high-capacitance ground (low impedance) mode makes it difficult to add a deposited film on the upper electrode 34, which can prevent or reduce the influence or memory effect on subsequent processing. In addition, when it is difficult to add a deposition film on the upper electrode 34 or a final process, the ground capacitance of the upper electrode 34 is switched to a low-capacitance ground (high impedance) mode, so that the plasma generated in the processing space PS The density spreads outward in the radial direction, thereby improving the processing uniformity.

上述的实施方式中的有机系low-k膜的通孔蚀刻是一个例子,本发明可以适用于任意的多步骤处理,当然,也适用于单步骤处理。另外,在上部电极34上电气地连接直流电源(图中没有表示),并在上部电极34上施加任意的直流电压的结构或方式也是可以的。在这样的情况下,上部电极34在从腔室10的电位即从接地电位电气浮起的状态下起直流的作用。The through-hole etching of the organic low-k film in the above-mentioned embodiment is an example, and the present invention is applicable to any multi-step process, and of course, is also applicable to a single-step process. In addition, a DC power supply (not shown) is electrically connected to the upper electrode 34, and a structure or a method in which an arbitrary DC voltage is applied to the upper electrode 34 is also possible. In such a case, the upper electrode 34 functions as a direct current in a state of being electrically floating from the potential of the chamber 10 , that is, from the ground potential.

另外,作为别的实施方式,也可以根据晶片处理片数使静电电容的值变化。一般来说,随着腔室内部的部件的温度由于等离子体而上升,有晶片边缘部分的蚀刻速率降低的倾向。于是,尤其是在蚀刻初期,使晶片中心的蚀刻速率与晶片边缘部分的蚀刻速率的上升同步增加,保持均匀性,如果处理片数增加,晶片边缘部分的蚀刻速率下降,则使静电电容可变部的静电电容值变小,使晶片边缘部分的蚀刻速率的降低下降。In addition, as another embodiment, the value of the electrostatic capacitance may be changed according to the number of wafers processed. In general, as the temperature of components inside the chamber increases due to plasma, the etching rate at the edge of the wafer tends to decrease. Therefore, especially in the early stage of etching, the etching rate at the center of the wafer is increased synchronously with the increase of the etching rate at the edge of the wafer to maintain uniformity. The electrostatic capacitance value of the portion becomes smaller, so that the reduction of the etching rate at the edge portion of the wafer is reduced.

在上述的实施方式中使用的高频的频率是一个例子,可以根据处理使用任意的频率。另外,装置内的各个部分的结构也可以有各种变形。尤其是,上述实施方式中的静电电容可变部86的结构是一个例子,能够采用可以使上部电极34的周围的静电电容或接地电容在所希望的范围内改变的任意电容器结构。虽然上述实施方式涉及等离子体蚀刻装置及等离子体蚀刻方法,但是,本发明也可以适用于等离子体CVD、等离子体氧化、等离子体氮化、溅射等的其它的等离子体处理装置及处理方法。另外,在本发明中的被处理基板不限于半导体晶片,也可以是平板显示器用的各种基板或光掩模、CD基板和印刷基板等。The high-frequency frequency used in the above-mentioned embodiments is an example, and any frequency may be used according to the processing. In addition, various modifications may be made to the structure of each part in the device. In particular, the configuration of the capacitance variable unit 86 in the above embodiment is an example, and any capacitor configuration that can change the capacitance around the upper electrode 34 or the ground capacitance within a desired range can be employed. Although the above-described embodiments relate to a plasma etching device and a plasma etching method, the present invention can also be applied to other plasma processing devices and processing methods such as plasma CVD, plasma oxidation, plasma nitridation, and sputtering. In addition, the substrate to be processed in the present invention is not limited to a semiconductor wafer, and may be various substrates for flat panel displays, photomasks, CD substrates, printed substrates, and the like.

Claims (7)

1.一种等离子体处理装置,其特征在于,包括:1. A plasma processing device, characterized in that, comprising: 可真空排气的、接地的处理容器;Vacuum-ventable, grounded processing containers; 经由绝缘物或空间安装在所述处理容器内的第一电极;a first electrode mounted within the processing vessel via an insulator or a space; 静电电容可变部,该静电电容可变部电气地连接在所述第一电极和接地电位之间,在设置于所述第一电极与所述处理容器的侧壁之间的环状绝缘体中形成有环状的液体收容室,经由配管从所述处理容器的外面向所述液体收容室导入具有规定的介电常数的液体或者从所述液体收容室向所述处理容器的外面导出具有规定的介电常数的液体,从而使静电电容可变;an electrostatic capacitance variable portion electrically connected between the first electrode and a ground potential in an annular insulator provided between the first electrode and a side wall of the processing container An annular liquid storage chamber is formed, and a liquid having a predetermined dielectric constant is introduced into the liquid storage chamber from the outside of the processing container through a pipe, or a liquid having a predetermined dielectric constant is led out from the liquid storage chamber to the outside of the processing container. The dielectric constant of the liquid, so that the electrostatic capacitance is variable; 在所述处理容器内隔开规定的间隔与所述第一电极平行配置,并与所述第一电极相对,支承被处理基板的第二电极;a second electrode that is arranged in parallel with the first electrode at a predetermined interval in the processing container, and faces the first electrode, and supports the substrate to be processed; 向所述第一电极、所述第二电极和所述处理容器的侧壁之间的处理空间提供所希望的处理气体的处理气体供给部;a processing gas supply part that supplies a desired processing gas to a processing space between the first electrode, the second electrode, and a side wall of the processing container; 为了在所述处理空间生成所述处理气体的等离子体,在所述第二电极上施加第一高频的第一高频供电部;以及a first high frequency power supply unit that applies a first high frequency to the second electrode in order to generate plasma of the process gas in the process space; and 根据被实施等离子体处理的所述基板的等离子体处理的处理条件或者所述基板的处理片数切换所述静电电容可变部的静电电容的静电电容控制部。The capacitance control unit switches the capacitance of the capacitance variable unit according to processing conditions of the plasma treatment of the substrate to be subjected to plasma treatment or the number of processed substrates. 2.根据权利要求1所述的等离子体处理装置,其特征在于:2. The plasma processing device according to claim 1, characterized in that: 所述静电电容控制部预先将所述静电电容可变部的静电电容的值调大,随着处理片数的增加,减小所述静电电容的值。The electrostatic capacity control unit increases the value of the electrostatic capacity of the electrostatic capacity variable unit in advance, and decreases the value of the electrostatic capacity as the number of sheets processed increases. 3.根据权利要求1所述的等离子体处理装置,其特征在于:3. The plasma processing device according to claim 1, characterized in that: 所述静电电容控制部,在沉积膜能够附加于所述第一电极上的处理的时候,将所述静电电容可变部的静电电容切换到高,在沉积膜不能附加于所述第一电极上的时候,将所述静电电容可变部的静电电容切换到低。The capacitance control unit switches the capacitance of the capacitance variable unit to high when the deposition film can be attached to the first electrode, and switches the capacitance of the capacitance variable unit to high when the deposition film cannot be attached to the first electrode. When on, switch the electrostatic capacitance of the electrostatic capacitance variable part to low. 4.根据权利要求1所述的等离子体处理装置,其特征在于:4. The plasma processing device according to claim 1, characterized in that: 所述静电电容控制部,在多步骤的处理中,在除了最后步骤的各步骤的处理的时候,将所述静电电容可变部的静电电容切换到高,在最后步骤的处理的时候将所述静电电容可变部的静电电容切换到低。In the multi-step process, the capacitance control unit switches the capacitance of the variable capacitance unit to high during the processing of each step except the last step, and switches the capacitance of the variable unit to high during the processing of the last step. The electrostatic capacitance of the electrostatic capacitance variable part is switched to low. 5.根据权利要求1所述的等离子体处理装置,其特征在于:5. The plasma processing device according to claim 1, characterized in that: 所述静电电容可变部具有可变电容器。The capacitance variable unit has a variable capacitor. 6.根据权利要求1所述的等离子体处理装置,其特征在于:6. The plasma processing device according to claim 1, characterized in that: 向所述第二电极施加比所述第一高频的频率低的第二高频。A second high frequency lower than that of the first high frequency is applied to the second electrode. 7.根据权利要求1所述的等离子体处理装置,其特征在于:7. The plasma processing device according to claim 1, characterized in that: 具有向所述第一电极施加所希望的直流电压的直流电源。A DC power supply is provided for applying a desired DC voltage to the first electrode.
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