CN101739966A - Voltage stabilizing circuit and display using same - Google Patents

Abstract

The invention discloses a voltage stabilizing circuit and a display applying the same. The voltage stabilizing circuit comprises a load circuit and a switch circuit. The load circuit is electrically connected between the power supply and the switch circuit. The switch circuit is provided with a first switch endpoint, a second switch endpoint and a control endpoint, wherein the first switch endpoint is electrically connected to the load circuit, and the second switch endpoint is electrically connected to the grounding end. Wherein the switch circuit is closed when the load draws current from the power source and is opened when the load stops drawing current from the power source, such that current provided by the power source flows through the load circuit to ground. The display comprises a display panel, a power supply, a voltage stabilizing circuit and a time sequence controller, wherein the voltage stabilizing circuit is used for stabilizing the output voltage of the power supply.

Description

Voltage stabilizing circuit and display using the voltage stabilizing circuit

technical field

The invention relates to a voltage stabilizing circuit and a display, in particular to a liquid crystal display and a voltage stabilizing circuit thereof.

Background technique

With the advancement of optical technology and semiconductor technology, many display technologies have been developed one after another. Among them, liquid crystal display (LCD) has high image quality, small size, light weight, low voltage drive, low power consumption and wide application range. Wide and other advantages, so it is widely used in consumer electronics or computer products such as medium and small portable TVs, mobile phones, video recorders, notebook computers, desktop monitors, and projection TVs, and has gradually replaced the cathode The ray tube (Cathode RayTube; CRT) will become the mainstream of the display in the future, especially the thin film transistor (Thin Film Transistor; TFT) liquid crystal display device, because of its high display quality and low power consumption, it almost occupies most of the market. In addition, with the vigorous development of high-definition digital television in recent years, TFT-LCD has become the best display technology for high-definition television.

Referring to FIG. 1 , it is a schematic circuit diagram of a voltage stabilizing circuit 10 of a liquid crystal display according to the known technology. In the known technology, the voltage ripple of the panel power supply V _DA is relatively large, which is not suitable as a reference power supply for the panel 11 . Because the reference power is generally used to generate gamma voltage, and as a reference voltage for a digital-to-analog converter (DAC), that is, for converting a digital grayscale signal to a pixel driving voltage. If the reference power supply is unstable, the correspondingly generated gamma voltage is also unstable, so that the pixel driving voltage used to drive the panel 11 is unstable, and the display screen will be abnormal. Therefore, the voltage stabilizing circuit 10 is required to reduce the voltage ripple of the panel power V _DA and provide the reference power V _ref with smaller voltage ripple to the panel 11 .

A traditional voltage stabilizing circuit 10 is composed of a voltage stabilizing diode 12 and a plurality of resistors 14 . When the voltage of the panel power supply V _DA exceeds the preset threshold, the voltage stabilizing circuit 10 can absorb excess power to maintain the voltage of the panel power V _DA near the preset threshold.

However, due to the high price of the voltage stabilizing diode 12 and the relatively long preparation time, the overall cost of the panel using the traditional voltage stabilizing circuit increases.

Contents of the invention

Therefore, one aspect of the present invention is to provide a low-cost voltage stabilizing circuit.

Another aspect of the present invention is to provide a low-cost display.

According to an embodiment of the present invention, the voltage stabilizing circuit at least includes a load circuit and a switch circuit. The load circuit has a first load terminal and a second load terminal, the first load terminal being electrically connected to a power source. The switch circuit is used to switch according to the working state of the load, wherein the switch circuit has a first switch terminal, a second switch terminal and a first control terminal, the first switch terminal is electrically connected to the second load terminal, and the second switch terminal is electrically connected to the ground end. Wherein, when the load draws current from the power supply, the switch circuit is turned off, and when the load stops drawing current from the power supply, the switch circuit is turned on, so that the current provided by the power supply flows through the load circuit to the ground terminal.

According to another embodiment of the present invention, the first control terminal is electrically connected to a timing controller to receive the working status signal, when the logic level of the working status signal is high, the load draws current from the power supply, and the switch circuit is turned off ; When the logic level of the working state signal is low, the load stops drawing current from the power supply, and the switch circuit is turned on.

According to another embodiment of the present invention, the switch circuit includes at least a first N-channel transistor switch and an inverter. The first N-channel transistor switch has a third switch terminal, a fourth switch terminal and a second control terminal, wherein the third switch terminal is electrically connected to the first switch terminal, and the fourth switch terminal is electrically connected to the second switch terminal. The inverter is used to invert the working status signal to obtain an inverted working status signal, and output the inverted working status signal to the second control terminal, wherein the inverter is electrically connected to the first control terminal.

According to yet another embodiment of the present invention, the inverter includes at least a pull-up resistor and a second N-channel transistor switch. The pull-up resistor has a third load terminal and a fourth load terminal, and the third load terminal is electrically connected to another power source. The second N-channel transistor switch has a fifth switch terminal, a sixth switch terminal and a third control terminal, the third control terminal is electrically connected to the first control terminal, the fifth switch terminal is electrically connected to the ground terminal, and the sixth switch terminal is electrically connected to to the fourth load terminal, and output an inverted working status signal.

According to yet another embodiment of the present invention, the display at least includes a power supply, a timing controller, a voltage stabilizing circuit, a gamma voltage generating circuit, at least one source driver, at least one gate driver and a display panel. The power supply is used for providing power voltage. The timing controller is used to output image data signals, drive control signals and working status signals. The voltage stabilizing circuit is electrically connected to the power supply to stabilize the power supply voltage to output a reference voltage, wherein the voltage stabilizing circuit at least includes a load circuit and a switch circuit. The load circuit has a first load terminal and a second load terminal, and the first load terminal is electrically connected to the power supply. The switch circuit has a first switch terminal, a second switch terminal and a control terminal, wherein the first switch terminal is electrically connected to the second load terminal, and the second switch terminal is electrically connected to the ground terminal, wherein the control terminal is electrically connected to the timing controller, so that Receive working status signal. The gamma voltage generating circuit is electrically connected to the voltage stabilizing circuit to receive the reference voltage to work and output the gamma voltage. The source driver is electrically connected to the gamma voltage generating circuit and the timing controller to convert the image data signal into a grayscale signal according to the gamma voltage. The gate driver is electrically connected to the timing controller to receive the driving control signal to output the pixel control signal. The display panel is electrically connected to a source driver and a gate driver to display images according to pixel control signals and grayscale signals. Wherein when the gamma voltage generating circuit draws current from the power supply, the timing controller can use the working status signal to close the switching circuit. When the gamma voltage generating circuit stops drawing current from the power supply, the timing controller can use the working status signal to turn on the switch circuit, so that the current provided by the power supply flows through the load circuit to the ground terminal.

Description of drawings

In order to make the above-mentioned and other objects, features, and advantages of the present invention more obvious and understandable, the above-mentioned preferred embodiments, combined with the accompanying drawings, are described in detail as follows:

Fig. 1 shows the circuit diagram according to the voltage stabilizing circuit of the liquid crystal display of known technology;

FIG. 2 is a schematic circuit diagram of a voltage stabilizing circuit according to a first embodiment of the present invention;

FIG. 3 is a schematic circuit diagram of a voltage stabilizing circuit according to a second embodiment of the present invention;

FIG. 4 is a schematic functional block diagram of a display according to a third embodiment of the present invention;

FIG. 5 is a schematic functional block diagram of a display according to a fourth embodiment of the present invention.

[Description of main component symbols]

10: Regulator circuit 11: Panel

12: Zener diode 14: Resistor

100: Regulator circuit 102: Load circuit

102a: Load endpoint 102b: Load endpoint

104: switch circuit 104a: switch terminal

104b: switch terminal 104c: control terminal

106: Voltage level shifter 108: Load

110: P-channel transistor switch 110a: switch terminal

110b: switch endpoint 110c: control endpoint

200: Regulator circuit 202: N-channel transistor switch

202a: switch terminal 202b switch terminal

202c: control terminal 204: switch circuit

204a: switch terminal 204b: switch terminal

204c: Control terminal 206: N-channel transistor switch

206a: switch terminal 206b: switch terminal

206c: Control terminal 208: Pull-up resistor

208a: Load endpoint 208b: Load endpoint

210: Inverter 300: Display

302: Timing controller 304: Power supply

306: Gamma voltage generation circuit 308: Source driver

310: Gate driver 312: Display panel

400: Display 408: Source driver

Vref: Reference power supply V _DA : Power supply

V _DD : Power Vss: Ground

V _in : external power supply DE: working status signal

S _d : Image data S _f : Encoded image data

S _g : Drive control signal V _ga : Gamma voltage

S _p : Pixel control signal

Detailed ways

Referring to FIG. 2 , it shows a schematic circuit diagram of a voltage stabilizing circuit 100 according to a first embodiment of the present invention. The voltage stabilizing circuit 100 includes a load circuit 102 , a switch circuit 104 and a voltage level shifter (levelshifter) 106 . In this embodiment, the load circuit 102 is represented by a resistor as an example, however, in other embodiments, the load circuit 102 may be a circuit device with a more complicated structure. The load circuit 102 has a load terminal 102 a and a load terminal 102 b, the load terminal 102 a is electrically connected to the power supply V _DA , and the load terminal 102 b is electrically connected to the switch circuit 104 .

The switch circuit 104 has a switch terminal 104a, a switch terminal 104b and a control terminal 104c. The switch terminal 104a is electrically connected to the load terminal 102b, the switch terminal 104b is electrically connected to the ground terminal V _SS , and the control terminal 104c is electrically connected to a timing controller through the voltage level shifter 106 to receive the working state signal DE. The working status signal DE indicates the working status of the load 108 .

In this embodiment, when the logic level of the working status signal DE is high, the load 108 starts to draw current from the power supply V _DA . When the logic level of the working status signal DE is low (low), the load 108 stops drawing current from the power supply V _DA . In addition, the switch circuit 104 of this embodiment includes a P-channel transistor switch 110 . The P-channel transistor switch 110 has a switch terminal 110a, a switch terminal 110b and a control terminal 110c, wherein the switch terminal 110a is electrically connected to the switch terminal 104a, the switch terminal 110b is electrically connected to the switch terminal 104b, and the control terminal 110c is electrically connected to the control terminal 104c.

When the logic level of the working state signal DE is high, the switch circuit 104 is in a closed state, and the power supply V _DA provides current to the load 108 . When the logic level of the working state signal DE is low, the load 108 stops drawing current from the power source V _DA , and the switch circuit 104 is turned on, so the power source V _DA provides current to the load circuit 102 . Properly designing the resistance of the load circuit 102 to match the load of the load 108 can make the value of the current flowing through the load circuit 102 close to the value of the current drawn by the load 108 .

It can be seen from the above description that since the power supply V _DA always provides a fixed current value to the back-end circuit, the voltage ripple of the power supply V _DA can be greatly reduced.

In addition, the voltage level converter 106 is used for converting the logic level of the working state signal DE. Therefore, the voltage level shifter 106 can be omitted if the logic level of the working state signal DE is within a preset range meeting the system requirements.

Referring to FIG. 3 , it shows a schematic circuit diagram of a voltage stabilizing circuit 200 according to a second embodiment of the present invention. The voltage stabilizing circuit 200 is similar to the stabilizing circuit 100 , but the difference is that the switching circuit 204 of the stabilizing circuit 200 includes an N-channel transistor switch 202 and an inverter 210 . Wherein, the switch circuit 204 has a switch terminal 204a, a switch terminal 204b and a control terminal 204c. The switch terminal 204a is electrically connected to the load terminal 202b, the switch terminal 204b is electrically connected to the ground terminal Vss, and the control terminal 204c is electrically connected to a timing controller to receive the working state signal DE.

The N-channel transistor switch 202 has a switch terminal 202a, a switch terminal 202b and a control terminal 202c, wherein the switch terminal 202a is electrically connected to the switch terminal 104a, the switch terminal 202b is electrically connected to the switch terminal 104b, and the control terminal 202c is electrically connected to the inverter 210.

Inverter 210 includes N-channel transistor switch 206 and pull-up resistor 208 . The pull-up resistor 208 has load terminals 208a and 208b, wherein the load terminal 208a is electrically connected to the power supply V _DD . The N-channel transistor switch 206 has a switch terminal 206a, a switch terminal 206b and a control terminal 206c, wherein the switch terminal 206b is electrically connected to the switch terminal 204b, the switch terminal 206c is electrically connected to the control terminal 204c, and the switch terminal 206a is electrically connected to the load terminal 208b, And output an inverted working state signal to the control terminal 202c.

Referring to FIG. 4 , it shows a schematic functional block diagram of a display 300 according to a third embodiment of the present invention. The display 300 includes a timing controller 302 , a power supply 304 , a voltage stabilizing circuit 100 , a gamma voltage generating circuit 306 , a source driver 308 , a gate driver 310 and a display panel 312 . The timing controller 302 is used to receive the encoded image data S _f from the host and decode it to obtain the driving control signal S _g , the image data S _d and the working state signal DE. The power supply 304 is used to receive an external power supply _Vin to provide power to the gamma voltage generating circuit 306, and the voltage stabilizing circuit 100 is electrically connected between the power supply 304 and the gamma voltage generating circuit 306 to stabilize the power supply 304 provides the voltage V _DA , and outputs a stable reference voltage V _ref to the gamma voltage generating circuit 306 . The source driver 308 is electrically connected to the timing controller 302 and the gamma voltage generation circuit 306, to receive the image data S _d transmitted by the timing controller 302, and _to generate Convert the image data into grayscale data S _gray . The gate driver 310 is electrically connected to the timing controller 302 to receive the driving control signal S _g and output the pixel control signal S _p . When the display panel 312 displays images, the timing controller 302 controls the gate driver 310 to drive the transistor switches in the display panel 312, so that each pixel in the display panel 312 correspondingly displays the grayscale data transmitted by the source driver 308 S _gray .

The display 300 of this embodiment utilizes the voltage stabilizing circuit 100 to stabilize the power supplied to the gamma voltage generating circuit 306 , so the voltage ripple of the display 300 can be significantly improved, and the cost of the display 300 can be lower than that of the prior art.

Referring to FIG. 5 , it shows a schematic structural diagram of a display 400 according to a fourth embodiment of the present invention. The display 400 is similar to the display 300, but the difference is that the source driver 408 of the display 400 integrates the voltage stabilizing circuit 100, the gamma voltage generation circuit 306 and the source driver 308, so the source driver 408 can be easily arranged on the panel 312 on the substrate to reduce the volume of the display 400 .

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope should be governed by the scope of the appended claims.

Claims (13)

1. A voltage stabilizing circuit for stabilizing the voltage of a power supply, wherein the power supply is used to provide current to a load, and the voltage stabilizing circuit at least includes: a load circuit, wherein the load circuit has a first load terminal and a second load terminal, the first load terminal being electrically connected to the power supply; and A switch circuit, used for switching according to the working state of the load, wherein the switch circuit has a first switch terminal, a second switch terminal and a first control terminal, and the first switch terminal is electrically connected to the second load terminal , the second switch terminal is electrically connected to the ground terminal; Wherein, when the load draws current from the power supply, the switch circuit is turned off, and when the load stops drawing current from the power supply, the switch circuit is turned on so that the current provided by the power supply flow through the load circuit to the ground. 2. The voltage stabilizing circuit according to claim 1, wherein the first control terminal is electrically connected to a timing controller to receive an operating status signal, and when the logic level of the operating status signal is high, the The load draws current from the power supply, and the switch circuit is turned off; when the logic level of the working state signal is low, the load stops drawing current from the power supply, and the switch circuit is turned on. 3. The voltage stabilizing circuit according to claim 2, wherein the switch circuit comprises at least: A first N-channel transistor switch having a third switch terminal, a fourth switch terminal and a second control terminal, wherein the third switch terminal is electrically connected to the first switch terminal, and the fourth switch terminal is electrically connected to the the second switch terminal; and an inverter, used to invert the working state signal to obtain an inverted working state signal, and output the inverted working state signal to the second control terminal, wherein the inverter is electrically connected to The first control endpoint. 4. The voltage stabilizing circuit according to claim 3, wherein the inverter comprises at least: a pull-up resistor, wherein the pull-up resistor has a third load terminal and a fourth load terminal, the third load terminal being electrically connected to another power supply; and A second N-channel transistor switch, wherein the second N-channel transistor switch has a fifth switch terminal, a sixth switch terminal, and a third control terminal, the third control terminal is electrically connected to the first control terminal, the The fifth switch terminal is electrically connected to the ground terminal, the sixth switch terminal is electrically connected to the fourth load terminal, and outputs the inverted working state signal. 5. The voltage stabilizing circuit according to claim 2, further comprising a voltage level shifter, wherein the voltage level shifter is used to adjust the voltage level of the working state signal to make the voltage of the working state signal equal to level is within the preset range. 6. The voltage stabilizing circuit according to claim 1, wherein the load is a display panel. 7. The voltage stabilizing circuit according to claim 1, wherein the value of the current flowing through the load circuit is the same as the value of the current drawn by the load. 8. A display comprising at least: a power supply for providing a power supply voltage; a timing controller for outputting image data signals, drive control signals and working status signals; A voltage stabilizing circuit, electrically connected to the power supply, to stabilize the power supply voltage to output a reference voltage, wherein the voltage stabilizing circuit at least includes: a load circuit, wherein the load circuit has a first load terminal and a second load terminal, the first load terminal being electrically connected to the power supply; and A switch circuit, wherein the switch circuit has a first switch terminal, a second switch terminal and a first control terminal, the first switch terminal is electrically connected to the second load terminal, and the second switch terminal is electrically connected to the ground terminal , wherein the first control terminal is electrically connected to the timing controller to receive the working status signal; a gamma voltage generating circuit, electrically connected to the voltage stabilizing circuit, to receive the reference voltage to work, and output a gamma voltage; at least one source driver electrically connected to the gamma voltage generating circuit and the timing controller to convert the image data signal into a grayscale signal according to the gamma voltage; at least one gate driver, electrically connected to the timing controller, to receive the drive control signal to output a pixel control signal; and a display panel electrically connected to the at least one source driver and the at least one gate driver to display images according to the pixel control signal and the grayscale signal; Wherein when the gamma voltage generating circuit draws current from the power supply, the timing controller uses the working status signal to close the switch circuit, and when the gamma voltage generating circuit stops drawing current from the power supply When the supply draws current, the timing controller uses the working state signal to turn on the switch circuit, so that the current provided by the power supply flows through the load circuit to the ground terminal. 9. The display according to claim 8, wherein the switch circuit comprises at least: A first N-channel transistor switch having a third switch terminal, a fourth switch terminal and a second control terminal, wherein the third switch terminal is electrically connected to the first switch terminal, and the fourth switch terminal is electrically connected to the the second switch terminal; and an inverter, used to invert the working state signal to obtain an inverted working state signal, and output the inverted working state signal to the second control terminal, wherein the inverter is electrically connected to The first control endpoint. 10. The display of claim 9, wherein the inverter comprises at least: a pull-up resistor, wherein the pull-up resistor has a third load terminal and a fourth load terminal, the third load terminal being electrically connected to another power supply; and A second N-channel transistor switch, wherein the second N-channel transistor switch has a fifth switch terminal, a sixth switch terminal, and a third control terminal, the third control terminal is electrically connected to the first control terminal, the The fifth switch terminal is electrically connected to the ground terminal, the sixth switch terminal is electrically connected to the fourth load terminal, and outputs the inverted working state signal. 11. The display according to claim 8, wherein the voltage stabilizing circuit further comprises a voltage level shifter, the voltage level shifter is used to adjust the voltage level of the working state signal, so that the working state The voltage level of the signal is within a preset range. 12. The display according to claim 8, wherein the current value flowing through the load circuit is the same as the current value drawn by the display panel. 13. The display according to claim 8, wherein the first control terminal is electrically connected to a timing controller to receive the working status signal, and when the logic level of the working status signal is high, the The load draws current from the power supply, and the switch circuit is turned off; when the load stops drawing current from the power supply, the logic level of the working state signal is low, and the switch circuit is turned on.

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