CN101950758B - Grid structure of high-K material based on silicon-on-insulator (SOI) substrate and preparation method thereof - Google Patents
Grid structure of high-K material based on silicon-on-insulator (SOI) substrate and preparation method thereof Download PDFInfo
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- CN101950758B CN101950758B CN201010225694A CN201010225694A CN101950758B CN 101950758 B CN101950758 B CN 101950758B CN 201010225694 A CN201010225694 A CN 201010225694A CN 201010225694 A CN201010225694 A CN 201010225694A CN 101950758 B CN101950758 B CN 101950758B
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- 239000000463 material Substances 0.000 title claims abstract description 64
- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 238000002360 preparation method Methods 0.000 title claims description 10
- 239000012212 insulator Substances 0.000 title description 3
- 238000000034 method Methods 0.000 claims abstract description 24
- 229910004298 SiO 2 Inorganic materials 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 20
- 239000012535 impurity Substances 0.000 claims abstract description 7
- 238000004544 sputter deposition Methods 0.000 claims abstract 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
- 239000007789 gas Substances 0.000 claims description 13
- 229910052757 nitrogen Inorganic materials 0.000 claims description 8
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 6
- 229910052746 lanthanum Inorganic materials 0.000 claims description 3
- 229910052688 Gadolinium Inorganic materials 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 239000008367 deionised water Substances 0.000 claims description 2
- 229910021641 deionized water Inorganic materials 0.000 claims description 2
- CMIHHWBVHJVIGI-UHFFFAOYSA-N gadolinium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[Gd+3].[Gd+3] CMIHHWBVHJVIGI-UHFFFAOYSA-N 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052726 zirconium Inorganic materials 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims 3
- 229910021193 La 2 O 3 Inorganic materials 0.000 claims 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims 1
- 238000007664 blowing Methods 0.000 claims 1
- 239000000356 contaminant Substances 0.000 claims 1
- UIWYJDYFSGRHKR-UHFFFAOYSA-N gadolinium atom Chemical compound [Gd] UIWYJDYFSGRHKR-UHFFFAOYSA-N 0.000 claims 1
- 229910001938 gadolinium oxide Inorganic materials 0.000 claims 1
- 229940075613 gadolinium oxide Drugs 0.000 claims 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical group [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims 1
- 229910000449 hafnium oxide Inorganic materials 0.000 claims 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical group [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims 1
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical group [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims 1
- 229910001936 tantalum oxide Inorganic materials 0.000 claims 1
- 229910001928 zirconium oxide Inorganic materials 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 abstract description 16
- 239000010703 silicon Substances 0.000 abstract description 16
- 238000000231 atomic layer deposition Methods 0.000 abstract description 11
- 238000009792 diffusion process Methods 0.000 abstract description 11
- 238000010438 heat treatment Methods 0.000 abstract description 4
- -1 nitrogen oxide compound Chemical class 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- MWUXSHHQAYIFBG-UHFFFAOYSA-N nitrogen oxide Inorganic materials O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 abstract 2
- 238000005121 nitriding Methods 0.000 abstract 1
- 230000008929 regeneration Effects 0.000 abstract 1
- 238000011069 regeneration method Methods 0.000 abstract 1
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 229910052786 argon Inorganic materials 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 10
- 238000006243 chemical reaction Methods 0.000 description 8
- 238000000151 deposition Methods 0.000 description 5
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 4
- 238000010926 purge Methods 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- BRGOCSWOKBOIOJ-UHFFFAOYSA-N N.[O-2].[Hf+4] Chemical compound N.[O-2].[Hf+4] BRGOCSWOKBOIOJ-UHFFFAOYSA-N 0.000 description 1
- JXXICDWXXTZTHN-UHFFFAOYSA-M N.[O-2].[O-2].[OH-].O.[Ta+5] Chemical compound N.[O-2].[O-2].[OH-].O.[Ta+5] JXXICDWXXTZTHN-UHFFFAOYSA-M 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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Abstract
本发明介绍了一种在SOI材料上制备多层高介电常数材料栅结构的方法。首先通过O2等离子体对SOI表面进行预处理，同时SOI衬底表面将形成一层超薄的SiO2界面层，接着在这层超薄的SiO2上利用原子层沉积(ALD)方式生长一层超薄的Si3N4，这层Si3N4将有效隔离高介电常数材料层中的杂质元素与SOI顶层硅之间的扩散，以及阻止下方SiO2层在后期热处理过程中的再生长。接着在Si3N4上沉积一层高介电常数材料，并对高介电常数材料进行适当的氮化处理，使得高介电常数材料上层形成一层高介电常数的氮氧化合物，这层氮氧化合物将有效阻止金属栅电极与高介电常数材料层之间的元素扩散。最后溅射生长金属电极。
The invention introduces a method for preparing a multilayer gate structure of high dielectric constant material on SOI material. First, the SOI surface is pretreated by O2 plasma, and an ultra-thin SiO2 interface layer will be formed on the surface of the SOI substrate, and then a layer of SiO2 is grown on this ultra-thin SiO2 by atomic layer deposition (ALD). An ultra-thin layer of Si 3 N 4 , this layer of Si 3 N 4 will effectively isolate the diffusion between the impurity elements in the high dielectric constant material layer and the silicon on the top layer of SOI, and prevent the regeneration of the lower SiO 2 layer in the later heat treatment process. grow. Then deposit a layer of high dielectric constant material on Si 3 N 4 , and carry out appropriate nitriding treatment on the high dielectric constant material, so that a layer of high dielectric constant nitrogen oxide compound is formed on the upper layer of the high dielectric constant material, which is Layer oxynitride will effectively prevent elemental diffusion between the metal gate electrode and the high dielectric constant material layer. Finally, metal electrodes are grown by sputtering.
Description
Technical field
The present invention relates to a kind of high dielectric constant material grid structure based on the SOI substrate and preparation method thereof, belong to microelectronics and solid electronics technical field.
Background technology
Fast development along with microelectric technique; The research and development of high-performance, high integration, multi-functional IC are more and more harsher to the requirement of material; Silicon on the insulator (Silicon-on-insulator SOI) material is the novel silicon base integrated circuit material; Be described as " the novel silicon base integrated circuit technique of 21 century ", compare with body silicon, SOI have no breech lock, at a high speed, advantage such as low pressure, low-power consumption and anti-irradiation.Be accompanied by constantly reducing of device feature size in addition, for guaranteeing that grid have better controlled ability, SiO to raceway groove
2The thickness of gate dielectric layer can be more and more thinner, and the direct Tunneling electric current between this moment grid and the raceway groove highly significant that will become has brought weaken the increase with device power consumption of grid to raceway groove control thus; In addition, also there are restrictions such as long-term reliability, boron penetration and uniformity in ultra-thin Si O2 gate dielectric layer.One of effective ways that overcome these restrictions are the novel dielectric materials (high-k material) that adopts high-k.Adopt after the high-k material, guaranteeing that raceway groove is had under the condition of identical control ability, the increase of gate insulation medium dielectric constant will make the physical thickness of gate dielectric layer increase, thereby can effectivelyly overcome these restrictions.Yet, the interface that high-k gate oxide and silicon form still can not and SiO
2Analogy, the general density of states is than SiO
2(～10
10/ cm
2) high two one magnitude.This will directly cause the reduction of channel carrier mobility.Another very important problem is the diffusion problem between high-k gate oxide and the metal electrode, and the metal electrode elemental diffusion can cause the dielectric property of high-k gate oxide greatly to reduce.
Chinese patent 200310108275.9 has disclosed a kind of high dielectric constant material grid structure and preparation technology thereof.At the extremely thin silicon oxynitride layer of silicon chip surface oxidation growth one as the interface buffering area between high dielectric constant material and the silicon substrate, so that effectively isolate impurity element and the diffusion between silicon substrate in the high dielectric constant material; In the method for high dielectric constant material surface by utilizing CVD or carry out nitrogen treatment and make its surface form skim silicon nitride high dielectric constant material is covered; And, stop boron penetration simultaneously from the P+ polycrystalline as the boundary layer of high dielectric constant material and polysilicon.
But the substrate of its usefulness is Si, and it does not possess the above-mentioned advantage of utilizing the SOI substrate, and in addition, this patent is direct growth SiON on substrate, the layer of sin of on the high dielectric constant material layer, growing.What Chinese patent 200310108275.9 used is polygate electrodes, is easy to generate a large amount of defectives between polygate electrodes and the high dielectric constant material, also can reduce the device electron mobility.
And the present invention adopts the SOI backing material, earlier with O
2Plasma is handled top layer silicon, generates the ultra-thin SiO of one deck
2Therefore layer can have good SiO
2/ Si boundary layer, well-known, SiO
2The interfacial state of the SiON/Si that the well Chinese patent 200310108275.9 of interfacial state between the/Si uses; The present invention is at SiO
2The Si of growth on the layer
3N
4Layer can effectively be isolated impurity element and the diffusion between the SOI top layer silicon in the high dielectric constant material layer, and SiO below stoping
2The regrowth of layer in the later stage heat treatment process.The present invention directly carries out suitable nitrogenize to the high dielectric constant material of the superiors, so that generate the oxynitrides of high dielectric constant material, the dielectric constant of the oxynitrides of high dielectric constant material is higher than SiN usually.The oxynitrides that forms through the nitrogen treatment to the high-k gate oxide will effectively stop the Elements Diffusion between metal gate electrode and the high dielectric constant material layer.
Summary of the invention
The object of the present invention is to provide a kind of high dielectric constant material grid structure and preparation method thereof; So that effectively solve following problem: the interfacial state problem between (1) high dielectric constant material and the SOI substrate. impurity element in (2) high dielectric constant material layer and the diffusion between the SOI top layer silicon, and SiO
2The regrowth problem of layer in the later stage heat treatment process.(3) diffusion problem of metal gate electrode impurity element in the high dielectric constant material layer.
For solving the problems of the technologies described above, the present invention adopts following technical scheme: a kind of high dielectric constant material grid structure based on the SOI substrate, this structure comprises the SiO that is positioned on the SOI substrate
2Layer, be positioned at SiO
2Si on the layer
3N
4Layer, be positioned at Si
3N
4On the high dielectric constant oxide layer and be positioned at the high-k layer of oxynitride on the high dielectric constant oxide layer and be positioned at the metal gate electrode 6 on the high-k layer of oxynitride.
The grid structure of the present invention's preparation is the multilayer material structure, and wherein, metal gate electrode is that the layer of oxynitride of high-k, thickness are about 2～5 dusts down, and middle high dielectric constant material layer thickness is 3～40 dusts, descends the Si of one deck again
3N
4Layer thickness is 3～5 dusts, bottom SiO
2Thickness 2～3 dusts.
The invention still further relates to a kind of preparation method of the high dielectric constant material grid structure based on the SOI substrate, this method comprises successively and may further comprise the steps:
1) O in the employing PEALD system
2Plasma process carries out preliminary treatment to the SOI substrate, removes the foreign gas of its surface adsorption, and generates one deck SiO
2Layer;
2) adopt ALD technology at SiO
2Deposition one deck Si on the layer
3N
4Layer;
3) adopt ALD technology at Si
3N
4Deposition one deck high dielectric constant oxide layer on the layer;
4) behind growth high dielectric constant oxide layer, feed the N source, grow the high-k layer of oxynitride;
5) sputter growing metal gate electrode.
The present invention carries out O through the SOI substrate surface to cleaning
2Cement Composite Treated by Plasma, thus one deck ultra-thin Si O formed at substrate surface
2, one deck ultra-thin Si above that then grows
3N
4, this layer Si
3N
4With impurity element and the diffusion between the SOI top layer silicon effectively isolated in the high dielectric constant layer, and stop below SiO
2The regrowth of layer in the later stage heat treatment process.Then at Si
3N
4Last deposition one deck high dielectric constant material; And high dielectric constant material carried out suitable nitrogen treatment; Make the high dielectric constant material upper strata form the oxynitrides of one deck high dielectric constant material, this layer oxynitrides will effectively stop the diffusion between metal gate electrode and the high dielectric constant material layer.
Description of drawings
Accompanying drawing 1 is the high K gate structural representation of multilayer material for this reason.Wherein, the 1st, SOI substrate, the 2nd, SiO
2Layer, the 3rd, Si
3N
4Layer, the 4th, high dielectric constant oxide layer, the 5th, high-k layer of oxynitride, the 6th, metal gate electrode
Embodiment
Embodiment 1
Please with reference to shown in the figure I, a kind of this structure of high dielectric constant material grid structure based on the SOI substrate comprises the SiO that is positioned on the SOI substrate 1
2Layer 2, be positioned at SiO
2Si on the layer
3N
4Layer 3, be positioned at Si
3N
4On high dielectric constant oxide layer 4 and be positioned at the high-k layer of oxynitride 5 on the high dielectric constant oxide layer and be positioned at the metal gate electrode 6 on the high-k layer of oxynitride.
A kind of preparation method of the high dielectric constant material grid structure based on the SOI substrate, this method may further comprise the steps:
Step 1 is cleaned and dry, and the SOI substrate of well cutting is put into the metal pollutant that substrate surface was removed in the first solution ultrasonic cleaning in 15 minutes, then uses rinsed with deionized water, and (volume ratio is: HF: H then substrate to be put into second solution of dilution
2O=1: 50) remove oxide on surface about 20 seconds.With dry nitrogen it is dried up at last.Said first solution component is that volume ratio is 2: 1: 7 NH
4OH: H
2O
2: H
2O solution.
Step 2, in the PEALD system with O
2Plasma carries out preliminary treatment to substrate, removes the foreign gas of surface adsorption, and generates 2～3 dust SiO that one deck is about
2Layer.
Wherein, PEALD (Plasma Enhanced Atomic Layer Deposition) is meant plasma enhanced atomic, its be a kind of can be with material with the monatomic form membrane method that is plated in substrate surface in layer.This technology is the common practise of this area, repeats no more at this.
Step 3 utilizes the ALD method at SiO
2The Si of deposition one deck 3～5 dusts on the layer
3N
4Layer.
Concrete way is: at first the silicon source is carried down pulse with argon gas (this carrier gas also can be a nitrogen) and is got into reaction chamber, and chemisorbed is at substrate surface, and the burst length is approximately 1.5 seconds, blows away remaining silicon source with argon gas then, and the argon gas purge time is 2.5 seconds, then NH
3Pulse gets into reaction chamber and reacts excessive N H with the silicon source of chemisorbed under the carrying of argon gas
3And the accessory substance that reaction generates is taken reaction chamber out of by the argon gas purge.ALD (Atomic Layer Deposition) is meant ald.
Step 4 utilizes the ALD method at Si
3N
4Deposition one deck 3～40 dust high dielectric constant material layers on the layer.High dielectric constant material can be hafnium oxide (HfO
2), aluminium oxide (AL
2O
3), lanthana (La
2O
3), zirconia (ZrO
3), tantalum oxide (Ta
2O
5), gadolinium oxide (Gd
2O
3) etc.
Concrete way is: at first source metal (for example Hf, AL, La, Zr, Ta, Gd or the like) is carried down pulse with argon gas and is got into reaction chamber, and chemisorbed is at substrate surface; Burst length is approximately 1.5 seconds; Blow away remaining source metal with argon gas then, the argon gas purge time is 2.5 seconds, then H
2O or O
3Pulse gets into reaction chamber and reacts excessive H with the source metal of chemisorbed under the carrying of argon gas
2O or O
3And the accessory substance that reaction generates is taken reaction chamber out of by the argon gas purge.
Step 5 utilizes the ALD method to feed the N source in the growth high dielectric constant oxide later stage, thereby grows the high-k oxynitrides of thickness 2～5 dusts.(this technology is techniques well known, repeats no more at this) high-k oxynitrides material can be nitrogen hafnium oxide (HfO
xN
y), aluminum oxynitride (AlO
xN
y), nitrogen lanthana (LaO
xN
y), nitrogen zirconia (ZrO
xN
y), nitrogen tantalum oxide (TaO
xN
y), nitrogen gadolinium oxide (GdO
xN
y) etc.
X in the step 5, the value of y is explained as follows:
For Hf (Zr) be+4 valencys, x so, y should be 1＜x＜4; 1＜y＜4; X+y≤4.
For Al (La, Gd) be+3 valencys, x so, y should be 1＜x＜3; 1＜y＜3; X+y≤3.
For Ta, be+5 valencys, x so, y should be 1＜x＜5; 1＜y＜5; X+y≤5.
Step 6 sputter growing metal gate electrode.
Embodiment 2
Also can not clean in the present embodiment or dry (omit step 1), directly the SOI substrate with well cutting adopts the processing of carrying out step 2 in the PEALD technology, adopts ALD technology to carry out the processing of step 3-5 then.Other processing steps in the present embodiment are identical with embodiment 1.
The foregoing description is just listed expressivity principle of the present invention and effect is described, but not is used to limit the present invention.Any personnel that are familiar with this technology all can make amendment to the foregoing description under spirit of the present invention and scope.Therefore, rights protection scope of the present invention should be listed like claims.
Claims (11)
Priority Applications (1)
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|---|---|---|---|
| CN201010225694A CN101950758B (en) | 2010-07-13 | 2010-07-13 | Grid structure of high-K material based on silicon-on-insulator (SOI) substrate and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1540769A (en) * | 2003-10-30 | 2004-10-27 | 上海集成电路研发中心有限公司 | A high dielectric constant material gate structure and its preparation process |
| CN101192528A (en) * | 2006-11-29 | 2008-06-04 | 联华电子股份有限公司 | Grid manufacturing method |
| CN101447420A (en) * | 2007-11-28 | 2009-06-03 | 中国科学院微电子研究所 | A method for preparing high dielectric constant gate dielectric film hafnium silicon oxynitride |
| CN101471379A (en) * | 2007-12-25 | 2009-07-01 | 恩益禧电子股份有限公司 | Semiconductor device and process for manufacturing same |
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| KR100766255B1 (en) * | 2006-11-27 | 2007-10-15 | 동부일렉트로닉스 주식회사 | Semiconductor device and manufacturing method thereof |
| KR101033222B1 (en) * | 2007-06-29 | 2011-05-06 | 주식회사 하이닉스반도체 | Method for manufacturing nonvolatile memory device having charge trap layer |
| JP2009026997A (en) * | 2007-07-20 | 2009-02-05 | Renesas Technology Corp | Semiconductor device and manufacturing method thereof |
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|---|---|---|---|---|
| CN1540769A (en) * | 2003-10-30 | 2004-10-27 | 上海集成电路研发中心有限公司 | A high dielectric constant material gate structure and its preparation process |
| CN101192528A (en) * | 2006-11-29 | 2008-06-04 | 联华电子股份有限公司 | Grid manufacturing method |
| CN101447420A (en) * | 2007-11-28 | 2009-06-03 | 中国科学院微电子研究所 | A method for preparing high dielectric constant gate dielectric film hafnium silicon oxynitride |
| CN101471379A (en) * | 2007-12-25 | 2009-07-01 | 恩益禧电子股份有限公司 | Semiconductor device and process for manufacturing same |
Non-Patent Citations (2)
| Title |
|---|
| JP特开2009-16823A 2009.01.22 |
| JP特开2009-26997A 2009.02.05 |
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