CN101976551B - Display driving circuit, liquid crystal display and display driving method - Google Patents
Display driving circuit, liquid crystal display and display driving method Download PDFInfo
- Publication number
- CN101976551B CN101976551B CN201010527269.7A CN201010527269A CN101976551B CN 101976551 B CN101976551 B CN 101976551B CN 201010527269 A CN201010527269 A CN 201010527269A CN 101976551 B CN101976551 B CN 101976551B
- Authority
- CN
- China
- Prior art keywords
- voltage
- signal
- circuit
- produce
- cache unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 33
- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims description 14
- 230000008859 change Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a display driving circuit, a liquid crystal display and a display driving method. The time schedule controller is used for providing a first starting signal, and the voltage level shifter is used for carrying out level lifting on the first starting signal so as to obtain a second starting signal. The grid driving circuit comprises a plurality of shift buffer units which are connected in series and is driven by a second starting signal and a voltage level shifter to generate a grid signal. The control unit switches the high working voltage provided by the boost converter to the voltage level shifter to a range suitable for driving the gate drive circuit by using the second starting signal and the gate signal generated by the kth shift buffer unit.
Description
Technical field
The present invention is relevant to a kind of circuit of display driving, liquid crystal display and display drive method, espespecially a kind of circuit of display driving, liquid crystal display and display drive method that solves low-temperature starting beginning problem.
Background technology
Liquid crystal display (Liquid Crystal Display, LCD) has that external form is frivolous, power saving and the advantage such as radiationless, has become one of now widely used flat-panel screens.Its principle of work applies electric field to liquid crystal layer, makes the liquid crystal molecule in liquid crystal layer change ordered state to adjust the penetration of liquid crystal layer, then coordinates light source and the colored filter that backlight module provides to carry out color display.Fig. 1 is the schematic diagram of available liquid crystal display 100.As shown in Figure 1, liquid crystal display 100 comprises display panel 110, time schedule controller (Timing Controller) 120, gate driver circuit (Gate Driver) 130, source electrode drive circuit (Source Driver) 140.Display panel 110 comprises multiple pixel cells 150, many data line D
1～D
m, and many gate lines G
1～G
n.Time schedule controller 120 provides gate driver circuit 130 and source electrode drive circuit 140 to operate required control signal; Gate driver circuit 130 can produce multiple signals according to this control signal.Gate lines G
1～G
nwith data line D
1～D
mthe data-signal respectively signal and source electrode drive circuit 140 being produced offers pixel cell 150 to show image.
In order to reduce cost of goods manifactured, gate driver circuit 130 is integrated on the display panel 110 that comprises pixel cell 150, can replace script grid-driving integrated circuit (Gate Driver IC) and save IC use amount, with minimizing signal lead number.This technology and traditional grid-driving integrated circuit framework all need shift cache unit (Shift Register) and voltage level shift unit (Level Shifter), and this voltage level shift unit is used for control signal to be originally promoted to a high voltage level with driving grid driving circuit.But in the practice, this technology utilizes TFT NMOS processing procedure to synthesize shift cache unit, and voltage level shifter circuit is incorporated in pulse width modulation integrated circuit (PWM IC), to use standard CMOS (CMOS) integrated circuit manufacture process shift cache unit and voltage quasi position shift unit to be incorporated in the practice of one chip different with traditional grid-driving integrated circuit.But due to processing procedure and light shield quantitative relation, the characteristic of TFT NMOS is poor compared with CMOS, therefore, under the condition of wishing to get same current, must set higher TFT NMOS gate-source voltage (V
gS) and make larger size of components, and gate-source voltage when assembly is closed set also must be very low.
In addition,, because processing procedure factor causes component characteristic drift, can make synthesized shift cache unit circuit out, in the time that low-temperature starting begins (Cold-Start), misoperation can occur.Fig. 2 is the circuit diagram of shift cache unit 200 in prior art, Fig. 3 A is the sequential chart of shift cache unit 200 under normal running, in the time that room temperature starts, opening beginning signal ST can first send a pulse that node CP1 is risen to a voltage quasi position that approaches ST, Cgd electric capacity via transistor M2 in the time that frequency signal CLK sends can add node CP1 to change up by the current potential originally storing via the mode of coupling (Coupling), again promote the current potential of node CP1, now transistor M2 can be unlocked, CLK signal is sent to output terminal SR_OUT, reach the signal output of the first order.But in the time of cold-starting, because the magnitude of current of transistor M2 contribution itself can reduce, that is the degree of assembly conducting a little less than, in gate-source voltage and size of components fixing in the situation that, add the electric leakage of transistor M4, can make output terminal SR_OUT current potential to draw high, cause signal output abnormality, as shown in Figure 3 B.
Be used for producing the control signal interlock circuit of driving grid driving circuit 140 as shown in Figure 4.While at room temperature startup, use two-stage charge pump (Charge Pump) circuit 410 can reach (not comprising charge pump circuit 430) the signal output of all shift cache units.But while startup at low temperatures, as mentioned above, at assembly gate-source voltage (V
gS) with the fixing condition of size under, main switch conducting completely, produces extremely signal output.At present to the solution of this problem for increasing again one-level charge pump circuit 430, by the high working voltage V of gate driver circuit 130
gHpromote again one-level, also promote one-level by gate-source voltage, main switch conduction ability is strengthened, also promoted the ability of current drives simultaneously, maintain the signal output of every one-level shift cache unit.Mainly contain following shortcoming for solving low-temperature starting beginning circuit that problem is used at present:
1. owing to having increased one-level charge pump circuit 430, increased the usable floor area of printed circuit board (PCB) (PCB) more.
2. owing to having increased one-level charge pump circuit 430, power attenuation increases more.
3. the output voltage of charge pump is fixed value, cannot freely adjust.In addition,, because component characteristic has variability, therefore the specification of required power supply can be thereupon different.If meet the power supply of gate driver circuit 130 required specifications, must increase zener diode (Zener Diode), do not set and also can increase cost elasticity except voltage.
Therefore need a kind of low-power consumption, can Flexible Design, and can solve the circuit and the driving method that gate driver circuit are integrated in to the low-temperature starting beginning problem occurring in display panel process technique.
Summary of the invention
One embodiment of the invention provide a kind of circuit of display driving, comprise time schedule controller, open beginning signal in order to produce one first; One gate driver circuit, comprises the shift cache unit of multiple serial connections, and wherein the shift cache unit of the plurality of serial connection opens beginning signal according to one second and a pre-driver signal sequentially produces multiple signals; One control module, is electrically connected on a k shift cache unit of this gate driver circuit, in order to second to open the signal that beginning signal and this k shift cache unit produce and produce an output voltage according to this; One boost converter, is electrically connected on this control module, in order to produce a high working voltage according to this output voltage; An and voltage level shift unit, be electrically connected on this time schedule controller, this boost converter and this gate driver circuit, drive this pre-driver signal of this gate driver circuit and this second to open beginning signal in order to open beginning signal according to this high working voltage and this first to produce.
Another embodiment of the present invention provides a kind of display drive method, be executed in circuit of display driving as the aforementioned, the method comprises: input one is opened beginning signal and a pre-driver signal to this gate driver circuit, makes the multiple shift cache units in this gate driver circuit sequentially produce multiple signals; Input this and open signal that beginning signal and this k shift cache unit produce to this control module; This control module opens the signal that beginning signal and this k shift cache unit produce and produces an output voltage according to this; This boost converter produces a high working voltage according to this output voltage; And this voltage level shift unit drives this pre-driver signal of this gate driver circuit with generation according to this high working voltage.
Another embodiment of the present invention provides a kind of liquid crystal display, comprises a first substrate; One second substrate; One liquid crystal layer, this liquid crystal layer is between this first substrate and this second substrate; One pel array, is formed on this first substrate; An and circuit of display driving.This circuit of display driving comprises time schedule controller, opens beginning signal in order to produce one first; One gate driver circuit, be formed on this first substrate, and be electrically connected on this pel array, this gate driver circuit comprises the shift cache unit of multiple serial connections, wherein the shift cache unit of the plurality of serial connection sequentially produces multiple signals according to a pre-driver signal; One control module, is electrically connected on a k shift cache unit of this gate driver circuit, produces an output voltage in order to open according to one second the signal that beginning signal and this k shift cache unit produce; One boost converter, is electrically connected on this control module, in order to produce a high working voltage according to this output voltage; And one voltage level shift unit be electrically connected on this time schedule controller, this boost converter and this gate driver circuit, drive this pre-driver signal of this gate driver circuit and this second to open beginning signal in order to open beginning signal according to this high working voltage and this first to produce.
Compared to prior art, the present invention proposes a kind of circuit of display driving, liquid crystal display and display drive method, solve gate driver circuit is integrated in the technology on display panel, low-temperature starting beginning (Cold-Start) problem that can occur under low-temperature starting begins.Under the consideration of low-power consumption, make every one-level shift cache unit of gate driver circuit can normally export signal to drive the pel array on display panel.
Brief description of the drawings
Fig. 1 is the schematic diagram of liquid crystal display in prior art;
Fig. 2 is the circuit diagram of shift cache unit in prior art;
Fig. 3 A is the sequential chart under shift cache unit normal running in Fig. 2;
Fig. 3 B is the sequential chart of shift cache unit generation low-temperature starting beginning when problem in Fig. 2;
Fig. 4 is the existing interlock circuit in order to driving grid driving circuit;
Fig. 5 is display and the associated driver circuitry figure thereof of the embodiment of the present invention;
Fig. 6 is the gate driver circuit figure of the embodiment of the present invention;
Fig. 7 is the circuit diagram of the operating voltage commutation circuit of the embodiment of the present invention;
Fig. 8 A is one of several unlike signal correlation timing figure of the circuit of display driving of the embodiment of the present invention;
Fig. 8 B be the circuit of display driving of the embodiment of the present invention several unlike signal correlation timing figure two.
Wherein, Reference numeral:
100,500: liquid crystal display
110: display panel
120,510: time schedule controller
130,530: gate driver circuit
140,570: source electrode drive circuit
150: pixel cell
200,531～537: shift cache unit
410,430: charge pump circuit
CP1: node
STi, ST: open beginning signal
G
1～G
n: signal
M2, M4, MN1, MP4, MP5, MP6: transistor
CKi, XCKi, CK, XCK: frequency signal
SR_OUT: output terminal
520: voltage level shift unit
540: boost converter
541: the first voltage up converting circuit
543: the second voltage up converting circuit
550: control module
551: operating voltage commutation circuit
553: bias generating circuit
555: multiplexer
560: negative charge pump circuit
580: pel array
590: infrabasal plate
5510:SR bolt lock device
5512:D D-flip flop
V
dD1, V
dD2, V
sS: voltage source
V
gH, V
gH1, V
gH2: high working voltage
V
gL: low-work voltage
Ref_SEL: voltage is selected signal
Ref_H: high reference voltage
Ref_L: low reference voltage
PX: pixel cell
Embodiment
The present invention proposes a kind of circuit of display driving, solves gate driver circuit is integrated in the technology on display panel, the low-temperature starting beginning problem that can occur under low-temperature starting begins.Under the consideration of low-power consumption, make every one-level shift cache unit of gate driver circuit can normally export signal to drive the pel array on display panel.
Fig. 5 is the structural representation of the liquid crystal display 500 of the embodiment of the present invention.As shown in Figure 5, liquid crystal display 500 comprises: upper substrate (not shown), infrabasal plate 590, circuit of display driving and pel array 580.Circuit of display driving comprises time schedule controller 510, voltage level shift unit 520, gate driver circuit 530, boost converter 540 (Boost Converter), control module 550, negative charge pump circuit 560 (Negative Charge Pump Circuit) and source electrode drive circuit 570.Liquid crystal layer is between upper substrate and infrabasal plate 590, and liquid crystal layer internal memory envelope liquid crystal molecule, and pel array 580 comprises multiple pixel cell PX, via many data lines D
1～D
mbe electrically connected on source electrode drive circuit 570, separately via many gate lines G
1～G
nbe electrically connected on gate driver circuit 530.Wherein gate driver circuit 530 can be integrated in infrabasal plate 590 with pel array 580.
Time schedule controller 510 is controlled the sequential action of whole liquid crystal display 500, the time that coordinates each picture frame to show, set sweep start and provide gate driver circuit 530 to operate the required beginning signal STi that opens, make gate driver circuit 530 produce signal and set the switch of pixel cell PX, and provide associated control signal to make it produce view data to source electrode drive circuit 570.Boost converter 540 is used for voltage source V
dD1see through and boost to obtain higher magnitude of voltage.In the present embodiment, by two voltage up converting circuit serial connections, the voltage source V that wherein the first voltage up converting circuit 541 produces
dD2to supply with source electrode drive circuit 570 and other driving circuit and proofread and correct (Gamma Correlation) circuit as coffee code and use, and the voltage source V that the first voltage up converting circuit 541 is produced
dD2inputing to the second voltage up converting circuit 543 does for the second time and boosts.Boost converter 540 is inner to be adopted switched topology framework and utilizes inductance, electric capacity, reach needed voltage quasi position output via adjusting resistance, switched topology utilizes the change in switch cycle (duty) to adjust I/O ratio, that is electric current is not always toward load end stream, but utilize switch one open-one close to discharge to reach to inductance, capacitor charging; And adopt in the prior art charge pump circuit, if reach identical voltage quasi position, just necessary many string one-level charge pumps (two diodes), each diode can have equivalent conduction impedance and forward voltage forward, therefore every many string one-levels will cause the loss in efficiency, and for load end, do not have a burning voltage function (load consumption is directly provided), therefore as wanted jointly to reach a voltage quasi position, the efficiency of boost converter 540 can be better than charge pump, and printed circuit board (PCB) usable floor area also can be saved many.Voltage level shift unit 520 is electrically connected on time schedule controller 510 and boost converter 540, and that exports according to time schedule controller 510 opens the high working voltage V that beginning signal STi and boost converter 540 provide
gHafter the voltage level displacement of driving grid driving circuit 530, open beginning signal ST and pre-driver signal (as the Vss of Fig. 5, CK, XCK) to produce.Negative charge pump circuit 560 is connected in voltage level shift unit 520, and provides voltage level shift unit 520 required low-work voltage V
gL.
Gate driver circuit 530 internal circuit blocks as shown in Figure 6.The shift cache unit 531～537 that gate driver circuit 530 comprises multiple serial connections, each shift cache unit 531～537 has a signal output terminal with output signal G
1～G
n, first order shift cache unit 531 receives and opens the signal G that beginning signal ST and rear one-level shift cache unit 533 are exported
2drive to export signal G
1, after other grade of shift cache unit 533～537 receives, the signal of shift cache unit 535～537 outputs of one-level drives, the signal G that the shift cache unit 537 that receives N level as N-1 level shift cache unit 535 is exported
n, sequentially to produce multiple signal G
1～G
ninput to the pel array 580 on display panel via many gate lines, show image.The another pre-driver signal that receives of each shift cache unit 531～537, it comprises as first frequency signal CK, second frequency signal XCK and voltage source V
sSdeng signal, wherein voltage source V
sSas each shift cache unit 531～537 output signal G
1～G
npotential reference.In the present embodiment, shift cache unit 531～537 serial connection modes pre-driver signal Vss, CK, the XCK required with it is not that the present invention also can otherwise be connected in series shift cache unit 531～537 for limiting spirit of the present invention.
Please continue to refer to Fig. 5, control module 550 is electrically connected on gate driver circuit 530, and beginning signal ST and k the signal G that shift cache unit produces are opened in reception
k, utilize received signal ST and G
kthe high working voltage V that boost converter 540 is provided
gHdynamically switch to the scope that is applicable to driving grid driving circuit 530.In the time there is cold-starting, boost converter 540 is automatically by V
gHswitch to higher high working voltage V
gH1, in the time of gate driver circuit enabling, boost converter 540 also can be automatically by V
gHswitch to lower high working voltage V
gH2, to reduce total system power attenuation.Due in the present embodiment, the signal that after each shift cache unit receives, the shift cache unit of one-level is exported drives, in the time that wherein arbitrary grade of shift cache unit cannot normally be exported signal because of cold-starting problem, all shift cache units all can break down, and therefore in preferred embodiment, control module 550 can be set as receiving the signal G that final stage shift cache unit 537 produces
n, just can detect and whether have shift cache unit 531～537 that low-temperature starting beginning problem occurs.
As shown in Figure 5, control module 550 comprises: operating voltage commutation circuit 551, the signal G producing in order to receive k level shift cache unit
kwith open beginning signal ST, the signal G that wherein k level shift cache unit produces
kcan be the signal G that final stage shift cache unit produces
n, select signal Ref_SEL to produce a voltage; Bias generating circuit (Bias voltage generation circuit) 553, in order to produce the stable reference voltage of multiple different magnitudes of voltage, comprises high reference voltage Ref_H and low reference voltage Ref_L; Multiplexer 555 (MUX), be electrically connected on operating voltage commutation circuit 551 and bias generating circuit 553, the multiple reference voltage Ref_H, the Ref_L that are produced using bias generating circuit 553 are as input, and select signal Ref_SEL to export from selecting one among multiple reference voltage Ref_H, Ref_L according to voltage, multiplexer 555 output terminals are directly electrically connected to the second voltage up converting circuit 543, by selecting different reference voltages position standard to change the high working voltage V that the second voltage up converting circuit 543 is exported
gHvoltage level.
As shown in Figure 7, its operating principle will coordinate Fig. 8 A and Fig. 8 B to explain with sequential to operating voltage commutation circuit 551 internal circuit diagrams.This circuit comprises three work phase places (phase), wherein phase place 1 (phase1) is circuit replacement and initialization, latch circuit (Latch) and interdependent node (node) are reset and initialization, as shown in Figure 8 A.In the time that each picture frame (Frame) time starts, receive and open beginning signal ST, now the signal G of final stage shift cache unit 537
nnot yet send, therefore opening beginning signal ST is high logic level, the signal G of final stage shift cache unit
nfor low logic level.The beginning signal ST that opens of high levle opens N-type transistor MN1, the replacement input end of SR bolt lock device (SR Latch) 5510 (R end) is pulled to low logic level, and input end (S end) is set and is pulled to high logic level because of phase inverter, therefore output terminal Q is high logic level, Q ' end is low logic level the input end D that is connected to D flip-flop (D flip-flop) 5512, such output can cause P transistor npn npn MP4, MP5, MP6 is the state of closing, the pulse input of simultaneously opening beginning signal ST can make a low logic level of D flip-flop output, be that voltage selection signal Ref_SEL is low logic level.
Next,, at phase place 2 (phase 2), in the time that gate driver circuit 530 completes replacement and initialization and operation and normally occurs without low-temperature starting beginning problem, MN1 remains closed condition, waits for G
nsignal is come in.Work as G
nwhen signal is exported a pulse, MP6, because of bias voltage conducting, changes the R end of SR bolt lock device 5510 into high logic level, and S end is low logic level.And the output Q of SR bolt lock device 5510 is low logic level, and Q ' is high logic level, causes all conductings of transistor MP4 and MP5.Work as G
nwhen signal transfers low logic level to by high logic level, the frequency CLK of D flip-flop 5512 is inputted in the pulse of opening beginning signal ST simultaneously, and make the voltage that the output terminal Q of D flip-flop 5512 exports select signal Ref_SEL to rise to high logic level by low logic level, make multiplexer 555 select low reference voltage REF_L to export the second voltage up converting circuit 543 to, make high working voltage V
gHautomatically by V
gH1switch to V
gH2, and continue to keep.
The function that opens beginning signal ST signal is except being to be to reset and initializing circuit, is also to select the position of signal Ref_SEL accurate for upgrading the voltage that operating voltage commutation circuit 551 exports.In the time starting to enter picture frame 3, G
nsignal is down to low logic level by high logic level, and therefore transistor MP6 closes, if low-temperature starting beginning problem occurs gate driver circuit 530, and makes the G of picture frame 3
nwhen should exporting, signal pulse but fails normally to export, cause transistor MP6 to continue to close, now open beginning signal ST and again rise to high logic level by low logic level, because the Q ' end of SR latch unit 5510 is low logic level, cause P transistor npn npn MP5 for closing, and opening the frequency that beginning signal ST can trigger D flip-flop 5512 makes the voltage of the output terminal Q output of D flip-flop 5512 select signal Ref_SEL to change to low logic level, make multiplexer 555 select high reference voltage REF_H to export the second voltage up converting circuit 543 to, make high working voltage V
gHautomatically by V
gH2switch to V
gH1.
Fig. 8 B for there is at the beginning the sequential chart of low-temperature starting beginning problem in gate driver circuit 530.Phase place 1 through oversampling circuit reset with initialization after, at picture frame 1 inner grid signal G
nsignal pulse is normally output not, circuit operation is as described at Fig. 8 A, the voltage that D flip-flop 5512 is exported is selected signal Ref_SEL change or is maintained low logic level, makes multiplexer 555 continue high reference voltage REF_H to the second voltage up converting circuit 543 of output, makes high working voltage V
gHbe maintained higher high working voltage V
gH1, in the action of the phase place 3 described in Fig. 8 A.Utilize higher high working voltage V
gH1carry out driving grid driving circuit 530, and make after gate driver circuit 530 enablings, after 2 times of picture frame in, G
nsignal normally produces, and the Q ' end that makes SR latch unit 5510 is high logic level, after the pulse of opening beginning signal ST of picture frame 3 is come in, trigger the frequency CLK of D flip-flop 5512 so that voltage selects signal Ref_SEL to switch to high logic level, make high working voltage V
gHautomatically switch to lower high working voltage V
gH2, in the action of the phase place 2 described in Fig. 8 A.
Circuit described in the present embodiment, adopts the high boost converter of conversion efficiency to replace the charge pump circuit that conversion efficiency is low, can significantly reduce circuit overall power dissipation.In the time that each picture frame opens the beginning, seeing through feedback testing mechanism and dynamic gate high working voltage switches, can detect in last picture frame and whether normally not export because the initial problem of low temperature causes signal, and switch to higher grid high working voltage to repair this gate driver circuit, and can coordinate transistor component characteristic difference elasticity to adjust needed high working voltage V
gH1, V
gH2.
The foregoing is only preferred embodiment of the present invention, all equalizations of making according to the present patent application scope of patent protection change and amendment, all should belong to covering scope of the present invention.
Claims (18)
1. a circuit of display driving, is characterized in that, comprising:
Time schedule controller, opens beginning signal in order to produce one first;
One gate driver circuit, comprises the shift cache unit of multiple serial connections, and wherein the shift cache unit of the plurality of serial connection opens beginning signal according to one second and a pre-driver signal sequentially produces multiple signals;
One control module, is electrically connected on a k shift cache unit of this gate driver circuit, in order to second to open the signal that beginning signal and this k shift cache unit produce and produce an output voltage according to this;
One boost converter, is electrically connected on this control module, in order to produce a high working voltage according to this output voltage; And
One voltage level shift unit, be electrically connected on this time schedule controller, this boost converter and this gate driver circuit, drive this pre-driver signal of this gate driver circuit and this second to open beginning signal in order to open beginning signal according to this high working voltage and this first to produce.
2. circuit of display driving as claimed in claim 1, is characterized in that, this control module comprises:
One reference voltage generator, in order to produce the reference voltage of multiple different magnitudes of voltage;
One operating voltage commutation circuit, is electrically connected on this voltage level shift unit and this k shift cache unit, in order to second to open signal that beginning signal and this k shift cache unit produce and produce a voltage and select signal according to this; And
One multiplexer, is electrically connected on this operating voltage commutation circuit and this reference voltage generator, selects one of reference voltage of the plurality of different magnitudes of voltage of signal deciding output as this output voltage in order to the voltage producing according to this operating voltage commutation circuit.
3. circuit of display driving as claimed in claim 2, is characterized in that, this operating voltage commutation circuit comprises:
One latch circuit, is electrically connected on this voltage level shift unit and this k shift cache unit, in order to second to open the signal that beginning signal and this k shift cache unit produce and produce a data-signal according to this; And
One data output circuit, is electrically connected on this voltage level shift unit, this latch circuit and this multiplexer, in order to second to open beginning signal and this data-signal and produce this voltage and select signal according to this.
4. circuit of display driving as claimed in claim 1, is characterized in that, the most end shift cache unit that this k shift cache unit is this gate driver circuit.
5. circuit of display driving as claimed in claim 1, is characterized in that, this boost converter comprises:
One first voltage up converting circuit, in order to promote a power supply signal to produce a boost signal; And
One second voltage up converting circuit, is electrically connected on this first voltage up converting circuit and this control module, in order to produce this high working voltage according to this output voltage and this boost signal.
6. circuit of display driving as claimed in claim 1, is characterized in that, separately comprises a charge pump circuit, is electrically connected on this voltage level shift unit, in order to this voltage level shift unit is inputted to a low-work voltage.
7. a display drive method, is executed in circuit of display driving as claimed in claim 1, it is characterized in that, the method comprises:
Input one is opened beginning signal and a pre-driver signal to this gate driver circuit, makes the multiple shift cache units in this gate driver circuit sequentially produce multiple signals;
Input this and open signal that beginning signal and this k shift cache unit produce to this control module;
This control module opens the signal that beginning signal and this k shift cache unit produce and produces an output voltage according to this;
This boost converter produces a high working voltage according to this output voltage; And
This voltage level shift unit drives this pre-driver signal of this gate driver circuit with generation according to this high working voltage.
8. method as claimed in claim 7, is characterized in that, this control module opens signal that beginning signal and this k shift cache unit produce and produces this output voltage and comprise according to this:
Produce the reference voltage of multiple different magnitudes of voltage;
Open signal that beginning signal and this k shift cache unit produce and produce a voltage and select signal according to this; And
Be this output voltage according to one of the reference voltage of the plurality of different magnitudes of voltage of this voltage selection signal deciding output.
9. method as claimed in claim 8, is characterized in that, opens signal that beginning signal and this k shift cache unit produce and produces this voltage and select signal to comprise according to this:
Open signal that beginning signal and this k shift cache unit produce to produce a data-signal according to this; And
Open beginning signal and this data-signal and export this voltage and select signal according to this.
10. method as claimed in claim 7, is characterized in that, the most end shift cache unit that this k shift cache unit is this gate driver circuit.
11. methods as claimed in claim 7, is characterized in that, this boost converter produces this high working voltage according to this output voltage and comprises:
One power supply signal is provided;
Produce a boost signal according to this power supply signal; And
Produce this high working voltage according to this output voltage and this boost signal.
12. methods as claimed in claim 7, is characterized in that, separately comprise that input one low-work voltage is to this voltage level shift unit.
13. 1 kinds of liquid crystal display, is characterized in that, comprise:
One first substrate;
One second substrate;
One liquid crystal layer, this liquid crystal layer is between this first substrate and this second substrate;
One pel array, is formed on this first substrate; And
One circuit of display driving, comprising:
Time schedule controller, opens beginning signal in order to produce one first;
One gate driver circuit, be formed on this first substrate, and be electrically connected on this pel array, this gate driver circuit comprises the shift cache unit of multiple serial connections, wherein the shift cache unit of the plurality of serial connection sequentially produces multiple signals according to a pre-driver signal;
One control module, is electrically connected on a k shift cache unit of this gate driver circuit, produces an output voltage in order to open according to one second the signal that beginning signal and this k shift cache unit produce;
One boost converter, is electrically connected on this control module, in order to produce a high working voltage according to this output voltage; And
One voltage level shift unit, be electrically connected on this time schedule controller, this boost converter and this gate driver circuit, drive this pre-driver signal of this gate driver circuit and this second to open beginning signal in order to open beginning signal according to this high working voltage and this first to produce.
14. liquid crystal display as claimed in claim 13, is characterized in that, this control module comprises:
One reference voltage generator, in order to produce the reference voltage of multiple different magnitudes of voltage;
One operating voltage commutation circuit, is electrically connected on this voltage level shift unit and this k shift cache unit, in order to second to open the signal that begins to produce with this k shift cache unit and produce a voltage selection signal according to this; And
One multiplexer, is electrically connected on this operating voltage commutation circuit and this reference voltage generator, and one of reference voltage of selecting the plurality of different magnitudes of voltage of signal deciding output in order to the voltage producing according to this operating voltage commutation circuit is output voltage.
15. liquid crystal display as claimed in claim 14, is characterized in that, this operating voltage commutation circuit comprises:
One latch circuit, is electrically connected on this voltage level shift unit and this k shift cache unit, in order to second to open the signal that beginning signal and this k shift cache unit produce and produce a data-signal according to this; And
One data output circuit, is electrically connected on this voltage level shift unit, this latch circuit and this multiplexer, in order to second to open beginning signal and this data-signal and produce this voltage and select signal according to this.
16. liquid crystal display as claimed in claim 13, is characterized in that, the most end shift cache unit that this k shift cache unit is this gate driver circuit.
17. liquid crystal display as claimed in claim 13, is characterized in that, this boost converter comprises:
One first voltage up converting circuit, in order to promote a power supply signal to produce a boost signal; And
One second voltage up converting circuit, is electrically connected on this first voltage up converting circuit and this control module, in order to produce this high working voltage according to this output voltage and this boost signal.
18. liquid crystal display as claimed in claim 13, is characterized in that, this circuit of display driving separately comprises a charge pump, are electrically connected on this voltage level shift unit, in order to this voltage level shift unit is inputted to a low-work voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010527269.7A CN101976551B (en) | 2010-10-19 | 2010-10-19 | Display driving circuit, liquid crystal display and display driving method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010527269.7A CN101976551B (en) | 2010-10-19 | 2010-10-19 | Display driving circuit, liquid crystal display and display driving method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101976551A CN101976551A (en) | 2011-02-16 |
| CN101976551B true CN101976551B (en) | 2014-06-04 |
Family
ID=43576432
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010527269.7A Active CN101976551B (en) | 2010-10-19 | 2010-10-19 | Display driving circuit, liquid crystal display and display driving method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101976551B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102629457B (en) * | 2011-09-26 | 2014-12-17 | 北京京东方光电科技有限公司 | Driving module of liquid crystal display |
| CN104104066B (en) * | 2013-04-15 | 2017-02-08 | 海洋王（东莞）照明科技有限公司 | Voltage stabilization control circuit for battery reverse connection protection |
| CN105096863B (en) * | 2015-08-05 | 2018-04-10 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display device and its gate driving circuit |
| CN105206225B (en) * | 2015-10-12 | 2017-09-01 | 深圳市华星光电技术有限公司 | OLED gate driver circuitry topologies |
| TWI660219B (en) * | 2016-10-14 | 2019-05-21 | 友達光電股份有限公司 | Anti-glimpse display apparatus |
| CN107240373B (en) * | 2017-08-02 | 2020-12-04 | 京东方科技集团股份有限公司 | Drive signal generation circuit, display device |
| TWI788578B (en) * | 2018-06-25 | 2023-01-01 | 矽創電子股份有限公司 | Driving method and circuit using the same |
| TWI675273B (en) * | 2019-03-28 | 2019-10-21 | 友達光電股份有限公司 | Voltage boosting circuit, output buffer circuit and display panel |
| TWI779277B (en) * | 2019-04-15 | 2022-10-01 | 矽創電子股份有限公司 | Level shifter |
| CN112994436B (en) | 2021-02-04 | 2022-06-03 | 重庆先进光电显示技术研究院 | Grid opening voltage generation circuit, display panel driving device and display device |
| CN114187875A (en) * | 2021-11-25 | 2022-03-15 | 绵阳惠科光电科技有限公司 | Voltage adjusting circuit and method and display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101534051A (en) * | 2009-04-09 | 2009-09-16 | 福州华映视讯有限公司 | A supply unit capable of fast switching output voltage |
| CN101598859A (en) * | 2009-05-31 | 2009-12-09 | 上海广电光电子有限公司 | GIP type liquid crystal indicator |
| CN101707054A (en) * | 2009-12-02 | 2010-05-12 | 友达光电股份有限公司 | Liquid crystal display device and driving method thereof |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101294321B1 (en) * | 2006-11-28 | 2013-08-08 | 삼성디스플레이 주식회사 | Liquid crystal display |
| KR101624501B1 (en) * | 2007-10-17 | 2016-06-08 | 삼성디스플레이 주식회사 | Gate off voltage generating circuit, Driving device and Liquid crystal display comprising the same |
| CN101303896B (en) * | 2008-06-17 | 2010-07-28 | 友达光电股份有限公司 | Shift register and shift register unit to reduce frequency coupling effect |
-
2010
- 2010-10-19 CN CN201010527269.7A patent/CN101976551B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101534051A (en) * | 2009-04-09 | 2009-09-16 | 福州华映视讯有限公司 | A supply unit capable of fast switching output voltage |
| CN101598859A (en) * | 2009-05-31 | 2009-12-09 | 上海广电光电子有限公司 | GIP type liquid crystal indicator |
| CN101707054A (en) * | 2009-12-02 | 2010-05-12 | 友达光电股份有限公司 | Liquid crystal display device and driving method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101976551A (en) | 2011-02-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101976551B (en) | Display driving circuit, liquid crystal display and display driving method | |
| TWI410921B (en) | Display driving circuit and display driving method | |
| US11127478B2 (en) | Shift register unit and driving method thereof, gate driving circuit, and display device | |
| CN104183219B (en) | Scanning drive circuit and organic light-emitting displayer | |
| US10345940B2 (en) | Scanning circuit, drive circuit and touch display device | |
| US10431160B2 (en) | Organic light emitting diode panel, gate driver circuit and unit thereof | |
| US8456455B2 (en) | Display driving device and display apparatus | |
| CN104464618B (en) | AMOLED drive device and drive method | |
| CN103325335B (en) | Display and driving method thereof | |
| CN103137207A (en) | Shift temporary storage device | |
| CN105390116A (en) | Gate drive circuit | |
| CN107564473A (en) | Shift register, gate driving circuit, display and correlation technique | |
| CN113906489B (en) | Pixel structure, driving method thereof and display device | |
| CN113611248B (en) | Display panel, driving method of switch circuit thereof, and display device | |
| WO2022166467A1 (en) | Gate turn-on voltage generation circuit, display panel drive apparatus and display apparatus | |
| CN117012125A (en) | Shifting register, grid driving circuit, display panel and electronic equipment | |
| JP2020521177A (en) | Scan drive circuit, scan driver, and display device | |
| CN114495807A (en) | Driving system, electronic board, display screen and electronic equipment | |
| CN216084272U (en) | TCON module and Tconless screen equipment | |
| CN109616060B (en) | Low-power consumption circuit | |
| TWI451383B (en) | Flat panel display, shift register and method of controlling the shift register | |
| CN111710302B (en) | Shifting register unit and driving method thereof, grid driving circuit and display device | |
| EP4390903A1 (en) | Driving circuit of display panel and driving device | |
| CN112735503B (en) | Shifting register, display panel, driving method and display device | |
| US8482551B2 (en) | Display system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20240914 Address after: Gyeonggi Do, South Korea Patentee after: SAMSUNG DISPLAY Co.,Ltd. Country or region after: Republic of Korea Address before: China Taiwan Patentee before: AU OPTRONICS Corp. Country or region before: TaiWan, China |
|
| TR01 | Transfer of patent right |