CN102003994B

CN102003994B - Sensing device and electronic equipment

Info

Publication number: CN102003994B
Application number: CN200910170077.2A
Authority: CN
Inventors: 薛富元
Original assignee: Innolux Display Corp
Current assignee: Chi Mei Optoelectronics Corp
Priority date: 2009-09-02
Filing date: 2009-09-02
Publication date: 2014-05-28
Anticipated expiration: 2029-09-02
Also published as: CN102003994A

Abstract

Sensing device and electronic equipment. The sensing device is used for sensing light and generating a sensing output signal representing the intensity of the light. The sensing device comprises a photosensitive element, a comparison circuit and a logic circuit. The photosensitive element senses the light to generate a current signal at the first node. The comparison circuit is coupled to the first node and receives the current signal. The comparison circuit comprises a filter for filtering out high-frequency components in the current signal, and the comparison circuit generates a result signal according to the filtered current signal. The logic circuit receives the result signal and performs logic operation on the result signal to generate a sensing output signal.

Description

Sensing apparatus and electronic equipment

Technical field

The present invention relates to a kind of sensing apparatus, particularly a kind of light sensing apparatus, it has preferably signal noise ratio.

Background technology

Recently, low power consumption becomes the target that electronic equipment (especially mobile electronic device) is pursued.For example, having in the electronic equipment of Presentation Function (portable telephone or portable computer), conventionally dispose light sensing apparatus.Control the brightness of its display panel by sensitive context brightness and generation control signal, make display panel not need to show that higher brightness is to reduce power consumption always.But in darker environment, the photocurrent that in light sensing apparatus, photo-sensitive cell produces is less, make noise that panel driving causes for the impact of this photocurrent for relatively serious.Therefore control signal is also subject to these noises affects, and causes the signal noise ratio of light sensing apparatus to reduce and light sensing apparatus cannot be controlled the brightness of display panel effectively.

Therefore, expect to provide a kind of light sensing apparatus, its energy filter away high frequency noise is to promote signal noise ratio.

Summary of the invention

The invention provides a kind of sensing apparatus, represent the sensing output signal of the intensity of light in order to light sensing and generation.Sensing apparatus comprises photo-sensitive cell, comparator circuit and logical circuit.Photosensitive elements sense light, with at first node generation current signal.Comparator circuit couples first node and received current signal.Comparator circuit comprises wave filter, and in order to the radio-frequency component in filtering current signal, and comparator circuit is according to the filtered current signal signal that bears results.Logical circuit is reception result signal, and consequential signal is carried out to logical operation to produce sensing output signal.

In certain embodiments, the cutoff frequency of this wave filter is less than 20kHz.

The present invention also provides a kind of sensing apparatus, represents the sensing output signal of the intensity of light in order to light sensing and generation.Sensing apparatus comprises photo-sensitive cell, comparator circuit and logical circuit.Photosensitive elements sense light, with at first node generation current signal.Comparator circuit couples first node, and according to the current signal signal that bears results.This comparator circuit has low gain.Logical circuit is reception result signal, and consequential signal is carried out to logical operation to produce sensing output signal.

In certain embodiments, the gain of this comparer is less than 10.

Accompanying drawing explanation

Fig. 1 represents the sensing apparatus according to the embodiment of the present invention;

The signal timing diagram of the sensing apparatus 1 of Fig. 2 presentation graphs 1;

Fig. 3 represents the phase inverter according to the embodiment of the present invention;

Fig. 4 represents the comparer according to the embodiment of the present invention; And

Fig. 5 represents the electronic equipment according to the embodiment of the present invention.

[main element symbol description]

Fig. 1:

1～sensing apparatus; 10～photo-sensitive cell;

11～comparator circuit; 12～logical circuit;

110～phase inverter; 111～Resetting Switching;

112～low-pass filter; 113～Sheffer stroke gate;

114～comparer; 120,121～phase inverter;

122～SR-latch; 123～with door;

Cr～replacement capacitor; Cf～feedback condenser;

Iphoto～current signal;

N10, N11, N12, N13～node;

VN10, VN12, VN13～voltage signal;

V114～compare result signal;

BV114～anti-phase compare result signal;

VBQ～anti-phase latch output signal;

VQ～latch output signal; Vout～sensing output signal;

Vreset～reset signal; VDD, VSS～voltage source;

The replacement input end of R～SR-latch;

The set input of S～SR-latch;

The output terminal of Q, BQ～SR-latch.

Fig. 2:

During Ps～setting; Pd～during sensing.

Fig. 3:

30-32～PMOS transistor; 33-34～nmos pass transistor;

IN30～input end; OUT30～output terminal.

Fig. 4:

40-42～PMOS transistor; 43-45～nmos pass transistor;

IN40～input end; OUT40～output terminal;

N40, N41～node.

Fig. 5:

5～electronic equipment; 50～panel.

Embodiment

For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and coordinate accompanying drawing, be described in detail below.

Fig. 1 represents the sensing apparatus according to the embodiment of the present invention.Consult Fig. 1, sensing apparatus 1 is in order to light sensing, and produces sensing output signal Vout according to the intensity of light.Sensing apparatus 1 comprises photo-sensitive cell 10, comparator circuit 11, logical circuit 12, replacement capacitor Cr and feedback condenser Cf.In this embodiment, photo-sensitive cell 10 is realized with photodiode (photodiode), and its negative electrode couples voltage source V DD, and its anode couples node N10.The first end of replacement capacitor Cr receives reset signal Vreset, and its second end couples node N10.Feedback condenser Cf is coupled between logical circuit 12 and node N10.

Consult Fig. 1, comparator circuit 11 comprises phase inverter 110, Resetting Switching 111, low-pass filter 112, Sheffer stroke gate 113 and comparer 114.The input end of phase inverter 110 couples node N10, and its output terminal couples node N11.Resetting Switching 111 is coupled between node N10 and N11.The input end of low-pass filter 112 couples node N11, and its output terminal couples node N12.One input end of Sheffer stroke gate 113 couples node N12, its another input end receives reset signal Vreset and its output terminal couples node N13.The input end of comparer 114 couples node N13, and its output terminal signal V114 that bears results.

Logical circuit 12 comprise phase inverter 120 and 121, SR-latch 122 and with door 123.The input end of phase inverter 120 couples the output terminal of comparer 114 with reception result signal V114, and the output terminal of phase inverter 120 produces anti-phase consequential signal BV114.The replacement input end R of SR-latch 122 couples the output terminal of phase inverter 120 to receive anti-phase consequential signal BV114, and its set input S receives reset signal Vreset.The output terminal Q of SR-latch 122 produces latch output signal VQ, and its output terminal BQ produces anti-phase latch output signal VBQ.The output terminal that couples phase inverter 120 with an input end of door 123 couples SR-latch 122 output terminal BQ to receive anti-phase consequential signal BV114, its another input end produces sensing output signal Vout to receive anti-phase latch output signal VBQ and its output terminal.

The signal timing diagram of the sensing apparatus 1 of Fig. 2 presentation graphs 1.Consult Fig. 1 and Fig. 2, sensing apparatus 1, before entering during sensing Pd, can be introduced into and set period P s.Setting period P s, reset signal Vreset is enabled, and becomes high logic level from low logic level.Resetting Switching 111 is according to the reset signal Vreset of high logic level and not conducting.In addition, replacement capacitor C r charges according to reset signal Vreset, and the level of the voltage signal VN10 of node N10 is improved.Due to the positive light sensing of photo-sensitive cell 10 and generation current Iphoto, make to reduce gradually at the level of setting voltage signal VN10 in period P s.Voltage signal VN10 via the performed operated in anti-phase of phase inverter 110 after, input to low-pass filter 112.Low-pass filter 112 carries out High frequency filter to the inversion signal of voltage signal VN10, to produce the voltage signal VN12 of low logic level on node N12.Sheffer stroke gate 113 receives the voltage signal VN12 of low logic level and the reset signal Vreset of high logic level.Sheffer stroke gate 113 is carried out logical operation to voltage signal VN12 and reset signal Vreset, and produces the voltage signal VN13 of high logic level in node N13.Comparer 114 receiver voltage signal VN13, and by voltage signal VN13 and a threshold value comparison, with the signal V114 that bears results.Consult Fig. 2, setting period P s, the level of voltage signal VN13, higher than threshold value, makes consequential signal V114 in low logic level.Consequential signal V114 then provides to the input end of the interior phase inverter 120 of logical circuit 12.After the operated in anti-phase of the consequential signal V114 of low logic level via phase inverter 120, produced the anti-phase consequential signal BV114 of high logic level by the output terminal of phase inverter 120.Now, the anti-phase consequential signal BV114 of high logic level is sent to the replacement input end R of SR-latch 122.The set input S of SR-latch 122 receives reset signal Vreset.SR-latch 122 produces the latch output signal VQ of high logic level in output terminal Q according to the reset signal Vreset of the anti-phase consequential signal BV114 of high logic level and high logic level, and produce the anti-phase latch output signal VBQ of low logic level in output terminal BQ.Receive the anti-phase consequential signal BV114 of high logic level with an input end of door 123, and its another input end receives the anti-phase latch output signal VBQ of low logic level.Therefore produce the sensing output signal Vout of low logic level with door 123.

In the process reducing gradually at the level of voltage signal VN10, voltage signal VN12 and VN13 also can be along with changes.Consult Fig. 2, when the level of voltage signal VN10 is during lower than a specific voltage, comparer 114 compares voltage signal VN13 lower than threshold value, and consequential signal V114 becomes high logic level.In this embodiment, this specific voltage value is 2.28V.After the operated in anti-phase of the consequential signal V114 of high logic level via phase inverter 120, produced the anti-phase consequential signal BV114 of low logic level by the output terminal of phase inverter 120.Now, the anti-phase consequential signal BV114 of low logic level is sent to the replacement input end R of SR-latch 122.SR-latch 122 produces the latch output signal VQ of low logic level in output terminal Q according to the reset signal Vreset of the anti-phase consequential signal BV114 of low logic level and high logic level, and produce the anti-phase latch output signal VBQ of high logic level in output terminal BQ.Receive the anti-phase consequential signal BV114 of low volume of level and the anti-phase latch output signal VBQ of high logic level with door 123.Therefore, maintain the sensing output signal Vout of output low logic level with door 123.

Now, the signal that transmits high level via the operated in anti-phase of phase inverter 121 due to the latch output signal VQ of low logic level is to feedback condenser Cf, and therefore feedback condenser Cf charging, improves again the level of the voltage signal VN10 of node N10 once again.Afterwards, photo-sensitive cell 10 still continues light sensing with generation current Iphoto, and the level of voltage signal VN10 is also reduced gradually.The inversion signal of the voltage signal VN10 that low-pass filter 112 produces phase inverter 110 carries out High frequency filter, to produce the voltage signal VN12 of low logic level on node N12.The voltage signal VN12 of Sheffer stroke gate 113 to low logic level and the reset signal Vreset of high logic level carry out logical operation, make voltage signal VN13 get back to once again high logic level.Because voltage signal VN13 is higher than threshold value, therefore, comparer 114 via comparative voltage signal VN13 and threshold value after, the consequential signal V114 of its generation becomes low logic level from high logic level.The anti-phase consequential signal BV114 that phase inverter 120 produces becomes high logic level from low logic level.Now, SR-latch 122 continues to produce the latch output signal VQ of low logic level in output terminal Q according to the reset signal Vreset of the anti-phase consequential signal BV114 of high logic level and high logic level, and continue to produce the anti-phase latch output signal VBQ of high logic level in output terminal BQ.Therefore,, according to the anti-phase latch output signal VBQ of the anti-phase consequential signal BV114 of high logic level and high logic level, the sensing output signal Vout producing with door 123 is converted to high logic level by low logic level.

Because the level of voltage signal VN10 reduces gradually, when voltage signal VN13 is during lower than threshold value, the consequential signal V114 that comparer 114 produces becomes high logic level from low logic level.Therefore, anti-phase consequential signal BV114 becomes low logic level from high logic level.Now, the anti-phase consequential signal BV114 of low logic level is sent to the replacement input end R of SR-latch 122.SR-latch 122 continues to produce the latch output signal VQ of low logic level in output terminal Q according to the reset signal Vreset of the anti-phase consequential signal BV114 of low logic level and high logic level, and continue to produce the anti-phase latch output signal VBQ of high logic level in output terminal BQ.Receive the anti-phase consequential signal BV114 of low volume of level and the anti-phase latch output signal VBQ of high logic level with door 123.Therefore the sensing output signal Vout, producing with door 123 becomes low logic level from high logic level.During being maintained at high logic level, sensing output signal Vout is called during sensing Pd.

According to above-mentioned, in comparator circuit 11, owing to disposing low-pass filter 112 before comparer 114, therefore can filtering be present in the radio-frequency component/noise in current signal Iphoto, make comparer 114 can correctly compare operation, and follow-up logical circuit 12 also correctly actuating logic operate to produce sensing output signal Vout.In this embodiment, the cutoff frequency of low-pass filter 112 is less than 20kHz.

In addition, in this embodiment, the gain of comparator circuit 11 (being the equivalent gain summation of phase inverter 110 and comparer 114) is lower, for example, be less than 10.Therefore,, even if current signal Iphoto has radio-frequency component/noise, because the gain of comparator circuit 11 is lower, making sensing output signal Vout can seriously not be subject to radio-frequency component/noise affects.

Moreover in this embodiment, replacement capacitor Cr and feedback condenser Cf have larger capacitance, its capacitance scope is 50fF to 500fF.Therefore reduce the impact on current signal Iphoto of high-frequency signal or noise.

Fig. 3 represents the phase inverter 110 according to the embodiment of the present invention.Consult Fig. 3, phase inverter 110 comprises PMOS transistor 30-32 and nmos pass transistor 33-34.The input end IN30 receiver voltage signal VN10 of phase inverter 110, and its output terminal OUT30 produces the inversion signal of voltage signal VN10.PMOS transistor 30 and 31 is series between voltage source V DD and output terminal OUT30.The grid of PMOS transistor 30 and 31 is by input end IN30 receiver voltage signal VN10.Nmos pass transistor 33 and 34 is series between output terminal OUT30 and voltage source V SS.The grid of nmos pass transistor 30 and 31 is by input end IN30 receiver voltage signal VN10.PMOS transistor 32 is coupled between input end IN30 and output terminal OUT30, and its grid receives reset signal Vreset.

Fig. 4 represents the comparer 114 according to the embodiment of the present invention.Consult Fig. 4, comparer 114 comprises PMOS transistor 40-42 and nmos pass transistor 43-45.The input end IN40 receiver voltage signal VN13 of comparer 114, and its output terminal OUT40 signal V114 that bears

results.PMOS transistor

40 and 41 is series between voltage source V DD and output terminal OUT40.The grid of

PMOS transistor

40 and 41 is by input end IN40 receiver voltage signal VN13.

Nmos pass transistor

43 and 44 is series between output terminal OUT40 and voltage source V SS.The grid of

nmos pass transistor

43 and 44 is by input end IN40 receiver voltage signal VN13.PMOS transistor 42 is coupled between voltage source V SS and the common tie point N40 of

transistor

40 and 41, and its grid reception result signal V114.Nmos pass transistor 45 is coupled between voltage source V DD and the common tie point N41 of

transistor

43 and 44, and its grid receives compare result signal V114.The phase inverter of the 3rd and 4 figure and comparer are only as the example of demonstration, are not limited to this.

Fig. 5 represents the electronic equipment according to the embodiment of the present invention.Consult Fig. 5, electronic equipment 5 comprises the sensing apparatus 1 and panel 50 of Fig. 1.Sensing apparatus 1 sensitive context brightness and generation sensing output signal Vout are with the brightness of control panel 50.50 of panels show corresponding image with the brightness being determined according to sensing output signal Vout.In this embodiment, electronic equipment 5 can be personal digital assistant (PDA), mobile phone (cellular phone), digital camera, TV, GPS (GPS), vehicle display, display, digital frame (digital photo frame), mobile computer or desktop PC for aviation.

Though the present invention with preferred embodiment openly as above; so it is not in order to limit scope of the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the appended claims person of defining.

Claims

1. A sensing device for sensing a light and generating a sensing output signal representing the intensity of the light, comprising:

a photosensitive element for sensing the light to generate a current signal at a first node;

A comparison circuit, coupled to the first node and receiving the current signal, wherein the comparison circuit includes a filter for filtering out high-frequency components in the current signal, and the comparison circuit according to the filtered current signal to generate a result signal;

a logic circuit, used to receive the result signal, and perform logic operation on the result signal to generate the sensing output signal;

A reset capacitor having a first end receiving a reset signal and a second end coupled to the first node, wherein when the sensing device senses the light, the reset signal is enabled; as well as

A feedback capacitor is coupled between the logic circuit and the first node.

2. The sensing device as claimed in claim 1, wherein a gain of the comparison circuit is less than 10.

3. The sensing device of claim 1, wherein the cutoff frequency of the filter is less than 20 kHz.

4. The sensing device as claimed in claim 1, wherein the reset capacitor and the feedback capacitor have a capacitance ranging from 50 fF to 500 fF.

5. The sensing device as claimed in claim 1, wherein the filter has an input terminal coupled to a second node and an output terminal coupled to a third node, and the comparison circuit further comprises:

an inverter having an input terminal coupled to the first node and an output terminal coupled to the second node;

a reset switch, coupled between the first node and the second node, wherein, when the sensing device senses the light, the reset switch is activated according to the reset signal conduction;

a NAND gate having a first input terminal coupled to the third node, a second input terminal receiving the reset signal, and an output terminal coupled to a fourth node; and

A comparator has an input terminal coupled to the fourth node and an output terminal generating the result signal.

6. The sensing device as claimed in claim 5, wherein the sum of equivalent gains of the inverter and the comparator is less than 10.

7. The sensing device of claim 1, wherein the logic circuit comprises:

a first inverter having an input end receiving the result signal and an output end generating an inverted result signal;

An SR-latch having a reset input receiving the inverted result signal, a set input receiving the reset signal, a first output generating a latch output signal, and generating an inverted latch a second output terminal for outputting a signal;

an AND gate, having a first input terminal receiving the inverted result signal, a second input terminal receiving the inverted latch output signal, and an output terminal generating the sensing output signal; and

A second inverter has an input terminal receiving the latch output signal and an output terminal coupled to the feedback capacitor.

8. A sensing device for sensing a light and generating a sensing output signal representing the intensity of the light, comprising:

a comparison circuit, coupled to the first node, for generating a result signal according to the current signal, wherein the comparison circuit has a low gain;

A feedback capacitor is coupled between the logic circuit and the first node.

9. The sensing device as claimed in claim 8, wherein the gain of the comparison circuit is less than 10.

10. The sensing device as claimed in claim 8, wherein the comparison circuit comprises a filter for filtering out high frequency components in the current signal.

11. The sensing device of claim 10, wherein the cut-off frequency of the filter is less than 20 kHz.

12. The sensing device as claimed in claim 8, wherein the reset capacitor and the feedback capacitor have a capacitance ranging from 50 fF to 500 fF.

13. The sensing device as claimed in claim 8, wherein the comparison circuit comprises:

an inverter having an input terminal coupled to the first node and an output terminal coupled to a second node;

a reset switch, coupled between the first node and the second node, wherein, when the sensing device senses the light, the reset switch is activated according to the reset signal. conduction;

a low-pass filter having an input coupled to the second node and an output coupled to a third node;

14. The sensing device as claimed in claim 13, wherein the sum of equivalent gains of the inverter and the comparator is less than 10.

15. The sensing device as claimed in claim 13, wherein the cut-off frequency of the low-pass filter is less than 20 kHz.

16. The sensing device of claim 8, wherein the logic circuit comprises:

an AND gate, having a first input terminal receiving the inverted result signal, a second input terminal receiving the inverted latch output signal, and generating the sensing output signal; and

17. An electronic device comprising:

a panel for displaying a corresponding image according to a sensing output signal; and

A sensing device as claimed in claim 1, used for sensing ambient brightness and generating the sensing output signal to control the brightness of the panel.

18. The electronic device of claim 17, wherein the electronic device is a personal digital assistant, a mobile phone, a digital camera, a television, a global positioning system, a vehicle display, an aviation display, a digital photo frame, a notebook computer or a desktop computer.