CN102147823A

CN102147823A - Quick identification method for testability of PCB

Info

Publication number: CN102147823A
Application number: CN2011100301575A
Authority: CN
Inventors: 于治楼; 杜光芹; 翟西斌
Original assignee: Inspur Electronic Information Industry Co Ltd
Current assignee: IEIT Systems Co Ltd
Priority date: 2011-01-27
Filing date: 2011-01-27
Publication date: 2011-08-10

Abstract

The invention discloses a quick identification method for testability of a printed circuit board (PCB), and belongs to the technical field of electronic design automation (EDA). Testability attributes are increased for NET attributes on the PCB, the testability attribute of each NET can be exported, the testability of the NET is analyzed through a plug-in testability analysis control, and analysis reports and suggestions are generated. The method comprises the following steps of: analyzing the testability of the NET by the testability analysis control, calculating total NETs and measurable NETs, and obtaining a total test coverage rate; classifying the NETs according to the signals of power supply class, memory class, bus class and clock class, and obtaining the test coverage rate of wires; generating testability analysis tables, analysis reports and suggestions; exporting the testability analysis tables and the analysis reports of the NETs; and exporting the testability analysis tables and the analysis reports of the NETs. The method realizes more scientific and accurate analysis of the testability of information communication technology (ICT) needle bed signals, is favorable for improving the welding quality of the PCB, and further improves the design efficiency of the PCB.

Description

The quick identification method of a kind of PCB measurability

Technical field

The present invention relates to a kind of EDA technical field, the quick identification method of specifically a kind of PCB measurability.

Background technology

The EDA technology is an instrument with the computing machine exactly, the deviser is on the eda software platform, HDL finishes design document with hardware description language, then by computing machine completion logic compiling automatically, abbreviation, cut apart, comprehensively, optimization, layout, wiring and emulation, until work such as adaptive compiling, logical mappings and program downloads for the specific objective chip.The appearance of EDA technology has greatly improved the efficient and the operability of circuit design, has alleviated deviser's labour intensity.

Eda tool software can be broadly divided into three classes such as chip design assistant software, programmable chip Autocad, system design assistant software.By major function or main application scenario, be divided into circuit design and emulation tool, PCB design software, IC design software, PLD design tool and other eda software.

PCB (printed circuit board) design is to be basis with circuit theory diagrams, realizes the needed function of circuit designers.Along with the complexity of PCB design is increasing, the measurability of ICT needle-bar is proposed higher requirement, can survey coverage rate when relatively lower as the ICT needle-bar, the PCB welding quality is difficult to control, therefore how to check that when PCB designs the measurability of each network is most important.

Summary of the invention

Technical assignment of the present invention provides a kind of the realization measurability of ICT needle-bar signal is carried out comparatively science, analysis accurately, helps improving the quality of PCB welding, has further improved the quick identification method of a kind of PCB measurability of PCB design efficiency.

Technical assignment of the present invention realizes in the following manner, but the NET attribute on the PCB is increased testing attribute, but can derive the testing attribute of each NET, analyzes control by plug-in testability, analyzes the testability of NET, and generates analysis report and suggestion.

But the test analysis control is analyzed the testability of NET, calculates total NET and measurable NET, and draws total test coverage; Also can be according to the power supply class, the internal memory class, bus type, clock class signal is classified to NET, and draws the test coverage of all kinds of lines; But generate test analysis table, analysis report and suggestion at last.

Testability is analyzed control and is specified line length, live width, line-spacing requirement according to the welding experience of every class line of PCB, solder thickness to the power ground of PCB is adjusted, testability is analyzed control according to these parameter extraction testabilities, but generates test analysis table, analysis report and suggestion at last.

In PCB, NET is carried out the attribute setting, if can survey and be test, can not survey and be untest, but derive test analysis table and the analysis report of NET, but pcb board welding parameter and design be adjusted according to test analysis table and report.

Concrete steps comprise:

(1) but the test analysis control testability of NET is analyzed, calculate total NET and measurable NET, and draw total test coverage;

(2), according to the power supply class, the internal memory class, bus type, clock class signal is classified to NET, and draws the test coverage of all kinds of lines;

(3) but, generation test analysis table, analysis report and suggestion;

(4) but, derive test analysis table and the analysis report of NET;

(5) but, derive test analysis table and the analysis report of NET, but do not meet the demands as test coverage, then PCB welding parameter and design are adjusted, test again is up to reaching requirement.

The quick identification method of a kind of PCB measurability of the present invention has the following advantages: realized the measurability of ICT needle-bar signal is carried out comparatively science, analysis accurately, help improving the quality of PCB welding, further improved the PCB design efficiency, make in this way, can carry out better controlled to welding quality, can shorten the pcb board design cycle greatly, and can accelerate time to market (TTM).

Description of drawings

The present invention is further described below in conjunction with accompanying drawing.

Accompanying drawing 1 is the synoptic diagram of the quick identification method of a kind of PCB measurability.

Embodiment

Explain below with reference to Figure of description and specific embodiment the quick identification method of a kind of PCB measurability of the present invention being done.

Embodiment:

The quick identification method of a kind of PCB measurability of the present invention, but the NET attribute on the PCB is increased testing attribute, but can derive the testing attribute of each NET, analyze control by plug-in testability, analyze the testability of NET, and generate analysis report and suggestion.

Concrete steps comprise:

(3) but, generation test analysis table, analysis report and suggestion;

(4) but, derive test analysis table and the analysis report of NET;

Except that the described technical characterictic of instructions, be the known technology of those skilled in the art.

Claims

1. A rapid identification method for PCB testability, characterized in that testable attributes are added to the NET attributes on the PCB, the testable attributes of each NET can be derived, and the testability of NETs can be analyzed by plug-in testability analysis controls , and generate analysis reports and recommendations.

2. A kind of PCB testability rapid identification method according to claim 1, it is characterized in that testable analysis control analyzes the testability of NET, calculates total NET and measurable NET, and draws total test coverage It can also classify NETs according to power supply, memory, bus, and clock signals, and obtain the test coverage of various lines; finally generate testable analysis tables, analysis reports and suggestions.

3. A kind of PCB testability rapid identification method according to claim 1, it is characterized in that the testability analysis control designates line length, line width, and line spacing requirements according to the soldering experience of each type of line of PCB, and the PCB's The solder thickness of the power supply ground wire is adjusted, and the testability analysis control extracts testability according to these parameters, and finally generates a testability analysis table, analysis report and suggestions.

4. a kind of PCB measurability rapid identification method according to claim 1, it is characterized in that in PCB, NET is carried out property setting, if measurable is test, unmeasurable is untest, derive the testable analysis table of NET and Analysis report, adjust the PCB board welding parameters and design according to the testable analysis table and report.

5. According to claim 1, 2, 3 or 4 described a kind of PCB testability rapid identification method, it is characterized in that the specific steps include:

(1) The testable analysis control analyzes the testability of NET, calculates the total NET and measurable NET, and obtains the total test coverage;

(2) Classify NETs according to power supply, memory, bus, and clock signals, and obtain the test coverage of various lines;

(3) Generate testable analysis tables, analysis reports and suggestions;

(4) Export the testable analysis table and analysis report of NET;

(5) Export the testable analysis table and analysis report of NET. If the testable coverage rate does not meet the requirements, adjust the PCB welding parameters and design, and retest until the requirements are met.