CN102142402A - Flip chip package structure for maintaining soldering position - Google Patents

Abstract

The present invention relates to a flip chip packaging structure for maintaining welding positioning, which mainly includes a chip and a substrate. A plurality of bumps and at least one embossed base mark are provided on the active surface of the chip. The substrate has a plurality of pads and at least one base mark seat. The base mark seat has a recessed base mark pattern corresponding to the embossed base mark. When the chip is aligned and set on the substrate, the embossed base mark is embedded in the recessed base mark pattern, so that the bump is aligned with the pad. Therefore, even if there is a mechanical alignment error, the bump of the chip can still be accurately welded to the pad of the substrate, especially when used in the "chip connection by metal column welding" product with better yield.

Description

Flip-chip package structure that maintains solder positioning

technical field

The invention relates to a semiconductor device, in particular to a flip-chip packaging structure for maintaining soldering positioning.

Background technique

In the semiconductor industry, the conventional packaging method is to place the chip on the substrate, and then use wire-bond technology to connect the chip and the substrate, and complete the electrical connection relationship between the two. Flip-chip packaging technology (Flip-Chip) is an advanced chip packaging technology. It is different from the previous chip packaging method. It is to set bumps on the active surface of the chip, such as solder bumps or solder balls, and then the chip Turn it over so that the active surface faces the substrate, and use the bump itself to electrically connect the chip and the substrate, thereby shortening the transmission distance between the chip and the substrate, achieving better electrical performance than wire bonding, and gradually becoming popular.

Later, IBM first developed an innovative flip-chip packaging technology. The bumps on the chip use metal pillars to replace the previous solder balls, and solder is used to connect the metal pillars on the chip and the pads on the substrate. There will be no change in the shape of the previous solder balls, so the pitch of the metal pillars can be reduced more densely (bump pitch can reach less than 50 microns, such as 30 microns), to achieve higher density or omit RDL (heavy This technology is called "metal post soldered chip connection", which is the so-called MPS-C2 (Metal Post Solder-Chip Connection) technology. This MPS-C2 related technology can be found in US Patent No. 6,229,220B1 "Bump structure, bump forming method and package connecting body (Bump structure, bump forming method and package connecting body)".

As shown in FIG. 1 , it is a schematic cross-sectional view of a conventional flip-chip package structure. A conventional MPS-C2 flip-chip package structure 100 mainly includes a chip 110 and a substrate 120 . A plurality of bumps 112 such as metal pillars are disposed on the active surface 111 of the chip 110 for flip-chip bonding to the substrate 120 . The substrate 120 has a plurality of pads 121 corresponding to the bumps 112 respectively. Specifically, the bumps 112 are adhered to the pads 121 by a plurality of solders 130 to achieve an electrical connection between the chip 110 and the substrate 120 . Furthermore, the flip-chip package structure 100 may be formed with an encapsulant 140 for covering the bumps 112 , the pads 121 and the solder 130 .

Generally speaking, the traditional flip-chip package and MPS-C2 technology belong to the fine-pitch chip bonding of bumps, and the bumps will have a relatively dense configuration. Therefore, in the flip-chip bonding process, the machine identification system will be used to find the reference mark for alignment calibration. In this way, a machine with very accurate alignment (allowable displacement tolerance within 25 microns) will be required to achieve The wafer 110 and the substrate 120 are successfully bonded, but the cost of the high-precision flip-chip bonding machine itself is quite expensive. In addition, even with precise bonding, the transfer process to the reflow step after bonding the wafer 110 and the substrate 120, the vibration of the tool changeover and the overflow of solder or flux can cause the bumps 112 to be soldered to the wrong pads. The case of 121 will lead to electrical connection failure, especially when used in MPS-C2 products, there will be a more obvious drop in yield.

It can be seen that the above existing flip-chip packaging structure still has inconvenience and defects in structure and use, and needs to be further improved. In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously the relevant industry. urgent problem to be solved. Therefore, how to create a new type of flip-chip packaging structure that maintains soldering positioning is one of the current important research and development topics, and it has also become a goal that the industry needs to improve.

Contents of the invention

The main purpose of the present invention is to overcome the defects existing in the existing flip-chip packaging structure, and provide a new type of flip-chip packaging structure that maintains soldering positioning. The role of positioning is maintained until the reflow step. Even if there is a mechanical alignment error and the transfer process from chip bonding to reflow, the bumps of the chip can still be correctly aligned with the pads of the substrate to achieve precise soldering, especially for MPS. -C2 (chip connection with metal pillar bonding) products have better yield and are very suitable for practical use.

Another object of the present invention is to provide a new type of flip-chip packaging structure that maintains soldering positioning. The technical problem to be solved is to enable it to be placed between the bumps of the chip and the pads of the substrate during alignment and reflow. Maintain a gap between them to prevent the solder from being squeezed and overflow, and provide better levelness between the chip and the substrate, especially for MPS-C2 (metal pillar soldered chip connection) products with better reliability degree, which is more suitable for practical use.

Another object of the present invention is to provide a new type of flip-chip packaging structure that maintains soldering positioning. The technical problem to be solved is to make it possible to perform alignment between the chip and the substrate at low temperature or normal temperature and then return it. Welding achieves the effect of welding and fixing, so it is more suitable for practical use.

The purpose of the present invention and the solution to its technical problems are achieved by adopting the following technical solutions. According to the present invention, a flip-chip packaging structure for maintaining soldering positioning mainly includes a chip and a substrate. The wafer is provided with a plurality of bumps and at least one embossed base mark on its active surface. The substrate has a plurality of contact pads and at least one base mark, and the base mark has a concave base mark pattern corresponding to the embossed base mark. When the chip is positioned on the substrate, the embossed base mark The fiducial is embedded in the recessed fiducial pattern, so that the bumps are aligned with the pads.

The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures.

In the aforementioned flip-chip package structure for maintaining soldering position, a plurality of first sliding slope walls may be provided in the recessed fiducial pattern, so as to facilitate the guiding and positioning of the embossed fiducial.

In the aforementioned flip-chip package structure for maintaining soldering position, the recessed fiducial pattern can be a semi-cone cavity, and the embossed fiducial can have a plurality of corresponding second guide-slide walls, so that the embossed The protruding fiducial has a half-conical cross-section to completely fill the recessed fiducial pattern.

In the aforementioned flip-chip package structure for maintaining soldering position, the embossed fiducial can be located at a corner of the active surface of the chip.

In the aforementioned flip-chip package structure for maintaining soldering position, the embedding joint thickness of the embossed base mark and the base base seat may not be less than the height of the bumps.

The aforementioned flip-chip package structure for maintaining soldering position may additionally include a plurality of solders for soldering the bumps to the pads.

In the aforementioned flip-chip package structure that maintains soldering positioning, the bumps can be metal pillars that are not deformed by reflow, so as to form an MPS-C2 package.

In the aforementioned flip-chip package structure maintaining soldering position, the embossed fiducials can be located symmetrically relative to the bumps on the periphery of the active surface of the chip.

In the aforementioned flip-chip package structure maintaining soldering position, the shape of the top surface of the embossed mark can be selected from one of square, strip, triangle and L-shape.

In the aforementioned flip-chip package structure for maintaining soldering position, the embossed fiducial can have the same height and material as the bumps.

Compared with the prior art, the present invention has obvious advantages and beneficial effects. With the above-mentioned technical solution, the present invention maintains the soldering position flip-chip packaging structure at least to have the following advantages and beneficial effects:

1. The present invention can use the specific combination of the embossed base mark and the base mark as a technical means. Since the base mark has a concave base mark pattern, it can correspond to the embossed base mark. When the wafer is aligned on the substrate Above, the embossed fiducial is embedded in the concave fiducial pattern, so that the bump is aligned with the pad. Therefore, the base mark has the function of automatic wafer positioning during alignment and is maintained until the reflow step. Even if there are mechanical alignment errors and the transfer process from wafer bonding to reflow, the bumps of the wafer can still be correctly aligned with the substrate. Pad to achieve precise soldering, especially for MPS-C2 (metal pillar soldered chip connection) products with better yield.

2. The present invention can use the specific combination relationship of the embossed base mark and the base coordinate as a technical means. Since the embedding thickness of the embossed base mark and the base coordinate is not less than the height of the bump, it can Maintain a gap between the bumps of the chip and the pads of the substrate during alignment and reflow to prevent the solder from being squeezed and overflow, and provide better levelness between the chip and the substrate, especially for use in MPS-C2 (metal pillar bonded chip connection) products have better reliability.

3. The present invention can use the specific combination of the embossed base mark and the base mark as a technical means to achieve alignment between the chip and the substrate at low or normal temperature and then reflow to achieve the effect of soldering and fixing.

To sum up, the present invention relates to a flip-chip package structure for maintaining soldering positioning, which mainly includes a chip and a substrate. A plurality of bumps and at least one embossed base mark are arranged on the active surface of the wafer. The substrate has a plurality of pads and at least one base seat. The fiducial frame has a concave fiducial pattern corresponding to the embossed fiducial. When the chip is aligned on the substrate, the embossed base mark is embedded in the recessed base mark pattern, so that the bump is aligned with the pad. Therefore, even if there is a mechanical alignment error, the bumps of the chip can still be accurately welded to the pads of the substrate, especially for "chip connection by metal pillar welding" products with better yield. The present invention has significant progress in technology, and has obvious positive effects, and is a novel, progressive and practical new design.

The above description is only an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable , the following preferred embodiments are specifically cited below, and are described in detail as follows in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a conventional flip-chip package structure.

FIG. 2 is a schematic cross-sectional view of a flip-chip package structure for maintaining soldering positioning according to the first embodiment of the present invention.

3A to 3C are schematic cross-sectional views of elements during the flip-chip bonding process of the flip-chip package structure according to the first embodiment of the present invention.

4A and 4B are schematic partial top views of the chip and the substrate of the flip-chip package structure according to the first embodiment of the present invention.

5A and 5B are schematic partial top views of the chip and the substrate of the flip-chip package structure according to a variation of the first embodiment of the present invention.

6A and 6B are schematic partial top views of the chip and the substrate of the flip-chip package structure according to a variation of the first embodiment of the present invention.

7 is a schematic cross-sectional view of another flip-chip package structure maintaining soldering position according to the second embodiment of the present invention.

8 is a schematic cross-sectional view of the device before alignment during the flip-chip bonding process of the flip-chip package structure according to the second embodiment of the present invention.

10: Upper Fixture 20: Lower Fixture

100: Flip Chip Package Structure 110: Chip

111: Active surface 112: Bump

120: substrate 121: pad

130: Soldering Flux 140: Sealant

200: Flip-chip package structure that maintains soldering positioning 210: Chip

211: Active surface 212: Bump

213: Embossed base mark 213a: Embossed base mark

213b: Embossed base mark 213e: Embossed base mark

213d: Embossed base mark 220: Substrate

221: Pad 222: Base seat

223: Recessed base mark pattern 223a: Recessed base mark pattern

223b: Recessed base mark pattern 223c: Recessed base mark pattern

223d: Recessed base pattern 224: The first guide slope wall

230: Soldering Flux 240: Sealant

300: Flip-chip package structure that maintains soldering positioning 314: The second slide guide wall

350: Flux

Detailed ways

In order to further explain the technical means and effects adopted by the present invention to achieve the intended purpose of the invention, the specific implementation, structure, Features and their functions are described in detail below.

Some embodiments of the present invention will be described in detail as follows. However, in addition to the following descriptions, the present invention can also be widely implemented in other embodiments, and the protection scope of the present invention is not limited by the embodiments, which shall prevail by the protection scope of the claims. Moreover, in order to provide a clearer description and an easier understanding of the present invention, various parts in the drawings have not been drawn according to their relative sizes, and some dimensions have been exaggerated compared with other relevant dimensions; irrelevant details have not been completely drawn. are drawn for the sake of simplicity of the diagram.

According to the first embodiment of the present invention, a flip-chip package structure that maintains soldering positioning is exemplified in the schematic cross-sectional view of FIG. A partial top view of its wafer and substrate is shown. The flip-chip package structure 200 for maintaining soldering position mainly includes a chip 210 and a substrate 220 .

Please refer to FIG. 2 , which is a schematic cross-sectional view of a flip-chip package structure for maintaining soldering positioning according to the first embodiment of the present invention. The active surface 211 of the wafer 210 is provided with a plurality of bumps 212 and at least one embossed base mark 213 . In detail, the active surface 211 may additionally be formed with a plurality of solder pads (not shown in the figure) for connecting the bumps 212, and an UBM layer ( not shown in the figure) to avoid metal diffusion of components in the bump. In this embodiment, the chip 210 may be a carrier of an integrated circuit (IC), which is divided into a wafer. The function of the embossed mark 213 is to be identified by the machine identification system as an alignment reference point. In the present invention, the use of the embossed structure of the embossed fiducial 213 in combination with the fiducial seat on the substrate has a function of fixing the wafer during alignment. Preferably, the embossed fiducials 213 can be symmetrically located on the periphery of the active surface 211 of the wafer 210 with respect to the bumps 212, so as not to affect the configuration positions of the bumps 212, and have Play the role of interval maintenance during welding.

The substrate 220 has a plurality of pads 221 and at least one base mark 222. The base mark 222 has a recessed base mark pattern 223 corresponding to the embossed base mark 213. When the chip 210 is positioned on the base mark 213 On the substrate 220 , the embossed fiducial 213 is embedded in the concave fiducial pattern 223 , so that the bumps 212 are aligned with the pads 221 . Specifically, the substrate 220 can be a printed circuit board (PCB), which is used as the main carrier and electrical connection medium of the overall packaging structure. Specifically, since a plurality of embossed fiducial marks 213 are arranged on the active surface 211, and similarly, the fiducial mark seat 222 of the substrate 220 is also provided with a plurality of corresponding concave fiducial mark patterns 223, so the A wafer-fixed relationship is established between the wafer 210 and the substrate 220 during alignment.

In addition, the flip chip package structure 200 may additionally include a plurality of solders 230 for soldering the bumps 212 to the pads 221 . In a preferred embodiment, the solders 230 can be selected from commonly used lead-free solders or low-temperature solders, and can be pre-sticked on the top surfaces of the bumps 212 of the chip 210 before flip-chip bonding. (ie, the bump surface away from the chip 210 and parallel to the active surface 211 ). In a preferred embodiment, the bumps 212 can be deformed metal pillars without reflow, such as gold pillars, copper pillars or high-temperature tin-lead pillars, so as to form an MPS-C2 (metal pillar soldered die attach) package type. In other words, the melting point of the bumps 212 should be higher than the reflow temperature for melting the solder 230 , so that the bumps 212 will not be deformed or balled during the reflow process.

In particular, the embossed mark 213 can have the same height and material as the bumps 212, so it can be formed by electroplating at the same time to simplify the process. In this embodiment, the materials of the bumps 212, the embossed fiducial 213 and the fiducial 222 can all be selected from copper (Cu), wherein the embossed fiducial 213 can be a copper pillar (Cu post), and the base frame 222 can also be a copper hole (Cu cave) recess.

Preferably, as shown in FIG. 3A , FIG. 3A to FIG. 3C are schematic cross-sectional views of elements during the flip-chip bonding process of the flip-chip package structure according to the first embodiment of the present invention. A plurality of first guiding slope walls 224 may be provided in the concave base mark pattern 223 to facilitate the guiding and positioning of the embossed base mark 213, and the embossed base mark 213 only needs to be able to be positioned. , no corresponding shape is required. Specifically, the inclination angle of the first guide-slide walls 224 can be between 45 degrees and 90 degrees, which is more favorable for the embossed landmark 213 to move along the first guides during flip-chip bonding. The sliding wall 224 slides to a predetermined position, so that the wafer 210 is smoothly and precisely positioned on the substrate 220 . Therefore, in the flip-chip bonding process, a machine with poor alignment accuracy can be selected, and the embossed fiducial 213 can be easily used to align with the fiducial 222 to achieve the alignment of the bumps 212 on the The pads 221 . As shown in FIG. 3C, when the embossed base mark 213 is embedded in the recessed base mark pattern 223, that is, the top surface of the raised base mark 213 overlaps the bottom surface of the recessed base mark pattern 223, it can accurately The wafer 210 is aligned and positioned on the substrate 220, so the allowable tolerance of the machine can be enlarged.

More specifically, the flip-chip package structure 200 for maintaining the soldering position may further include an encapsulant 240 to cover the bumps 212 , the pads 221 and the base 222 . In a preferred embodiment, the encapsulant 240 can be an underfill, so the high fluidity of the underfill can be used to avoid the gap between the chip 210 and the substrate 220 .

Therefore, the present invention uses the specific combination relationship between the embossed fiducials and the fiducials as one of the technical means, so that the embossed fiducials 213 have dual functions of alignment and wafer fixation, even in the presence of mechanical alignment Errors and the transmission process between the bonding of the chip 210 and the reflow can still make the bumps 212 of the chip 210 correctly align with the corresponding pads 221 of the substrate 220 to achieve precise soldering, especially for MPS-C2 (Metal Post Bonded Die Attach) product has better yield. This is because the fiducial seat 222 of the present invention has the concave fiducial pattern 223, which can be used for embedding of the embossed fiducial 213, the vibration of the machine conversion and the overflow of the solder 230 (or flux) Neither will cause bit shift of the wafer 210 in reflow before soldering.

In addition, preferably, the embedding bonding thickness of the embossed fiducial 213 and the fiducial seat 222 may not be less than the height of the bumps 212, so as to provide a connection between the bumps 212 of the wafer 210 and the substrate 220. A gap is maintained between the pads 221, that is to say, the flip-chip spacing between the chip 210 and the substrate 220 can be controlled and determined by the embossed base mark 213 and the base mark seat 222, so as to achieve The level between the wafer 210 and the substrate 220 . By maintaining a gap between the bumps 212 of the chip 210 and the pads 221 of the substrate 220 during alignment and reflow, the solder 230 is prevented from being squeezed and overflowed, and can A better levelness between the wafer 210 and the substrate 220 is provided.

The present invention also discloses a feasible but non-limiting manufacturing method of the flip-chip package structure 200 that maintains the soldering position, as illustrated in FIG. 3A to FIG. One of the effects, its detailed step-by-step instructions are as follows.

First, as shown in FIG. 3A , an alignment and thermocompression step of flip-chip bonding is performed, so that the wafer 210 is aligned on the substrate 220 . When the raised fiducial 213 is aligned with the concave fiducial pattern 223 , the bumps 212 are aligned with the pads 221 . In this step, when the alignment of the wafer 210 is completed and pressed down to the substrate 220, the guiding function provided by the first sliding guide walls 224 can be used to make the embossed base mark 213 along the The first sliding slope wall 224 of the concave fiducial pattern 223 achieves automatic alignment. In this step, the solders 230 can adhere to the pads 221 , and it is sufficient to achieve preliminary soldering or not soldering.

Please refer to FIG. 3B , if it is in an unsoldered state, the wafer 210 can be clamped by an upper clamp 10 and clamped by a lower clamp 20 in the transfer process after the alignment of flip-chip bonding and before the reflow step. The substrate 220 sandwiches the wafer 210 and the substrate 220 up and down. Since the embossed fiducial 213 has been embedded in the concave fiducial pattern 223, the wafer 210 will not have a bit shift phenomenon, so that the bumps 212 can remain aligned with the pads 221, and The solder 230 may still remain in a paste state and has not yet been sintered into a metal soldering interface.

Referring to FIG. 3C , the reflow step of the flip chip bonding is performed, and the solder 230 will melt when reaching the reflow temperature, so as to be soldered to the pads 221 . Since the embossed fiducial mark 213 is embedded in the concave fiducial mark pattern 223, the chip 210 has no displacement, and the solder 230 will not be squeezed or overflowed to achieve precise soldering. effect. After the above-mentioned reflow step, the solder 230 is in a solid state after cooling down, and as a soldering interface, it can firmly solder and join the bumps 212 and the pads 221, so that an electrical connection between the chip 210 and the substrate 220 can be achieved. sexual connection. Therefore, the present invention can further achieve the effect of performing alignment between the chip 210 and the substrate 220 at low temperature or normal temperature and then reflowing to achieve soldering and fixing. In addition, the flip-chip packaging structure 200 of the present invention that maintains soldering positioning is not limited to the above-mentioned manufacturing method, and can also be implemented by existing reflow or thermocompression bonding techniques of flip-chip bonding.

Preferably, as shown in FIG. 4A and FIG. 4B , FIG. 4A and FIG. 4B are schematic partial top views of the chip and the substrate of the flip-chip package structure according to the first embodiment of the present invention. The embossed fiducial 213 can be located at a corner of the active surface 211 of the wafer 210, so the embossed fiducial 213 is farther away from the center of the active surface 211 of the wafer 210 than the bumps 212 for convenience. The machine identification system quickly searches for alignment calibration.

In addition, the present invention is not limited to the shape of the top surface of the embossed mark and the bump. The shape of the top surface of the embossed mark 213 can be selected from one of square, bar, triangle and L shape. In the present invention, no matter what the shape of the top surface of the embossed fiducial 213 is, or even a combination of the above-mentioned top surface shapes, it can provide a mechanical Positioning has the function of keeping the chip from shifting, so that the chip 210 is precisely bonded to the substrate 220 .

Referring to FIG. 4A and FIG. 4B , the top surface of each bump 212 may be rectangular, so that the bumps 212 are formed into square columns. Moreover, each pad 221 can be in the shape of a strip to correspond to each bump 212 respectively. In this embodiment, the shape of the top surface of the embossed base mark 213 is a square, and the shape of the top surface of the recessed base mark pattern 223 is also a corresponding square shape. Therefore, the embossed reference mark 213 of this embodiment may have four first guide slope walls 214 , and the recessed reference mark pattern 223 also has four corresponding first guide slope walls 224 . Wherein, the so-called "square" refers to a square or a rectangle, which can provide a more convenient alignment effect.

Please refer to FIG. 5A and FIG. 5B , which are schematic partial top views of the chip and the substrate of the flip-chip package structure according to a variation of the first embodiment of the present invention. In a variant embodiment, the shapes of the embossed and recessed fiducials are changed. The top surfaces of the embossed fiducials 213a, 213b can be strip-shaped, and the fiducials 222 on the substrate 220 It also has the concave fiducial pattern 223a, 223b corresponding to the bar shape. Wherein, the so-called "strip shape" refers to a shape having two pairs of sides parallel to each other and adjacent sides are not equal. In detail, the embossed base mark 213a and the embossed base mark 213b can be arranged in different directions, wherein one long side of the embossed base mark 213a is perpendicular to the other corner of the embossed base mark. Mark a long side of 213b. Moreover, as shown in FIG. 5B , the concave fiducial pattern 223 a and the concave fiducial pattern 223 b may be located at corners corresponding to the embossed fiducial 213 a and the embossed fiducial 213 b respectively. Therefore, when the wafer 210 is turned over for alignment, the embossed fiducial mark 213a can be embedded in the concave fiducial pattern 223a, and the embossed fiducial mark 213b can be embedded in the concave fiducial pattern 223b, regardless of the The orientation of the wafer 210 aligned on the substrate 220 can also be easily achieved by the embossed fiducials 213 and the fiducials 222 to achieve a precise positioning effect.

Please refer to FIG. 6A and FIG. 6B , which are schematic partial top views of the chip and the substrate of the flip-chip package structure according to a variation of the first embodiment of the present invention. The top surface of each protruding block 212 can be rounded and formed as a cylinder. And each pad 221 is also circular for bonding with the corresponding bump 212 . In another variant embodiment, the shape of the top surface of the embossed landmark can be triangular or L-shaped. Specifically, as shown in FIG. 6A, the top surface of the embossed base mark 213c is L-shaped, and is arranged on the upper right corner of the active surface 211 of the wafer 210, while the top surface of the embossed base mark 213d is The shape is triangular, and it is disposed at the upper left corner of the active surface 211 of the wafer 210 . As shown in FIG. 6B , the L-shaped concave fiducial pattern 223 c is located on the left side of the figure, and the triangular concave fiducial pattern 223 d is positioned on the right side of the figure. During flip-chip bonding, the chip 210 is turned over for alignment, the embossed fiducial mark 213c can be embedded in the recessed fiducial mark pattern 223c, and the embossed fiducial mark 213d can be embedded in the recessed fiducial mark pattern 223d.

According to the second embodiment of the present invention, another flip-chip package structure for maintaining soldering positioning is illustrated in the schematic cross-sectional view of FIG. 7 and the schematic cross-sectional view of components in FIG. 8 . The main components that are the same as those in the first embodiment will be marked with the same symbols and will not be described in detail again.

The present invention is not limited to the MPS-C2 product, and can also be used in a flip-chip packaging structure bonded by solder balls. Please refer to FIG. 7 , which is a schematic cross-sectional view of another flip-chip package structure for maintaining soldering positioning according to the second embodiment of the present invention. The flip-chip package structure 300 for maintaining soldering position mainly includes a chip 210 and a substrate 220 . The wafer 210 is provided with a plurality of bumps 212 and at least one embossed mark 213 on its active surface 211 . The substrate 220 has a plurality of pads 221 and at least one base mark 222. The base mark 222 has a recessed base mark pattern 223. The driver corresponds to the embossed base mark 213. When the chip 210 is positioned on the base mark 213 On the substrate 220 , the embossed mark 213 is embedded in the recessed mark pattern 223 . In this embodiment, the bumps 212 are selected from one of solder bumps and solder balls, and are soldered to the pads 221 by the bumps 212 themselves, so as to achieve the connection between the chip 210 and the The electrical connection relationship of the substrate 220 .

Please refer to FIG. 8 , which is a schematic cross-sectional view of components before alignment during the flip-chip bonding process of the flip-chip package structure according to the second embodiment of the present invention. In this embodiment, in the alignment step of the flip-chip bonding process, the pads 221 may be pre-coated with a plurality of fluxes 350 to facilitate the contact of the bumps 212 to the pads 221. Flux 350. The bumps 212 are melted into balls during reflow, and then soldered to the pads 221 .

In this preferred embodiment, the concave base mark pattern 223 can be a semi-cone cavity, and the raised base mark 213 can have a plurality of corresponding second guide slope walls 314, so that the raised base mark The mark 213 has a half-conical cross-section to completely fill the recessed fiducial mark pattern 223 (as shown in FIG. 7 ). Therefore, the embossed base mark 213 and the recessed base mark pattern 223 can have shapes corresponding to each other, and by the inclined design of the second slide slope walls 314 and the first slide slope walls 224, more It is beneficial for the embossed fiducial mark 213 to slide into the concave fiducial mark pattern 223 , so that the effect of automatically fixing the chip without deflection displacement can be achieved during the thermocompression bonding step of flip-chip bonding (ie, before reflow soldering). Moreover, there is no need for glue to fill the recessed fiducial pattern 223 and no excessive gaps will be generated.

During the reflow process or the previous transfer operation, by setting the embossed fiducial 213 and the fiducial seat 222, when the embossed fiducial 213 is embedded in the recessed fiducial pattern 223, The relationship between the embossed fiducial 213 and the fiducial seat 222 is automatically guided to the positioning of the chip, so that the bumps 212 can be accurately welded to the pads 221 without chip displacement. , can also avoid the above-mentioned short circuit problem caused by solder balls touching each other or bridging solder connection. In addition, the embedding combined structure of the embossed fiducial 213 and the fiducial 222 can also maintain a fixed flip-chip gap and levelness between the chip 210 and the substrate 220 during alignment and reflow, In order to prevent the protrusions 212 from being deformed due to being squeezed or pulled, it has better product reliability.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this field Those skilled in the art, without departing from the scope of the technical solution of the present invention, can use the technical content disclosed above to make some changes or modify equivalent embodiments with equivalent changes, but all the content that does not depart from the technical solution of the present invention, according to the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence still belong to the scope of the technical solutions of the present invention.

Claims (10)

1. keep the crystal-coated package structure that welding is located for one kind, it is characterized in that it comprises:

One wafer is provided with a plurality of projections and at least one floating prominent shape disjunction mark on its active surface; And

One substrate has a plurality of connection pads and at least one disjunction mark seat, and this disjunction mark seat has a depression disjunction mark pattern, be corresponding to this floating prominent shape disjunction mark, when this wafer contraposition is arranged on this substrate, this floating prominent shape disjunction mark is that edge is embedded in this depression disjunction mark pattern, so that those projections are in alignment with those connection pads.

2. the crystal-coated package structure of keeping the welding location according to claim 1 is characterized in that being provided with a plurality of first slide guide skew walls in the wherein said depression disjunction mark pattern, is beneficial to the slide guide location of this floating prominent shape disjunction mark.

3. the crystal-coated package structure of keeping the welding location according to claim 2, it is characterized in that wherein said depression disjunction mark pattern is the half cone depression, and should have corresponding a plurality of second slide guide skew walls by floating prominent shape disjunction mark, so that should have half tapered cross-section by floating prominent shape disjunction mark, to fill up this depression disjunction mark pattern fully.

4. the crystal-coated package structure of keeping the welding location according to claim 1 is characterized in that wherein said floating prominent shape disjunction mark is a corner that is positioned at the active surface of this wafer.

5. the crystal-coated package structure of keeping the welding location according to claim 1 is characterized in that wherein said floating prominent shape disjunction mark combines the height that thickness is not less than those projections with being embedded into of this disjunction mark seat.

6. according to the described crystal-coated package structure of keeping the welding location of arbitrary claim in the claim 1 to 5, it is characterized in that including in addition a plurality of welding compounds, to weld those projections to those connection pads.

7. the crystal-coated package structure of keeping the welding location according to claim 6 is characterized in that wherein those projections are the metal column of not reflow distortion, connects the encapsulation kenel with the wafer that constitutes the metal column welding.

8. according to the described crystal-coated package structure of keeping the welding location of arbitrary claim in the claim 1 to 5, it is characterized in that wherein said floating prominent shape disjunction mark is a plurality of active surface peripheries that are positioned at this wafer symmetrically with respect to those projections.

9. according to the described crystal-coated package structure of keeping welding location of arbitrary claim in the claim 1 to 5, the end face shape that it is characterized in that wherein said floating prominent shape disjunction mark is to be selected from square, bar shaped, triangle and L shaped one of them.

10. according to the described crystal-coated package structure of keeping the welding location of arbitrary claim in the claim 1 to 5, it is characterized in that wherein said floating prominent shape disjunction mark is to have identical height and material with those projections.

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