CN102214481A - Multi-level cell flash memory reading-writing method and device and storage device - Google Patents
Multi-level cell flash memory reading-writing method and device and storage device Download PDFInfo
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- CN102214481A CN102214481A CN201010144789XA CN201010144789A CN102214481A CN 102214481 A CN102214481 A CN 102214481A CN 201010144789X A CN201010144789X A CN 201010144789XA CN 201010144789 A CN201010144789 A CN 201010144789A CN 102214481 A CN102214481 A CN 102214481A
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Abstract
The invention is suitable for the technical field of flash memories, and provides a multi-level cell flash memory reading-writing method and device and a storage device. The method comprises the following steps of: calculating a corresponding storage address of the lowest significant bit page in a multi-level cell flash memory, and writing data into the corresponding storage address of the lowest significant bit page. In the embodiment of the invention, the data is written into the corresponding storage address of the lowest significant bit page through calculating the corresponding storage address of the lowest significant bit page in the multi-level cell flash memory, so that stability of the multi-level cell flash memory is improved; and since only the steady and reliable lowest significant bit page in the multi-level cell flash memory is read and written, the stability of the storage device of the multi-level cell flash memory can be correspondingly improved.
Description
Technical field
The invention belongs to the flash memory technology field, relate in particular to a kind of multi-layered unit flash memory reading/writing method, device and memory device.
Background technology
Flash memory can be divided into the single layer cell flash memory according to its internal framework, the information of 1 position of storage (bit) in each unit (cell); Multi-layered unit flash memory, each unit (cell) are stored 2 positions (bit) information at least, and wherein, multi-layered unit flash memory comprises the flash memory of 2bit/cell, 3bit/cell and the later more multidigit unit that occurs.
It is electric charge making alive by to floating boom that the data of single layer cell flash memory write, and through source electrode stored charge is eliminated, by such mode, to store an information bit (1 representative is eliminated, and 0 representative writes).Multi-layered unit flash memory then is the electric charge that uses in floating boom in various degree, therefore can in one-transistor, store a plurality of information, and the control that writes Yu respond to by the unit, in one-transistor, produce various states, for single layer cell flash memory and multi-layered unit flash memory, the unit of same capacity to store 1 different with the degree of stability and the complexity of storing multidigit, the single layer cell flash memory is more stable than multi-layered unit flash memory, and single layer cell flash memory writing speed is very fast.From the data storage mechanism aspect, flash memory inside comprises a plurality of, and each piece is made of a plurality of pages or leaves.All pages of single layer cell flash memory all are quick and reliable and stable, and some page is quick and reliable and stable in the piece of multi-layered unit flash memory, and the page or leaf in the structure merchandiser layer unit flash memory is similar.For example, flash memory with 2bit/cell is an example, a unit comprises two positions (0,1), 0 is called least significant bit (LSB), and 1 is called non-least significant bit (LSB), can produce four kinds of states (00,01,11,10), in pages or leaves different in the write-in block, corresponding page or leaf in two difference write-in blocks of each unit, wherein, the page or leaf that writes least significant bit (LSB) is called least significant bit page, the page or leaf that writes other non-least significant bit (LSB)s is called non-least significant bit page, described least significant bit page is quick and reliable and stable page or leaf, and the page or leaf in its structure and the single layer cell flash memory is similar, and the distribution of its least significant bit page of the flash memory of same model in all pieces all is the same.In like manner, the flash memory of 3bit/cell, a unit comprises 3 positions (0,1,2), 0 is called least significant bit (LSB), and 1 and 2 is called non-least significant bit (LSB), and the page or leaf that wherein writes 0 is least significant bit page, the page or leaf that writes 1 and 2 is non-least significant bit page, wherein, describe page or leaf quick and reliable and stable in the multi-layered unit flash memory, describe other page or leaf in the multi-layered unit flash memory with non-least significant bit page with least significant bit page.
The shortcoming of prior art is that immature or other reasons makes the multi-layered unit flash memory unstable properties because of technology, and corresponding multi-layered unit flash memory memory device, stores unstable properties.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of multi-layered unit flash memory reading/writing method, is intended to solve multi-layered unit flash memory unstable properties in the prior art, and corresponding multi-layered unit flash memory storage device performance problem of unstable.
The embodiment of the invention is achieved in that a kind of multi-layered unit flash memory reading/writing method, and described method comprises the steps:
Calculate the memory address of least significant bit page correspondence in the multi-layered unit flash memory, data are write the memory address of described least significant bit page correspondence.
Another purpose of the embodiment of the invention is to provide a kind of multi-layered unit flash memory read-write equipment, and described device comprises:
Date read-write cell is used for calculating the memory address of multi-layered unit flash memory least significant bit page correspondence, data is write the memory address of described least significant bit page correspondence.
Another purpose of the embodiment of the invention is to provide a kind of memory device based on multi-layered unit flash memory, and described memory device comprises the multi-layered unit flash memory read-write equipment, and described device comprises:
Date read-write cell is used for calculating the memory address of multi-layered unit flash memory least significant bit page correspondence, data is write the memory address of described least significant bit page correspondence.
In embodiments of the present invention, by calculating the memory address of least significant bit page correspondence in the multi-layered unit flash memory, data are write the memory address of least significant bit page correspondence, improved the stability of multi-layered unit flash memory, owing to, can improve the stability of multi-layered unit flash memory memory device accordingly only to least significant bit page read-write reliable and stable in the multi-layered unit flash memory.
Description of drawings
Fig. 1 is the realization flow figure of the multi-layered unit flash memory reading/writing method that provides of the embodiment of the invention;
Fig. 2 is the structural drawing of the multi-layered unit flash memory read-write equipment that provides of the embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In embodiments of the present invention, by calculating the memory address of least significant bit page correspondence in the multi-layered unit flash memory, data are write the memory address of least significant bit page correspondence, improved the stability of multi-layered unit flash memory.
In embodiments of the present invention, with least significant bit page page or leaf quick and reliable and stable in the multi-layered unit flash memory is described, other page or leaf is described in the multi-layered unit flash memory with non-least significant bit page, the distribution of its least significant bit page of the flash memory of same model in storage block can be provided by flash memory manufacturer, and the distribution of least significant bit page in all storage blocks all is the same.
In embodiments of the present invention, when data storage, data are write the memory address of least significant bit page correspondence, because least significant bit page is reliable and stable, improved the stability of multi-layered unit flash memory, can also improve simultaneously the read or write speed of multi-layered unit flash memory, reduce the power consumption of multilevel-cell.In addition, because the raising of stability, multi-layered unit flash memory can also be applied to relatively reliable, stability, power consumption, rate request very in the system of strictness.
Fig. 1 shows the realization flow of the multi-layered unit flash memory reading/writing method that the embodiment of the invention provides, and details are as follows:
In step S101, read and write current least significant bit page.
In step S102, judge whether the read-write of current least significant bit page is finished, be execution in step S103 then.
In step S103, calculate the memory address of next least significant bit page correspondence.
In step S104, judge whether the memory address of next least significant bit page correspondence is the memory address of last least significant bit page correspondence of storage block, be execution in step S105 then, otherwise execution in step S101.
In step S105, finish read-write.
In embodiments of the present invention,, data are write in the memory address of least significant bit page correspondence, can improve the stability of multi-layered unit flash memory, can guarantee to make full use of simultaneously the page or leaf of existing each least significant bit (LSB) by judgement, calculating and reading and writing data.
Fig. 2 shows the structure of the multi-layered unit flash memory read-write equipment that the embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with the embodiment of the invention.
For memory device, as read and write frequent USB flash disk, solid state hard disc and digital code player, this multi-layered unit flash memory read-write equipment can be built in the memory device, in the controller as storer based on multi-layered unit flash memory.
The multi-layered unit flash memory read-write equipment comprises that date read-write cell by calculating the memory address of least significant bit page correspondence in the multi-layered unit flash memory, writes data the memory address of least significant bit page correspondence.
Described in embodiments of the present invention date read-write cell further comprises data read-write module 21, first judge module 22, memory address computing module 23, second judge module 24.The current least significant bit page of data read-write module 21 read-writes.Whether the read-write of the current least significant bit page that first judge module, 22 judgment data module for reading and writing 21 carry out is finished.When first judge module 22 judged that the read-write of current least significant bit page is finished, memory address computing module 23 calculated the memory address of next least significant bit page correspondence.Second judge module 24 judges whether the memory address of the next least significant bit page correspondence that memory address computing module 23 calculates is the memory address of last least significant bit page correspondence of storage block, be then to finish read-write, otherwise log-on data module for reading and writing 21.
In embodiments of the present invention, when data storage, data are write the memory address of least significant bit page correspondence, because least significant bit page is reliable and stable, improve the stability of multi-layered unit flash memory, can also improve the read or write speed of multi-layered unit flash memory simultaneously, reduced the power consumption of multi-layered unit flash memory, owing to, can improve the stability of multi-layered unit flash memory memory device accordingly only to least significant bit page read-write reliable and stable in the multi-layered unit flash memory.In addition, because the raising of stability, multi-layered unit flash memory can also be applied to relatively reliable, stability, power consumption, rate request very in the system of strictness.By judgement, calculating and reading and writing data, data are write in the memory address of least significant bit page correspondence, can guarantee to make full use of the page or leaf of existing each least significant bit (LSB).
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. a multi-layered unit flash memory reading/writing method is characterized in that, described method comprises the steps:
Calculate the memory address of least significant bit page correspondence in the multi-layered unit flash memory, data are write the memory address of described least significant bit page correspondence.
2. multi-layered unit flash memory reading/writing method as claimed in claim 1 is characterized in that described method specifically comprises the steps:
Read and write current least significant bit page;
Judge whether the read-write of described current least significant bit page is finished;
When the read-write of judging described current least significant bit page is finished, calculate the memory address of next least significant bit page correspondence;
Whether the memory address of judging described next least significant bit page correspondence is the memory address of last least significant bit page correspondence of storage block, is then to finish read-write.
3. a multi-layered unit flash memory read-write equipment is characterized in that, described device comprises:
Date read-write cell is used for calculating the memory address of multi-layered unit flash memory least significant bit page correspondence, data is write the memory address of described least significant bit page correspondence.
4. multi-layered unit flash memory read-write equipment as claimed in claim 3 is characterized in that, described date read-write cell specifically comprises:
Data read-write module is used to read and write current least significant bit page;
First judge module is used to judge whether the read-write of described current least significant bit page is finished;
The memory address computing module with when the read-write of judging described current least significant bit page is finished, calculates the memory address of next least significant bit page correspondence;
Second judge module is used to judge whether the memory address of described next least significant bit page correspondence is the memory address of last least significant bit page correspondence of storage block, is then to finish read-write, otherwise the log-on data module for reading and writing.
5. the memory device based on multi-layered unit flash memory is characterized in that, described memory device comprises the multi-layered unit flash memory read-write equipment, and described device comprises:
Date read-write cell is used for calculating the memory address of multi-layered unit flash memory least significant bit page correspondence, data is write the memory address of described least significant bit page correspondence.
6. memory device as claimed in claim 5 is characterized in that, described memory device is USB flash disk, solid state hard disc and digital code player.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201010144789XA CN102214481A (en) | 2010-04-06 | 2010-04-06 | Multi-level cell flash memory reading-writing method and device and storage device |
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| CN201010144789XA CN102214481A (en) | 2010-04-06 | 2010-04-06 | Multi-level cell flash memory reading-writing method and device and storage device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101123116A (en) * | 2006-08-09 | 2008-02-13 | 安国国际科技股份有限公司 | Storage device and read-write method thereof |
| CN101425338A (en) * | 2007-10-29 | 2009-05-06 | 群联电子股份有限公司 | Writing method of nonvolatile memory and controller using the same |
| US20100017561A1 (en) * | 2008-07-18 | 2010-01-21 | Xueshi Yang | Selectively accessing memory |
| CN101676886A (en) * | 2008-09-17 | 2010-03-24 | 慧国(上海)软件科技有限公司 | Flash memory device and method for writing data thereto |
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- 2010-04-06 CN CN201010144789XA patent/CN102214481A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101123116A (en) * | 2006-08-09 | 2008-02-13 | 安国国际科技股份有限公司 | Storage device and read-write method thereof |
| CN101425338A (en) * | 2007-10-29 | 2009-05-06 | 群联电子股份有限公司 | Writing method of nonvolatile memory and controller using the same |
| US20100017561A1 (en) * | 2008-07-18 | 2010-01-21 | Xueshi Yang | Selectively accessing memory |
| CN101676886A (en) * | 2008-09-17 | 2010-03-24 | 慧国(上海)软件科技有限公司 | Flash memory device and method for writing data thereto |
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Application publication date: 20111012 |