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CN102280553A - Flip-chip Light Emitting Diode (LED) crystal grain and crystal grain array thereof - Google Patents

Flip-chip Light Emitting Diode (LED) crystal grain and crystal grain array thereof Download PDF

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CN102280553A
CN102280553A CN2010102028840A CN201010202884A CN102280553A CN 102280553 A CN102280553 A CN 102280553A CN 2010102028840 A CN2010102028840 A CN 2010102028840A CN 201010202884 A CN201010202884 A CN 201010202884A CN 102280553 A CN102280553 A CN 102280553A
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flip
layer
doped semiconductor
type doped
chip
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杨秋忠
林苏宏
黄建盛
沈志秋
许明华
杨凯任
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杨秋忠
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Abstract

The invention discloses a crystal grain of a flip-chip light-emitting diode and a crystal grain array thereof. The second type doped semiconductor layer is laid on the bottom surface of the first type doped semiconductor layer, the first electrode layer is laid on the bottom surface of the first type doped semiconductor layer and does not contact with the second type doped semiconductor layer, and the first electrode layer has an exposed area for directly coating a conductive bonding agent. The second electrode layer is laid on the bottom surface of the second type doped semiconductor layer and has an exposed area for directly coating the conductive bonding agent. The insulating layer is positioned between the first electrode layer and the second electrode layer so as to electrically isolate and support the first electrode layer and the second electrode layer.

Description

覆晶发光二极管晶粒及其晶粒阵列Flip Chip Light Emitting Diode Die and Die Array

技术领域 technical field

本发明是有关于一种发光二极管,且特别是有关于一种覆晶发光二极管。The present invention relates to a light-emitting diode, and in particular to a flip-chip light-emitting diode.

背景技术 Background technique

请参考图1,图1是已知的覆晶(flip chip)发光二极管封装制程的步骤流程图。传统的覆晶发光二极管制程包括至少七个步骤:首先,如步骤101所示,将晶圆(wafer)上的多个晶粒(die)110以扩晶技术取出。接下来,如步骤102所示,以一第一机器手臂210及其真空吸嘴211取下晶粒;如步骤103所示,第一机器手臂210翻转晶粒110;如步骤104所示,晶粒110被翻转后交由一第二机器手臂220及其真空吸嘴221接手。当然,另一种可行的做法是采用蓝膜翻转技术来实现上述过程。然后,如步骤105所示,将晶粒110上的金属突球(Bump)111精准定位在一覆晶转接板(Board)120上的导电接点121。之后,如步骤106所示,以微波等方式加热金属突球111,使晶粒110与覆晶转接板120电性连接。最后,如步骤107所示,利用点胶技术封装晶粒110与覆晶转接板120间的空隙,至此完成一芯片(chip)130的封装制作;此外,芯片130通常还需要再进行一次烘烤,以固化点胶时填充的材料。至此,芯片130方为一可直接使用的产品;使用时,芯片130是利用覆晶转接板120上预设的导电结构,与一电路板上的电路再进行电性连接。Please refer to FIG. 1 . FIG. 1 is a flowchart of steps of a known flip chip (flip chip) LED packaging process. The conventional flip-chip LED manufacturing process includes at least seven steps: First, as shown in step 101 , a plurality of die 110 on the wafer is taken out by the die expansion technology. Next, as shown in step 102, a first robotic arm 210 and its vacuum suction nozzle 211 are used to remove the die; as shown in step 103, the first robotic arm 210 turns over the die 110; as shown in step 104, the die is After the grain 110 is turned over, it is handed over to a second robot arm 220 and its vacuum suction nozzle 221 . Of course, another feasible method is to use the blue film flipping technology to realize the above process. Then, as shown in step 105 , the metal bumps 111 on the die 110 are precisely positioned on the conductive contacts 121 on a flip-chip interposer (Board) 120 . Afterwards, as shown in step 106 , the metal bump 111 is heated by means of microwaves or the like, so that the die 110 is electrically connected to the flip-chip interposer 120 . Finally, as shown in step 107, the gap between the die 110 and the flip-chip interposer 120 is encapsulated by dispensing technology, so far the packaging of a chip (chip) 130 is completed; in addition, the chip 130 usually needs to be baked again. Bake to cure the filling material when dispensing. So far, the chip 130 is a product that can be used directly; when in use, the chip 130 is electrically connected to a circuit on a circuit board by using the preset conductive structure on the flip-chip interposer 120 .

发明内容 Contents of the invention

因此,本发明的目的在于提供一种覆晶发光二极管晶粒及其晶粒阵列,以免除芯片的封装制程。Therefore, the object of the present invention is to provide a flip-chip light-emitting diode chip and its chip array, which avoids the packaging process of the chip.

根据本发明一目的,提出一种覆晶发光二极管晶粒,包括一第一型掺杂半导体层、一第二型掺杂半导体层、一第一电极层、一第二电极层及一绝缘层。第二型掺杂半导体层铺设于第一型掺杂半导体层的底面,第一电极层铺设于第一型掺杂半导体层的底面且不接触第二型掺杂半导体层,而且具有一裸露面积以供直接涂布一导电接合剂。第二电极层铺设于第二型掺杂半导体层的底面,且具有一裸露面积以供直接涂布导电接合剂。绝缘层则位于第一电极层与第二电极层间,以电性隔离且支撑第一电极层与第二电极层。According to an object of the present invention, a flip-chip light-emitting diode grain is proposed, including a first-type doped semiconductor layer, a second-type doped semiconductor layer, a first electrode layer, a second electrode layer and an insulating layer . The second type doped semiconductor layer is laid on the bottom surface of the first type doped semiconductor layer, the first electrode layer is laid on the bottom surface of the first type doped semiconductor layer and does not contact the second type doped semiconductor layer, and has an exposed area For direct coating of a conductive adhesive. The second electrode layer is laid on the bottom surface of the second-type doped semiconductor layer, and has an exposed area for direct coating of conductive bonding agent. The insulating layer is located between the first electrode layer and the second electrode layer to electrically isolate and support the first electrode layer and the second electrode layer.

根据本发明又一目的,提出一种覆晶发光二极管晶粒阵列,包括多个前述的覆晶发光二极管晶粒,以及一金属图案层。金属图案层用以对每一个覆晶发光二极管晶粒里面的第一电极层与第二电极层进行选择性电性连接,以串并联这些覆晶发光二极管晶粒。According to yet another object of the present invention, a flip-chip LED die array is provided, comprising a plurality of the aforementioned flip-chip LED dies and a metal pattern layer. The metal pattern layer is used for selectively electrically connecting the first electrode layer and the second electrode layer in each flip-chip LED grain, so as to connect the flip-chip LED grains in series and parallel.

值得注意的是,根据本发明其它实施方式,当导电接合剂选用银胶时,上述的裸露面积须至少625平方微米,以供直接涂布。当导电接合剂选用锡膏时,上述的裸露面积须至少10000平方微米,以供直接涂布。此外,在覆晶发光二极管晶粒的细部结构上,还可铺设一金属反射层于第二型掺杂半导体层与第二电极层间;铺设一布拉格反射结构于金属反射层与第二型掺杂半导体层间;以及,铺设一透光覆盖层于第一型掺杂半导体层的顶面。承上所述,在覆晶发光二极管晶粒的细部结构上,还可设计一粗化结构于透光覆盖层的外表面与第一型掺杂半导体层的侧表面。此外,透光覆盖层可为一图案化蓝宝石基板。It is worth noting that, according to other embodiments of the present invention, when silver glue is used as the conductive adhesive, the above-mentioned bare area must be at least 625 square microns for direct coating. When solder paste is used as the conductive bonding agent, the above exposed area must be at least 10,000 square microns for direct coating. In addition, on the detailed structure of the flip-chip LED grain, a metal reflective layer can also be laid between the second-type doped semiconductor layer and the second electrode layer; a Bragg reflective structure can be laid between the metal reflective layer and the second-type doped semiconductor layer. between the doped semiconductor layers; and laying a light-transmitting cover layer on the top surface of the first-type doped semiconductor layer. Based on the above, on the detailed structure of the flip-chip LED grain, a roughening structure can also be designed on the outer surface of the light-transmitting cover layer and the side surface of the first-type doped semiconductor layer. In addition, the transparent covering layer can be a patterned sapphire substrate.

因此,上述诸实施方式的覆晶发光二极管晶粒及其阵列,可在晶圆制造过程上,即实现可直接被使用的完整成品;因而省略传统覆晶发光二极管封装制程的所有步骤;无论在设备上、成本上与耗时上,皆展现长足的进步。Therefore, the flip-chip light-emitting diode die and its array in the above-mentioned various embodiments can realize a complete finished product that can be used directly in the wafer manufacturing process; therefore, all steps of the traditional flip-chip light-emitting diode packaging process are omitted; no matter in Great progress has been made in terms of equipment, cost and time-consuming.

附图说明 Description of drawings

为让本发明的上述和其它目的、特征、优点与实施例能更明显易懂,所附附图的说明如下:In order to make the above and other objects, features, advantages and embodiments of the present invention more comprehensible, the accompanying drawings are described as follows:

图1是已知的覆晶发光二极管芯片封装制程的步骤流程图;FIG. 1 is a flow chart of steps of a known flip-chip LED chip packaging process;

图2是本发明一实施方式的覆晶发光二极管晶粒的结构示意图;2 is a schematic structural view of a flip-chip light-emitting diode grain according to an embodiment of the present invention;

图3A是本发明另一实施方式的覆晶发光二极管晶粒的结构示意图;3A is a schematic structural view of a flip-chip light-emitting diode grain according to another embodiment of the present invention;

图3B是本发明又一实施方式的覆晶发光二极管晶粒的结构示意图;3B is a schematic structural view of a flip-chip light-emitting diode grain according to another embodiment of the present invention;

图3C是本发明再一实施方式的覆晶发光二极管晶粒的结构示意图;FIG. 3C is a schematic structural view of a flip-chip light-emitting diode grain according to another embodiment of the present invention;

图4是本发明一实施方式的覆晶发光二极管晶粒阵列的结构示意图;4 is a schematic structural view of a flip-chip light-emitting diode die array according to an embodiment of the present invention;

图5是图3A的覆晶发光二极管晶粒的详细结构示意图;FIG. 5 is a schematic diagram of the detailed structure of the flip-chip light-emitting diode grain in FIG. 3A;

图6是图3A的覆晶发光二极管晶粒的详细结构示意图。FIG. 6 is a schematic diagram of the detailed structure of the flip-chip LED die in FIG. 3A .

【主要组件符号说明】[Description of main component symbols]

101-107:步骤                    110:已知的覆晶发光二极管晶粒101-107: Steps 110: Known Flip Chip LED Dies

111:金属突球                    121:导电接点111: Metal bump 121: Conductive contact

120:覆晶转接板                  210:第一机器手臂120: Flip chip adapter board 210: The first robot arm

130:已知的覆晶发光二极管芯片    211、221:真空吸嘴130: Known flip-chip light-emitting diode chips 211, 221: Vacuum nozzle

220:第二机器手臂220: Second robot arm

300、310、320、330、401:覆晶发光二极管晶粒300, 310, 320, 330, 401: flip-chip light-emitting diode die

301:第一型掺杂半导体层301: first type doped semiconductor layer

302:第二型掺杂半导体层          303:第一电极层302: The second type doped semiconductor layer 303: The first electrode layer

304:第二电极层                  305:绝缘层304: Second electrode layer 305: Insulation layer

306:防护层                      311:透光覆盖层306: Protective layer 311: Light-transmitting covering layer

312:金属反射层                  313:布拉格反射结构312: Metal reflective layer 313: Bragg reflective structure

314:粗化结构                    315:图案314: Coarse structure 315: Pattern

400:覆晶发光二极管晶粒阵列      420:金属图案层400: Flip chip LED die array 420: Metal pattern layer

具体实施方式 Detailed ways

当年覆晶封装技术被提出来时,是为了解决传统逻辑运算芯片对于电性的过度敏感问题。举例来说,传统逻辑运算晶粒被封装成芯片时,需经打线(WireBonding),但打线会衍生额外的电感效应;故,覆晶封装技术提出以覆晶转接板来取代打线。然而,此一技术遂成既有的窠臼,而始终被沿用于覆晶发光二极管芯片的置作上。本发明的发明人基于多年实务经验及长期观察与努力,遂研究出上述技术窠臼,并配合发光二极管异于逻辑运算芯片的各种特征,终于提出本发明以一扫沉痾。When the flip-chip packaging technology was proposed, it was to solve the problem of over-sensitivity of traditional logic operation chips to electrical properties. For example, when the traditional logic operation chip is packaged into a chip, wire bonding is required, but the wire bonding will generate additional inductance effects; therefore, flip-chip packaging technology proposes to replace the wire bonding with a flip-chip interposer . However, this technology has become an existing stereotype, and has always been used in the placement of flip-chip light-emitting diode chips. Based on many years of practical experience and long-term observation and hard work, the inventor of the present invention has studied the above-mentioned technical stereotypes, and combined with the various characteristics of light-emitting diodes that are different from logic operation chips, finally proposed the present invention to eliminate serious illnesses.

请参考图2,图2是本发明一实施方式的覆晶发光二极管晶粒的结构示意图。图2中,本实施方式的覆晶发光二极管晶粒300包括一第一型掺杂半导体层301、一第二型掺杂半导体层302、一第一电极层303、一第二电极层304及一绝缘层305。第二型掺杂半导体层302铺设于第一型掺杂半导体层301的底面,第一电极层303铺设于第一型掺杂半导体层301的底面且不接触第二型掺杂半导体层302,而且具有一裸露面积以供直接涂布一导电接合剂。第二电极层304铺设于第二型掺杂半导体层302的底面,且具有一裸露面积以供直接涂布导电接合剂。绝缘层305则位于第一电极层303与第二电极层304间,以电性隔离且支撑第一电极层303与第二电极层304。Please refer to FIG. 2 . FIG. 2 is a schematic structural diagram of a flip-chip light-emitting diode die according to an embodiment of the present invention. In FIG. 2 , the flip-chip light-emitting diode die 300 of this embodiment includes a first-type doped semiconductor layer 301 , a second-type doped semiconductor layer 302 , a first electrode layer 303 , a second electrode layer 304 and An insulating layer 305 . The second type doped semiconductor layer 302 is laid on the bottom surface of the first type doped semiconductor layer 301, the first electrode layer 303 is laid on the bottom surface of the first type doped semiconductor layer 301 and does not contact the second type doped semiconductor layer 302, And there is an exposed area for directly coating a conductive bonding agent. The second electrode layer 304 is laid on the bottom surface of the second-type doped semiconductor layer 302 and has an exposed area for direct coating of conductive bonding agent. The insulating layer 305 is located between the first electrode layer 303 and the second electrode layer 304 to electrically isolate and support the first electrode layer 303 and the second electrode layer 304 .

其中,为了在晶圆制程上实现长条状直立的第一电极层303,以利用其侧面面积增加整体裸露面积,而供直接涂布导电接合剂,本实施方式利用绝缘层305来支撑第一电极层303,使其在制作过程中不会崩塌(Peeling),且在成品时更为牢固,不至于因外力而弯曲接触第二电极层304造成短路。另一方面,当第一电极层303与第二电极层304皆具有相当大的体积时,两者可能产生电弧而短路;故,绝缘层305可隔离第一电极层303与第二电极层304以防止短路。此外,虽然绝缘层305、第一电极层303与第二电极层304势必产生电容效应;但其对于以发光为目的的覆晶发光二极管晶粒300而言,却不构成危害;反之,大范围裸露面积的第一电极层303与第二电极层304有利于散热,以对抗发光二极管所真正在乎的光衰问题。Among them, in order to realize the elongated upright first electrode layer 303 on the wafer manufacturing process, so as to use its side area to increase the overall exposed area for direct coating of conductive adhesive, the insulating layer 305 is used to support the first electrode layer 303 in this embodiment. The electrode layer 303 prevents it from collapsing (Peeling) during the manufacturing process, and is more firm in the finished product, so as not to bend and contact the second electrode layer 304 due to external force to cause a short circuit. On the other hand, when both the first electrode layer 303 and the second electrode layer 304 have a relatively large volume, the two may generate an arc and short circuit; therefore, the insulating layer 305 can isolate the first electrode layer 303 and the second electrode layer 304 to prevent short circuits. In addition, although the insulating layer 305, the first electrode layer 303 and the second electrode layer 304 will inevitably produce a capacitive effect; but it does not constitute a hazard to the flip-chip LED die 300 for the purpose of emitting light; on the contrary, a large-scale The exposed area of the first electrode layer 303 and the second electrode layer 304 is good for heat dissipation, so as to fight against the problem of light attenuation which is really concerned by the LED.

值得注意的是,若要直接涂布银胶以作为导电接合剂,第一电极层303与第二电极层304的裸露面积为25微米(micro meter)乘25微米以上;若要直接涂布锡膏以作为导电接合剂,第一电极层303与第二电极层304的裸露面积为100微米乘100微米以上。此外,第一型掺杂半导体层301可为一p型半导体层,且第二型掺杂半导体层302可为一n型半导体层,或反之亦可。半导体层的材料可为铝砷化镓、砷化镓磷化物、磷化镓、磷化铟镓铝、磷化铟镓铝、铟氮化镓、氮化镓、铝磷化镓、硒化锌、碳化硅等材料。It is worth noting that if silver glue is to be directly coated as a conductive bonding agent, the exposed area of the first electrode layer 303 and the second electrode layer 304 is 25 micrometers (micrometer) by more than 25 micrometers; The paste is used as a conductive bonding agent, and the exposed area of the first electrode layer 303 and the second electrode layer 304 is more than 100 microns by 100 microns. In addition, the first-type doped semiconductor layer 301 can be a p-type semiconductor layer, and the second-type doped semiconductor layer 302 can be an n-type semiconductor layer, or vice versa. The material of the semiconductor layer can be aluminum gallium arsenide, gallium arsenide phosphide, gallium phosphide, indium gallium aluminum phosphide, indium gallium aluminum phosphide, indium gallium nitride, gallium nitride, aluminum gallium phosphide, zinc selenide , silicon carbide and other materials.

请一并参考图3A、图3B及图3C,其皆是本发明三种实施方式的覆晶发光二极管晶粒的结构示意图。其是在晶圆制程阶段,在晶粒上设置可直接被使用的大电极结构,进而免除传统晶粒被封装成芯片的后段制程。图3A中,第二电极层304可先被大范围地设置在第二型掺杂半导体层302上;当第一电极层303所能应用的侧面积仍可能不足以直接沾粘导电接合剂时,绝缘层305可部分覆盖在第二电极层304上,第一电极层303再朝第二电极层304方向铺设于绝缘层305上。图3B中,第一电极层303与第二电极层304皆可进行两阶段的制作;亦即先以传统制程分别实现两金属层于第一型掺杂半导体层301与第二型掺杂半导体层302上,再增加晶圆制程形成绝缘层305以及两个大电极于两金属层上,以分别完成第一电极层303与第二电极层304。图3C中,若担心第一电极层303与第二电极层304过于接近,可能容易短路;则可利用绝缘层305拉开第一电极层303与第二电极层304的距离。Please refer to FIG. 3A , FIG. 3B and FIG. 3C , all of which are structural schematic diagrams of flip-chip light-emitting diode dies in three embodiments of the present invention. It is a large electrode structure that can be used directly on the crystal grain during the wafer manufacturing process, thereby eliminating the post-process process of packaging the traditional crystal grain into a chip. In FIG. 3A, the second electrode layer 304 can be firstly placed on the second-type doped semiconductor layer 302 in a large area; when the applicable side area of the first electrode layer 303 may still be insufficient to directly stick the conductive adhesive The insulating layer 305 may partially cover the second electrode layer 304 , and the first electrode layer 303 is laid on the insulating layer 305 toward the direction of the second electrode layer 304 . In FIG. 3B, both the first electrode layer 303 and the second electrode layer 304 can be manufactured in two stages; that is, two metal layers are respectively realized on the first type doped semiconductor layer 301 and the second type doped semiconductor layer by conventional manufacturing processes. On the layer 302, an insulating layer 305 and two large electrodes are formed on the two metal layers by adding wafer process to complete the first electrode layer 303 and the second electrode layer 304 respectively. In FIG. 3C , if there is concern that the first electrode layer 303 and the second electrode layer 304 are too close to each other, it may be easy to short circuit; the insulating layer 305 can be used to distance the first electrode layer 303 from the second electrode layer 304 .

值得注意的是,在图3B中,覆晶发光二极管晶粒300还包括一防护层306。防护层306为一绝缘材料形成的绝缘薄膜,用以形成薄膜保护功能,以增加覆晶发光二极管晶粒300的寿命。在制程上,防护层306可利用涂布(Spin Coating)或电子枪(E-gun)等技术,形成于第一型掺杂半导体层301与第二型掺杂半导体层302的正面或侧面。It should be noted that, in FIG. 3B , the flip-chip LED die 300 also includes a protective layer 306 . The protection layer 306 is an insulating film formed of an insulating material, which is used to form a film protection function to increase the lifetime of the flip-chip LED die 300 . In terms of manufacturing process, the protective layer 306 can be formed on the front or side surfaces of the first-type doped semiconductor layer 301 and the second-type doped semiconductor layer 302 by using techniques such as spin coating or E-gun.

承上所述,图3A、图3B及图3C中的覆晶发光二极管晶粒,是在晶圆制作过程中,例如沉积、曝光、显影、蚀刻等步骤,即形成用以作为正负电极的第一电极层303与第二电极层304。然后,再经切割便可成为能够独立使用的覆晶发光二极管芯片。换句话说,传统覆晶技术的扩晶、翻转、转置、微波、点胶乃至于烘烤等封装制程所需要的设备可以被节省下来。此外,传统覆晶发光二极管的扩晶、翻转、植球、晶粒与基板的压合、注胶以及烘烤等制程步骤所耗费的时间也可被节省下来。As mentioned above, the flip-chip light-emitting diode grains in FIG. 3A, FIG. 3B and FIG. 3C are formed during the wafer fabrication process, such as deposition, exposure, development, etching and other steps, which are used as positive and negative electrodes. The first electrode layer 303 and the second electrode layer 304 . Then, after dicing, it can become flip-chip LED chips that can be used independently. In other words, the equipment required for packaging processes such as expansion, flipping, transposition, microwave, dispensing, and even baking of traditional flip-chip technology can be saved. In addition, the time spent on traditional flip-chip LEDs such as chip expansion, flipping, ball planting, die-substrate bonding, glue injection, and baking can also be saved.

请再参考图4,图4是本发明另一实施方式的覆晶发光二极管晶粒阵列的结构示意图。图4中,本实施方式的覆晶发光二极管晶粒阵列400,是在前述晶圆加工的最后阶段,再以金属层制作工艺,形成一跨晶粒401间的金属图案层402,以电性串并联多颗晶粒401。然后,各晶粒401不再切割分离,而是依其金属图案层402所定义的颗数作为一阵列(array)使用。借此,多颗覆晶发光二极管晶粒401,在晶圆阶段即已完成电性上的串并联结构,进而使其得以直接电性连接交流或直流电源。反观传统覆晶发光二极管,须先将晶粒以覆晶转接板封装成芯片,再于一额外的电路板上进行电性的串并联。Please refer to FIG. 4 again. FIG. 4 is a schematic structural diagram of a flip-chip LED die array according to another embodiment of the present invention. In FIG. 4 , the chip array 400 of flip-chip light-emitting diodes in this embodiment is formed in the final stage of the aforementioned wafer processing, and then a metal pattern layer 402 spanning between the chips 401 is formed by the metal layer manufacturing process, so as to provide electrical A plurality of dies 401 are connected in series and parallel. Then, each crystal grain 401 is no longer cut and separated, but used as an array according to the number of grains defined by its metal pattern layer 402 . In this way, the electrical series-parallel structure of the plurality of flip-chip LED dies 401 has been completed at the wafer stage, so that they can be directly electrically connected to an AC or DC power supply. In contrast to traditional flip-chip light emitting diodes, the chips must first be packaged into chips with a flip-chip interposer, and then electrically connected in series and parallel on an additional circuit board.

接下来,请再参考图5。图5是图3A的覆晶发光二极管晶粒的详细结构示意图。为了提升覆晶发光二极管晶粒310的发光效率,覆晶发光二极管晶粒301的细部结构上,还可铺设一透光覆盖层311于第一型掺杂半导体层301的顶面,以及铺设一金属反射层312于第二型掺杂半导体层302与第二电极层间。金属反射层312位于真正发光的PN接面下方,可用以将向下发散的光线反射回透光覆盖层311,亦即整体覆晶发光二极管晶粒310的发光侧。更进一步的说,亦可在覆晶发光二极管晶粒310所附着的电路板上,设计反射面以反射PN接面向下发散的光线。Next, please refer to Figure 5 again. FIG. 5 is a schematic diagram of the detailed structure of the flip-chip LED die in FIG. 3A . In order to improve the luminous efficiency of the flip-chip LED die 310, on the detailed structure of the flip-chip LED die 301, a light-transmitting cover layer 311 can also be laid on the top surface of the first-type doped semiconductor layer 301, and a The metal reflective layer 312 is between the second-type doped semiconductor layer 302 and the second electrode layer. The metal reflective layer 312 is located under the PN junction that actually emits light, and can be used to reflect the light that diverges downwards back to the light-transmitting cover layer 311 , that is, the light-emitting side of the flip-chip LED die 310 . Furthermore, it is also possible to design a reflective surface on the circuit board to which the flip-chip LED die 310 is attached to reflect the light diverging downward from the PN junction.

请再参考图6。图6亦是图3A的覆晶发光二极管晶粒的详细结构示意图。图6中,亦可铺设一布拉格反射结构(Bragg reflector)313于金属反射层与第二型掺杂半导体层间。其中,布拉格反射结构313是由两种以上介电系数不同的材料,交错排列而成。而且,各层的厚度设计为光线波长的四分之一,以构成一种四分之一波长多层系统(quarter-wave-stack multi-layered system),相当于简单的一维光子晶体。藉此,由于频率落在能隙范围内的电磁波无法穿透,布拉格反射结构313的反射率可以高达99%以上。它没有一般金属反射镜的吸收问题,又可以透过改变材料的折射率或厚度来调整能隙位置。Please refer to Figure 6 again. FIG. 6 is also a schematic diagram showing the detailed structure of the flip-chip LED die in FIG. 3A . In FIG. 6, a Bragg reflector 313 can also be laid between the metal reflective layer and the second-type doped semiconductor layer. Wherein, the Bragg reflection structure 313 is formed by two or more materials with different dielectric coefficients arranged in a staggered manner. Moreover, the thickness of each layer is designed to be a quarter of the wavelength of light to form a quarter-wave-stack multi-layered system, which is equivalent to a simple one-dimensional photonic crystal. In this way, since the electromagnetic wave whose frequency falls within the energy gap cannot penetrate, the reflectivity of the Bragg reflection structure 313 can be as high as 99%. It does not have the absorption problem of general metal mirrors, and the position of the energy gap can be adjusted by changing the refractive index or thickness of the material.

另一方面,透光覆盖层的上表面,亦即覆晶发光二极管晶粒310的背面发光侧,可设计有一粗化结构314。同理,透光覆盖层与第一型掺杂半导体层的周围侧表面,皆可设有此一粗化结构314。粗化结构314的设计原理介绍如下:On the other hand, a roughened structure 314 can be designed on the upper surface of the light-transmitting cover layer, that is, the backside emitting side of the flip-chip LED die 310 . Similarly, the roughened structure 314 can be provided on the surrounding side surfaces of the light-transmitting covering layer and the first-type doped semiconductor layer. The design principle of coarsening structure 314 is introduced as follows:

一般而言,LED半导体层的折射率约2.4,对于空气的全反射角约24.5度。LED芯片通常切割成矩形,约8%的光线可射出芯片之外,92%的光线则封闭在芯片之内转换成热。破坏全反射角可提升LED光线射出率,在芯片的表面做表面粗化的工程,可以得到提升出光率的效果。值得注意的是,LED表面粗化其表面粗度必须大于2倍波长才有明显的出光效率。非矩形的芯片外形或芯片内做细小的非矩形切割也都可提升出光效率。Generally speaking, the refractive index of the LED semiconductor layer is about 2.4, and the total reflection angle for air is about 24.5 degrees. LED chips are usually cut into rectangles, about 8% of the light can be emitted outside the chip, and 92% of the light is enclosed in the chip and converted into heat. Destroying the total reflection angle can increase the LED light output rate, and the surface roughening project on the surface of the chip can increase the light output rate. It is worth noting that the surface roughness of the LED surface must be greater than 2 times the wavelength to have a significant light extraction efficiency. Non-rectangular chip shapes or small non-rectangular cuts in chips can also improve light extraction efficiency.

此外,透光覆盖层的材质可为一蓝宝石基板(Al2O3)、磷化镓(GaP)、硅胶、玻璃或铁弗龙等透光材料。值得注意的是,当选用蓝宝石基板作为透光覆盖层时,可设计一图案315于其与第二型掺杂半导体层交界的一侧,进而形成一图案化蓝宝石基板。最后,从制程的角度来说,前述的金属反射层可与第二电极层于同一制程中同时完成。In addition, the material of the light-transmitting cover layer can be a light-transmitting material such as a sapphire substrate (Al2O3), gallium phosphide (GaP), silica gel, glass or Teflon. It should be noted that when the sapphire substrate is selected as the light-transmitting covering layer, a pattern 315 can be designed on the side where it borders the second-type doped semiconductor layer, thereby forming a patterned sapphire substrate. Finally, from the point of view of the process, the aforementioned metal reflective layer and the second electrode layer can be completed simultaneously in the same process.

综上所述,本实施方式的覆晶发光二极管,可以免去焊线机(约12万美元)或覆晶植球机(约60万美元)、固晶机或表面粘着贴片机(Surface MountingTechnology,SMT)等设备,乃至于消耗性备料与覆晶转接板的支出。在制造成本及单位时间产能上皆显著提升。In summary, the flip-chip light-emitting diode of this embodiment can eliminate the need for a wire bonding machine (about 120,000 US dollars) or a flip-chip ball planting machine (about 600,000 US dollars), a die-bonding machine or a surface mount machine (Surface MountingTechnology, SMT) and other equipment, as well as expenditures on consumable materials and flip-chip interposer boards. Both the manufacturing cost and the production capacity per unit time have been significantly improved.

虽然本发明已以诸实施方式揭露如上,然其并非用以限定本发明,任何熟悉此技艺者,在不脱离本发明的精神和范围内,当可作各种的更动与润饰,因此本发明的保护范围当视权利要求书所界定的范围为准。Although the present invention has been disclosed above with various embodiments, it is not intended to limit the present invention. Any person familiar with the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The protection scope of the invention should be determined by the scope defined in the claims.

Claims (10)

1.一种覆晶发光二极管晶粒,其特征在于,包括:1. A flip-chip light-emitting diode grain, characterized in that, comprising: 一第一型掺杂半导体层;a first type doped semiconductor layer; 一第二型掺杂半导体层,铺设于该第一型掺杂半导体层的底面;a second-type doped semiconductor layer laid on the bottom surface of the first-type doped semiconductor layer; 一第一电极层,铺设于第一型掺杂半导体层的底面且不接触该第二型掺杂半导体层,且具有一裸露面积以供直接涂布一导电接合剂;A first electrode layer laid on the bottom surface of the first-type doped semiconductor layer without contacting the second-type doped semiconductor layer, and having an exposed area for direct coating of a conductive bonding agent; 一第二电极层,铺设于第二型掺杂半导体层的底面,且具有一裸露面积以供直接涂布该导电接合剂;以及a second electrode layer laid on the bottom surface of the second-type doped semiconductor layer, and has an exposed area for directly coating the conductive bonding agent; and 一绝缘层,位于该第一电极层与该第二电极层间,以电性隔离且支撑该第一电极层与该第二电极层。An insulating layer is located between the first electrode layer and the second electrode layer to electrically isolate and support the first electrode layer and the second electrode layer. 2.根据权利要求1所述的覆晶发光二极管晶粒,其特征在于,该裸露面积为至少625平方微米,且该导电接合剂为一银胶。2 . The flip-chip light-emitting diode die according to claim 1 , wherein the exposed area is at least 625 square micrometers, and the conductive bonding agent is a silver glue. 3.根据权利要求1所述的覆晶发光二极管晶粒,其特征在于,该裸露面积为至少10000平方微米,且该导电接合剂为一锡膏。3 . The flip-chip LED die according to claim 1 , wherein the exposed area is at least 10,000 square micrometers, and the conductive bonding agent is a solder paste. 4.根据权利要求1所述的覆晶发光二极管晶粒,其特征在于,还包括一金属反射层,铺设于该第二型掺杂半导体层与该第二电极层间。4 . The flip-chip light-emitting diode die according to claim 1 , further comprising a metal reflective layer laid between the second-type doped semiconductor layer and the second electrode layer. 5.根据权利要求4所述的覆晶发光二极管晶粒,其特征在于,还包括一布拉格反射结构,位于该金属反射层与该第二型掺杂半导体层间。5 . The flip-chip LED die according to claim 4 , further comprising a Bragg reflection structure located between the metal reflection layer and the second-type doped semiconductor layer. 6.根据权利要求1所述的覆晶发光二极管晶粒,其特征在于,还包括一透光覆盖层,铺设于该第一型掺杂半导体层的顶面。6 . The flip-chip light-emitting diode die according to claim 1 , further comprising a light-transmitting cover layer laid on the top surface of the first-type doped semiconductor layer. 7.根据权利要求6所述的覆晶发光二极管晶粒,其特征在于,还包括一粗化结构,位于该透光覆盖层的外表面。7 . The flip-chip LED die according to claim 6 , further comprising a roughened structure located on the outer surface of the light-transmitting covering layer. 8.根据权利要求6所述的覆晶发光二极管晶粒,其特征在于,还包括一粗化结构,位于该第一型掺杂半导体层的侧表面。8 . The flip-chip light-emitting diode die according to claim 6 , further comprising a roughening structure located on a side surface of the first-type doped semiconductor layer. 9.根据权利要求6所述的覆晶发光二极管晶粒,其特征在于,该透光覆盖层为一图案化蓝宝石基板。9 . The flip-chip LED die according to claim 6 , wherein the light-transmitting covering layer is a patterned sapphire substrate. 10.一种覆晶发光二极管晶粒阵列,其特征在于,包括:10. A flip-chip light-emitting diode die array, characterized in that it comprises: 多个如权利要求1~9任一权利要求所述的覆晶发光二极管晶粒;以及A plurality of flip-chip light-emitting diode dies according to any one of claims 1-9; and 一金属图案层,用以对每一该些第一电极层与第二电极层进行选择性电性连接,以串并联该些覆晶发光二极管晶粒。A metal pattern layer is used for selectively electrically connecting each of the first electrode layers and the second electrode layers to connect the flip-chip light-emitting diode chips in series and parallel.
CN2010102028840A 2010-06-10 2010-06-10 Flip-chip Light Emitting Diode (LED) crystal grain and crystal grain array thereof Pending CN102280553A (en)

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Application publication date: 20111214