CN102332880A - Amplifier circuit capable of changing working modes - Google Patents
Amplifier circuit capable of changing working modes Download PDFInfo
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- CN102332880A CN102332880A CN201110208503A CN201110208503A CN102332880A CN 102332880 A CN102332880 A CN 102332880A CN 201110208503 A CN201110208503 A CN 201110208503A CN 201110208503 A CN201110208503 A CN 201110208503A CN 102332880 A CN102332880 A CN 102332880A
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- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
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Abstract
The invention relates to an amplifier circuit, which comprises an amplifier with an input end and an output end, and a frequency selection circuit and a switching circuit which are connected in series between the input end and the output end of the amplifier, wherein an external resonator circuit is connected to the input end and the output end of the amplifier; the amplifier circuit has a first working mode and a second working mode; in the first working mode, the amplifier circuit controls the switching circuit to be switched off, so that the input end of the amplifier is directly connected to the output end of the amplifier without adopting the frequency selection circuit; in the second working mode, the amplifier circuit controls the switching circuit to be switched on, so that the input end of the amplifier is connected to the output end of the amplifier through the frequency selection circuit; therefore, the frequency response capacity of the amplifier circuit in the second working mode can be changed; meanwhile, the two working modes can be changed conveniently.
Description
[technical field]
The present invention relates to electronic applications, particularly relate to and be applicable to digital electronic circuitry, for example amplifier and the pierce circuit in the integrated circuit such as microcontroller.
[background technology]
In the digital electronic system, for example be called as the microcontroller of micro controller unit (MCUs) or one chip microcomputer, use a kind of interior amplifier circuit to produce the internal clock signal.Fig. 1 is the circuit theory diagrams of existing amplifier circuit 100.Said amplifier circuit 100 comprises amplifier 1, and said amplifier 1 comprises p channel enhancement metal-oxide semiconductor fieldeffect transistor (below be called the PMOS transistor) TR1 and n channel enhancement metal-oxide semiconductor fieldeffect transistor (below be called nmos pass transistor) TR2.Said amplifier circuit 100 also comprises p channel depletion type metal-oxide semiconductor fieldeffect transistor TR3 and n channel depletion type metal-oxide semiconductor fieldeffect transistor TR4.Transistor T R1, TR2 leak the series connection of cobasis altogether; Transistor T R3 is connected between transistor T R1 and the power vd D; Transistor T R4 is connected between transistor T R2 and the ground, and both ends of power representes that with the ground symbol VDD is relatively for just with alphabetical VDD in the drawings; The grid level bias voltage of TR3 is VBP, and the grid level bias voltage of TR4 is VBN.Transistor T R3 and TR4 are the normally types.When the grid potential of transistor T R3 is high, transistor T R3 conducting, but its conducting resistance is than higher.When the grid potential of transistor T R3 was electronegative potential, transistor T R3 had lower resistance conducting.When the grid potential of transistor T R4 was electronegative potential, it had than higher resistance conducting, and when the grid potential of transistor T R4 when being high, it has lower resistance conducting.
The input 2 of said amplifier 1 is connected to the gate terminal of transistor T R1 and TR2, an end and the first outer lead IN0 of feedback resistance R1; The output 3 of said amplifier 1 is connected to the drain electrode end of transistor T R1 and TR2, the other end and the second outer lead IN1 of feedback resistance R1, and said in addition output 3 is also connected to the input of another inverter INV1.The output of said inverter INV1 is to deliver to that for example the CPU of microcontroller (CPU, not shown) is as clock signal, and said like this amplifier circuit 100 just has been used on the said microcontroller.
Said amplifier circuit 100 can be operated under two kinds of patterns.When being operated in first pattern, the first outer lead IN0 and the second outer lead IN1 are connected to external resonator circuit (as: crystal resonator), and said crystal resonator is determining the frequency of oscillation of said amplifier 1.When being operated in second pattern; Except crystal resonator is connected to the first outer lead IN0 and the second outer lead IN1; One frequency selection circuit also is connected between the first outer lead IN0 and the second outer lead IN1 of amplifier 1, thereby changes the frequency response ability of amplifier 1.
In order to encourage the crystal resonator that is applied in first pattern, the amplifier 1 of said amplifier circuit 100 will have certain frequency fan-out capability.Said amplifier 1 has the general idea of certain frequency fan-out capability to be, the operating frequency of corresponding crystal resonator, and the frequency response of amplifier 1 should have amplification to the clock signal of operating frequency, and the frequency band of inoperative frequency is had certain inhibitory action.When second pattern of application, the high-frequency responding ability of said amplifier 1 hopes to be enhanced.Like this, generally be again and connect a selected frequency circuit, the circuit branch of forming like electric capacity of a resistance series connection.
Yet, no matter how the selected frequency circuit to connect, the frequency response that the frequency response of amplifier circuit can not two kinds of patterns of simultaneous adaptation.
Therefore, be necessary to propose improved plan and overcome the problems referred to above,, thereby also improve the efficient that IC products is produced with the flexibility in the use of raising circuit.
[summary of the invention]
Therefore, one object of the present invention is to provide a kind of amplifier circuit, to improve two kinds of convenience in the switching in the mode circuits use.
According to a first aspect of the invention; The present invention provides a kind of amplifier circuit; It comprises the amplifier with input and output; Said amplifier circuit also comprises: be connected on frequency selection circuit and switching circuit between said amplifier input terminal and the output; Said amplifier circuit has first mode of operation and second mode of operation, when first mode of operation, controls said switching circuit by making said amplifier input terminal not be connected to the output of said amplifier through said frequency selection circuit; When second mode of operation, control said switching circuit conducting and make said amplifier input terminal be connected to the output of said amplifier through said frequency selection circuit.
Further, the control end that said switching circuit includes its conducting of control and ends, said control end receives a control signal.
Further; Said switching circuit is a p slot field-effect transistor and the transmission gate that the n slot field-effect transistor is formed; Said control signal is directly connected to the grid of said p slot field-effect transistor, and said control signal is connected to the grid of said n slot field-effect transistor through inverter.
Further, said frequency selection circuit comprises the resistance and the electric capacity of series connection.
Further; Said amplifier comprises a p slot field-effect transistor and the n slot field-effect transistor that common leakage cobasis connects; Wherein two transistorized grids are said amplifier input terminal, and two transistor drain are the output of said amplifier.
Further, the signal of said amplifier input terminal is via the output signal of the said amplifier circuit of pair of phase inverters generation.
Further; Said amplifier circuit also includes and the 2nd p slot field-effect transistor of p slot field-effect transistor parallel connection and the 2nd n slot field-effect transistor of connecting with a n slot field-effect transistor, the common enable signal that receives of the grid of the grid of the 2nd p slot field-effect transistor and the 2nd n slot field-effect transistor.
Further; Said amplifier circuit also includes the 2nd p slot field-effect transistor and the two n slot field-effect transistor parallelly connected with a n slot field-effect transistor of connecting with a p slot field-effect transistor, the common enable signal that receives of the grid of the grid of the 2nd p slot field-effect transistor and the 2nd n slot field-effect transistor.
Further, the external resonator circuit is connected to said amplifier input terminal and output.
Further, be connected with a feedback resistance between the said amplifier input terminal.
Compared with prior art; Amplifier circuit among the present invention is connected a frequency selection circuit in amplifier input terminal with output when second pattern; Thereby changed the rate frequency response of said amplifier circuit, thereby increased the ease of use of amplifier circuit under two kinds of mode of operations;
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention, the accompanying drawing of required use is done to introduce simply in will describing embodiment below.Wherein:
Fig. 1 is the circuit theory diagrams of existing amplifier circuit;
Fig. 2 is the circuit theory diagrams of amplifier circuit in first embodiment among the present invention; With
Fig. 3 is the amplifier circuit circuit theory diagrams in a second embodiment among the present invention.
[embodiment]
Below in conjunction with accompanying drawing and embodiment the present invention is further described.
Fig. 2 is the schematic diagram of amplifier circuit in first embodiment 200 among the present invention.Said amplifier circuit 200 includes amplifier 11.Said amplifier 11 is similar in appearance to amplifier 1 of the prior art, and it comprises PMOS transistor T R23 and nmos pass transistor TR24.Said amplifier circuit 200 also includes PMOS transistor T R5 and nmos pass transistor TR6.Transistor T R23, TR24 leak the series connection of cobasis altogether; Transistor T R5 is connected between transistor T R23 and the power vd D; Transistor T R6 is connected between transistor T R24 and the ground, and wherein VDD representes the two ends of power supply respectively with the ground symbol, and VDD is relatively for just; The grid level bias voltage of TR5 is VBP, and the grid level bias voltage of TR6 is VBN.Transistor T R5 and TR6 are the normally types.When the grid potential of transistor T R5 when being high, transistor T R5 conducting, but its conducting resistance is than higher.When the grid potential of transistor T R5 was electronegative potential, transistor T R5 had lower resistance conducting.When the grid potential of transistor T R6 was electronegative potential, it had than higher resistance conducting, and when the grid potential of transistor T R6 when being high, it has lower resistance conducting.
The grid of transistor T R23 and TR24 is the input 12 of said amplifier 11, and it is connected to the first outer lead IN0.The drain electrode of transistor T R23 and TR24 is the output 13 of said amplifier 11, and it is connected to the second outer lead IN1.Said output 13 is also connected to another inverter INV2 similar with the inverter INVI of Fig. 1.Similar in appearance to feedback resistance R1 of the prior art, feedback resistance R21 is connected between the first outer lead IN0 and the second outer lead IN1.
Said amplifier circuit 200 also includes frequency selection circuit and the switching circuit that is connected between the first outer lead IN0 and the second outer lead IN1.In this embodiment; Said frequency selection circuit is the resistance R 2 and capacitor C 2 of series connection; Said switching circuit is a transmission gate 14; One termination, the first outer lead IN0 of wherein said resistance R 2, a link of the said transmission gate 14 of a termination of capacitor C 2, another of said transmission gate 14 connects the termination second outer lead IN1.Said transmission gate 14 is composed in parallel by PMOS transistor T R7 and nmos pass transistor TR8; When the grid current potential of transistor T R7 is that the grid current potential of electronegative potential and transistor T R8 is when being high; These two all conductings of transistor; When the grid current potential of transistor T R7 is high, and the grid current potential of transistor T R8 is when being electronegative potential, and this two transistor all turn-offs.
Control signal (CONT) is directly connected to the grid of transistor T R7, and this control signal (CONT) is sent to the grid of transistor T R8 after inverter INV3 anti-phase.
When in microcontroller, adopting said amplifier circuit 200, can produce control signal (CONT) through software set or the clear flag position that makes said microcontroller.
In this embodiment, said amplifier circuit 200 can be operated under first pattern and second pattern.
When being operated in first pattern; Outer crystal resonator (not shown) is connected to the first outer lead IN0 and the second outer lead IN1; Said flag bit is set so that make control signal CONT for high; This moment, transmission gate 14 ended, and said frequency selection circuit is removed between the first outer lead IN0 and the second outer lead IN1.Under this pattern, first embodiment moves with the mode substantially the same with the existing amplifier circuit of Fig. 1.
When being operated in second pattern; Outer crystal resonator is connected to the first outer lead IN0 and the second outer lead IN1; It is low removing said flag bit so that make control signal CONT; Transmission gate 14 conductings this moment, thus said frequency selection circuit is connected between the first outer lead IN0 and the second outer lead IN1, thus the frequency response ability of change amplifier 11.
Fig. 3 is the circuit theory diagrams of amplifier circuit in second embodiment 300 among the present invention.Said amplifier circuit 300 comprises the amplifier 21 of the amplifier 11 in first embodiment; It comprises PMOS transistor T R10 and nmos pass transistor TR11; Their grid 22 is connected to the first outer lead IN0, and their drain electrode 23 is connected to the second outer lead IN1.The output of said amplifier circuit 300 is inverter INV4 and INV5 to be produced via another from the signal of the input 22 of amplifier 21.Similar in appearance to feedback resistance R1 of the prior art, feedback resistance R31 is connected between the first outer lead IN0 and the second outer lead IN1.
Said amplifier circuit 300 also includes enable circuits, and it comprises PMOS transistor T R12 and nmos pass transistor TR13.Transistor T R12 and TR10 are connected in parallel, and between the output 23 of VDD and amplifier 21.Transistor T R13 and TR11 are connected in series, and between the output 23 and ground of amplifier 21.Enable signal EN is connected to the grid of transistor T R12 and TR13.At enable signal when low, said transistor T R12 conducting, said transistor T R13 ends, the output 23 of said amplifier 21 is locked into high level, said amplifier 21 is in the disable state.When being high, said transistor T R12 ends at enable signal, said transistor T R13 conducting, the amplifier 1 the same enabled that is among the output 23 of said amplifier 21 and Fig. 1.
Said amplifier circuit 300 also includes frequency selection circuit and the switching circuit between the first outer lead IN0 and the second outer lead IN1 that be connected in first embodiment.In this embodiment, said frequency selection circuit is the resistance R 2 and capacitor C 2 of series connection, said switching circuit be with first embodiment in the similar transmission gate 24 of transmission gate 14.Said transmission gate 24 is composed in parallel by PMOS transistor T R15 and nmos pass transistor TR14; When the grid current potential of transistor T R15 is that the grid current potential of electronegative potential and transistor T R14 is when being high; These two all conductings of transistor; When the grid current potential of transistor T R15 is high, and the grid current potential of transistor T R14 is when being electronegative potential, and this two transistor all turn-offs.
The switching of two kinds of patterns of said amplifier circuit 300 circuit is by control signal (CONT) control, and this control signal is sent to grid and the inverter 1NV6 of transistor T R15.Be sent to the grid of transistor T R14 by the control signal after the anti-phase of inverter INV6 output.
In first mode of operation; Enable signal (EN) is high, and transistor T R12 is turned off, and transistor T R13 is switched on; Outer crystal resonator is connected to the first outer lead IN0 and the second outer lead IN1; Control signal (CONT) is high, and transistor T R14 and TR15 are turned off, and said frequency selection circuit is removed between the first outer lead IN0 and the second outer lead IN1.In this mode of operation, the mode substantially the same with the existing amplifier circuit of Fig. 1 moved.
In second mode of operation, enable signal (EN) is high, and transistor T R12 is turned off, and transistor T R13 is switched on, and outer crystal resonator is connected to the first outer lead IN0 and the second outer lead IN1.Control signal CONT is low, and transistor T R14 and TR15 are switched on.The pass of circuitous resistance R2 and capacitor C 2 is gone into said amplifier circuit.In this mode of operation, changed the frequency response ability of amplifier 21.
The above embodiments can change with many modes.For example, control signal (CONT) and control signal (EN) can produce through input at another outer lead, rather than are produced by flag bit.The polarity of control signal can be turned around.The output signal of first embodiment can be as second embodiment, from input 12 generations of amplifier 11.In two embodiment; Said switching circuit can not be a transmission gate, and other forms of switch, such as switching transistor or MEMS (Micro Electro Mechanical Systems) switch; Relay etc.; Said frequency selection circuit also can be the circuit of other form, such as inductance and capacitances in series or the frequency selection circuit that composes in parallel, the frequency selection circuit that resistance and electric capacity compose in parallel etc.In a second embodiment; When enable signal EN is disable; The output 23 of amplifier 21 can remain on low level rather than high level; Way is that transistor T R12 and transistor T R10 are connected in series, and transistor T R13 and transistor T R11 is connected in parallel, and noninverting control signal is provided for the grid of transistor T R12 and TR13.
The implication of " connection " among this paper comprises direct connection, connects or other conspicuous connected modes indirectly.
Above-mentioned explanation has fully disclosed embodiment of the present invention.It is pointed out that any change that technical staff's specific embodiments of the invention of being familiar with this field is done does not all break away from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.
Claims (10)
1. amplifier circuit, it comprises the amplifier with input and output, it is characterized in that, said amplifier circuit also comprises:
Be connected on frequency selection circuit and switching circuit between said amplifier input terminal and the output,
Said amplifier circuit has first mode of operation and second mode of operation,
When first mode of operation, control said switching circuit by making said amplifier input terminal not be connected to the output of said amplifier through said frequency selection circuit,
When second mode of operation, control said switching circuit conducting and make said amplifier input terminal be connected to the output of said amplifier through said frequency selection circuit.
2. amplifier circuit according to claim 1 is characterized in that: the control end that said switching circuit includes its conducting of control and ends, said control end receives a control signal.
3. amplifier circuit according to claim 2; It is characterized in that: said switching circuit is a p slot field-effect transistor and the transmission gate that the n slot field-effect transistor is formed; Said control signal is directly connected to the grid of said p slot field-effect transistor, and said control signal is connected to the grid of said n slot field-effect transistor through inverter.
4. amplifier circuit according to claim 1 is characterized in that: said frequency selection circuit comprises the resistance and the electric capacity of series connection.
5. according to the arbitrary described amplifier circuit of claim 1-4; It is characterized in that: said amplifier comprises a p slot field-effect transistor and the n slot field-effect transistor that common leakage cobasis connects; Wherein two transistorized grids are said amplifier input terminal, and two transistor drain are the output of said amplifier.
6. amplifier circuit according to claim 5 is characterized in that: the signal of said amplifier input terminal is via the output signal of the said amplifier circuit of pair of phase inverters generation.
7. amplifier circuit according to claim 5; It is characterized in that: said amplifier circuit also includes and the 2nd p slot field-effect transistor of p slot field-effect transistor parallel connection and the 2nd n slot field-effect transistor of connecting with a n slot field-effect transistor
The common enable signal that receives of the grid of the grid of the 2nd p slot field-effect transistor and the 2nd n slot field-effect transistor.
8. amplifier circuit according to claim 5; It is characterized in that: said amplifier circuit also includes the 2nd p slot field-effect transistor and the two n slot field-effect transistor parallelly connected with a n slot field-effect transistor of connecting with a p slot field-effect transistor
The common enable signal that receives of the grid of the grid of the 2nd p slot field-effect transistor and the 2nd n slot field-effect transistor.
9. amplifier circuit according to claim 5 is characterized in that: the external resonator circuit is connected to said amplifier input terminal and output.
10. amplifier circuit according to claim 5 is characterized in that: be connected with a feedback resistance between the said amplifier input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110208503A CN102332880A (en) | 2011-07-25 | 2011-07-25 | Amplifier circuit capable of changing working modes |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110208503A CN102332880A (en) | 2011-07-25 | 2011-07-25 | Amplifier circuit capable of changing working modes |
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| CN102332880A true CN102332880A (en) | 2012-01-25 |
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| CN201110208503A Pending CN102332880A (en) | 2011-07-25 | 2011-07-25 | Amplifier circuit capable of changing working modes |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010032495A1 (en) * | 2000-04-21 | 2001-10-25 | Kunio Ueno | Particle signal processing apparatus and particle measurement apparatus using same |
| CN101087129A (en) * | 2007-07-10 | 2007-12-12 | 中国人民解放军国防科学技术大学 | Full-speed pseudo random sequence generator using half speed clock |
| JP2009088584A (en) * | 2007-09-27 | 2009-04-23 | Tdk Corp | Amplifier circuit and optical pickup having the same |
| CN101714863A (en) * | 2008-09-29 | 2010-05-26 | 恩益禧电子股份有限公司 | Oscillation circuit and method of controlling same |
-
2011
- 2011-07-25 CN CN201110208503A patent/CN102332880A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010032495A1 (en) * | 2000-04-21 | 2001-10-25 | Kunio Ueno | Particle signal processing apparatus and particle measurement apparatus using same |
| CN101087129A (en) * | 2007-07-10 | 2007-12-12 | 中国人民解放军国防科学技术大学 | Full-speed pseudo random sequence generator using half speed clock |
| JP2009088584A (en) * | 2007-09-27 | 2009-04-23 | Tdk Corp | Amplifier circuit and optical pickup having the same |
| CN101714863A (en) * | 2008-09-29 | 2010-05-26 | 恩益禧电子股份有限公司 | Oscillation circuit and method of controlling same |
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Application publication date: 20120125 |