CN102340933B - How to make a circuit board - Google Patents
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- CN102340933B CN102340933B CN 201010235271 CN201010235271A CN102340933B CN 102340933 B CN102340933 B CN 102340933B CN 201010235271 CN201010235271 CN 201010235271 CN 201010235271 A CN201010235271 A CN 201010235271A CN 102340933 B CN102340933 B CN 102340933B
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- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
技术领域 technical field
本发明涉及电路板技术领域,特别涉及一种厚度较小的电路板的制作方法。The invention relates to the technical field of circuit boards, in particular to a method for manufacturing a circuit board with a small thickness.
背景技术 Background technique
印刷电路板(Printed Circuit Board,PCB)作为各种电子元件的载体广泛应用于各种电子产品的封装。随着电子产品沿着轻、薄、短、小、省电的趋势不断发展,印刷电路板的制作工艺也面临更大的挑战。Printed Circuit Board (PCB), as the carrier of various electronic components, is widely used in the packaging of various electronic products. With the continuous development of electronic products along the trend of being light, thin, short, small, and power-saving, the manufacturing process of printed circuit boards is also facing greater challenges.
为减小电子产品的厚度,用于制作双面电路板的柔性覆铜基材的厚度已从100微米降低至36微米,这一发展给电路板制作的各个步骤均带来不便。尤其是经历多次涂布光致抗蚀剂、曝光显影、蚀刻、光致抗蚀剂层去除及电镀等湿制程后,柔性覆铜基材会出现严重的压折伤。另外,在电镀工序,柔性覆铜基材极易从治具上脱落至电镀槽底,而导致产品报废。在选择性电镀,即,在柔性覆铜基材的一个表面贴附干膜,仅对另一表面进行电镀,所得产品还会发生卷曲,给剥膜带来困难,卷曲严重的,整个电路板将报废。又如,在蚀刻柔性覆铜基材以形成外层线路后,所得产品皱褶严重。以上现象均不利于提高生产效率或产品良率。To reduce the thickness of electronic products, the thickness of flexible copper-clad substrates used to make double-sided circuit boards has been reduced from 100 microns to 36 microns, a development that has brought inconvenience to all steps of circuit board manufacturing. Especially after multiple wet processes such as coating photoresist, exposure and development, etching, removal of photoresist layer, and electroplating, the flexible copper-clad substrate will suffer from severe crush damage. In addition, during the electroplating process, the flexible copper-clad substrate is easily detached from the jig to the bottom of the electroplating tank, resulting in scrapped products. In selective electroplating, that is, attaching a dry film to one surface of a flexible copper-clad substrate, and electroplating only the other surface, the resulting product will also curl, which will make it difficult to peel off the film. If the curl is severe, the entire circuit board will be scrapped. As another example, after etching the flexible copper-clad substrate to form the outer layer circuit, the resulting product is severely wrinkled. The above phenomena are not conducive to improving production efficiency or product yield.
发明内容 Contents of the invention
因此,有必要提供一种电路板的制作方法,以提高生产效率及产品良率。Therefore, it is necessary to provide a method for manufacturing a circuit board to improve production efficiency and product yield.
一种电路板的制作方法,包括步骤:提供两个电路基板,每个电路基板均包括中间层和分别形成于所述中间层两侧的第一导电层和第二导电层,每个电路基板均包括加工区和环绕连接所述加工区的边缘区;提供一个粘接片,其具有与所述加工区相对应的开口;将所述粘接片压合于所述两个电路基板之间以形成压合板,所述两个电路基板的加工区中的第二导电层均暴露于所述开口;将所述压合板的两个第一导电层均制作成第一导电线路;以及切割去除所述压合板中与所述电路基板的边缘区对应的区域,从而得到两个分离的电路板。A method for manufacturing a circuit board, comprising the steps of: providing two circuit substrates, each circuit substrate including an intermediate layer and a first conductive layer and a second conductive layer respectively formed on both sides of the intermediate layer, each circuit substrate Each includes a processing area and an edge area surrounding and connecting the processing area; providing an adhesive sheet with an opening corresponding to the processing area; pressing the adhesive sheet between the two circuit substrates To form a laminated board, the second conductive layers in the processed areas of the two circuit substrates are exposed to the opening; the two first conductive layers of the laminated board are made into first conductive lines; and cutting and removing The region corresponding to the edge region of the circuit substrate in the laminated board, thereby obtaining two separated circuit boards.
本技术方案提供的电路板的制作方法将两个电路基板与一个粘接片压合于一起制成压合板,由于所得的压合板的厚度较大,后续的湿制程均不会导致压合板出现皱褶、卷曲或报废的情况。有利于提高产品的良率。The circuit board manufacturing method provided by this technical solution presses two circuit substrates and an adhesive sheet together to form a laminated board. Since the obtained laminated board has a relatively large thickness, the subsequent wet process will not cause the laminated board to appear. Wrinkled, curled or scrapped condition. It is beneficial to improve the yield rate of the product.
附图说明 Description of drawings
图1是本技术方案实施例提供的一个电路基板的结构示意图。FIG. 1 is a schematic structural diagram of a circuit substrate provided by an embodiment of the technical solution.
图2是上述电路基板形成多个第一孔后的剖面示意图。FIG. 2 is a schematic cross-sectional view of the above-mentioned circuit substrate after forming a plurality of first holes.
图3是在上述电路基板的第二导电层制作成第二导电线路后的剖面示意图。FIG. 3 is a schematic cross-sectional view of the second conductive circuit fabricated on the second conductive layer of the circuit substrate.
图4是上述电路基板形成多个第二孔并得到盲孔后的剖面示意图。4 is a schematic cross-sectional view of the above-mentioned circuit substrate after forming a plurality of second holes and obtaining blind holes.
图5是本技术方案实施例提供的粘接片的结构示意图。Fig. 5 is a schematic structural view of the adhesive sheet provided by the embodiment of the technical solution.
图6是所得压合板的剖面示意图。Fig. 6 is a schematic cross-sectional view of the obtained pressed board.
图7是在上述压合板的盲孔的孔壁形成孔壁导电层后的剖面示意图。FIG. 7 is a schematic cross-sectional view after forming a conductive layer on the hole wall of the blind hole of the above-mentioned laminated board.
图8是在上述压合板的两个第一导电层上均形成导电镀层后的剖面示意图。FIG. 8 is a schematic cross-sectional view after conductive plating layers are formed on the two first conductive layers of the above-mentioned laminated board.
图9是将上述压合板的两个第一导电层均制作成第一导电线路后的剖面示意图。FIG. 9 is a schematic cross-sectional view after the two first conductive layers of the above-mentioned laminated board are fabricated into first conductive circuits.
图10是去除上述压合板的边缘区,得到的一个电路基板的剖面示意图。FIG. 10 is a schematic cross-sectional view of a circuit substrate obtained by removing the edge region of the above-mentioned laminated board.
图11是上述电路基板的两侧分别形成第一覆盖层和第二覆盖层后的剖面示意图。FIG. 11 is a schematic cross-sectional view of the two sides of the above-mentioned circuit substrate after the first covering layer and the second covering layer are respectively formed.
图12去除上述电路基板的连接区,得到的一个电路板单元的剖面示意图。FIG. 12 is a schematic cross-sectional view of a circuit board unit obtained by removing the connection area of the above circuit substrate.
主要元件符号说明Description of main component symbols
电路基板 10
中间层 11
第一导电层 12The first
第一孔 120The
第一侧面 121
导电镀层 122
第一导电线路 123First
第二导电层 13The second
第二导电线路 130Second
粘接片 14
开口 140
第一覆盖层 150
第二覆盖层 151
电路板 16
电路板单元 17
加工区 101
边缘区 102Borderlands 102
产品区 103
连接区 104
盲孔 105
孔壁 106Hole
压合板 107Plywood 107
孔壁导电层 108Hole wall
导通盲孔 109Conduction
具体实施方式 Detailed ways
下面将结合附图及实施例对本技术方案提供的电路板的制作方法作进一步详细说明。The manufacturing method of the circuit board provided by the technical solution will be further described in detail below in conjunction with the accompanying drawings and embodiments.
本技术方案实施例提供一种电路板的制作方法,其包括以下步骤:The embodiment of the technical solution provides a method for manufacturing a circuit board, which includes the following steps:
第一步,提供两个如图1所示的电路基板10,其包括中间层11和分别形成于所述中间层11两侧的第一导电层12和第二导电层13。In the first step, two
所述电路基板10可为双面覆铜基板或多层板。所述中间层11可为绝缘层或多层板的内层板。本实施例中,所述电路基板10为双面覆铜基板,所述中间层11为聚酯(PET)薄膜或聚酰亚胺(PI)薄膜。所述第一导电层12和第二导电层13可均为铜层。所述电路基板10为长方体形,其厚度约为36微米。所述电路基板10包括加工区101和环绕连接于所述加工区101的边缘区102。所述加工区101位于所述电路基板10的中心。所述加工区101包括多个产品区103和一个连接区104。所述连接区104连接于所述多个产品区103之间。所述边缘区102为环形。本实施例中,所述加工区101为方形。所述边缘区102为方形框体。所述产品区103的数量为四个,所述四个产品区103呈阵列式排布。所述连接区104为“十”字型。所述第一导电层12和第二导电层13可均为铜箔。The
第二步,蚀刻所述第一导电层12以在所述第一导电层12中预定位置形成多个第一孔120,得到如图2所示的结构。所述多个第一孔120通过影像转移及蚀刻工艺形成。具体地,可先在所述第一导电层12上贴附光致抗蚀剂层,再经过曝光、显影、蚀刻等工艺去除所述第一导电层12的部分导电材料,剩余的部分导电材料即围合形成多个第一孔120。每一第一孔120均具有连接于所述第一导电层12相对的两个表面之间的第一侧面121。The second step is to etch the first
第三步,将所述第二导电层13制作成第二导电线路130,得到如图3所示的结构。具体地,可先在所述第二导电层13的一侧形成光致抗蚀剂层,再经过曝光、显影、蚀刻等工艺去除所述第二导电层13的部分导电材料,剩余的部分导电材料即构成第二导电线路130。In the third step, the second
可以理解,上述第三步和第二步也可以调换顺序,或者同时进行。It can be understood that the order of the third step and the second step can also be reversed, or they can be performed at the same time.
第四步,在所述中间层11中形成与所述多个第一孔120一一连通的多个第二孔110,从而在所述两个电路基板10中均形成多个贯穿所述第一导电层12和中间层11的盲孔105,得到如图4所示的结构。所述第二导电层13部分暴露于所述盲孔105。本实施例中,所述多个第二孔110通过激光烧蚀形成。具体地,可采用二氧化碳激光烧蚀所述中间层11。所述第二孔110具有连接于所述中间层11的两个相对的表面之间的第二侧面111。所述第二侧面111与第一侧面121共同构成盲孔105的孔壁106。In the fourth step, a plurality of
第五步,提供一个如图5所示的粘接片14,其具有与所述加工区101相对应的开口140。The fifth step is to provide an
所述粘接片14的主要材质可为亚克力或环氧树脂。所述粘接片14的两侧通常会有离型保护膜。所述粘接片14的厚度范围为12.5微米到50微米。具体地,可先提供一块与所述电路基板10形状大小大致相同的长方体形片,再通过冲型等方式在其中心处形成开口140,即可得到环形的粘接片14。所述开口140的长度和宽度均大于或等于所述加工区101的长度和宽度。The main material of the
第六步,将所述粘接片14压合于所述两个电路基板10之间以形成如图6所示的压合板107,所述两个电路基板10的加工区101中的第二导电层13均暴露于所述开口140。The sixth step is to press-bond the
制作所述压合板107时,可先将所述粘接片14贴合于一块电路基板10的第二导电层13的边缘区102。然后使另一电路基板10的第二导电层13的边缘区102贴合于所述粘接片14,得到贴合板。最后将所述贴合板移至压合机内进行压合,所述粘接片14形成粘接层141,即得到压合板107。所述压合板107的厚度范围为80微米到120微米,其两侧均为第一导电层12。When manufacturing the
第七步,在所述图6中的盲孔105的孔壁106形成孔壁导电层108,得到导通盲孔109,如图7所示。In the seventh step, a
具体地,可采用化学沉铜工艺或黑影工艺,本实施例中,孔壁导电层108是通过黑影工艺形成,其材质为碳。所述黑影工艺仅在绝缘的材料表面沉积导电层,故,所述孔壁导电层108仅形成于盲孔105的第二孔110的第二侧面111。Specifically, an electroless copper deposition process or a shading process may be used. In this embodiment, the hole wall
第八步,通过电镀在所述压合板107的两个第一导电层12的表面、所述多个导通盲孔109的孔壁导电层108表面以及所述第二导电层13暴露于所述多个导通盲孔109的表面形成导电镀层122,如图8所示。In the eighth step, the surfaces of the two first
第九步,将所述第一导电层12制作成第一导电线路123,得到如图9所示的结构。本步骤中,所述导电镀层122随所述第一导电层12一起被制作成第一导电线路123。可先在所述导电镀层122的一侧形成光致抗蚀剂层,再经过曝光、显影、蚀刻等工艺去除所述第一导电层12和导电镀层122的部分导电材料,剩余的部分导电材料即构成第一导电线路123。In the ninth step, the first
第十步,切割去除所述压合板107中与所述电路基板10的边缘区102对应的区域,得到两个分离的如图10所示的电路板16。可采用成型机对所述压合板107进行切割。由于所述开口140的长度和宽度均大于或等于所述加工区101的长度和宽度,压合后形成于所述边缘区102的粘接层141也随边缘区102脱离所述压合板107,可得到两个分离的、形成有第一导电线路123、导通盲孔109和第二导电线路130的电路板16。In the tenth step, the region corresponding to the
第十一步,在上述电路板16的两侧形成分别覆盖所述第一导电线路123和第二导电线路130的第一覆盖层150和第二覆盖层151,得到如图11所示的结构。本实施例中,覆盖所述第一导电线路123的第一覆盖层150在对应导通盲孔109处留出开口,可根据需要在该处安装电子元件。第二覆盖层151覆盖所述第二导电线路130的导线并部分填充导线之间的空隙。In the eleventh step, the
第十二步,去除所述电路板16的连接区104,得到与所述多个产品区103一一对应的多个电路板单元17,如图12所示。每一电路板单元17中,所述第一导电线路123通过所述导通盲孔109与所述第二导电线路130信号连接。In the twelfth step, remove the
本技术方案提供的电路板的制作方法将两块电路基板10与粘接片14压合于一起制成压合板107,由于第六步所得的压合板107的厚度较大,后续的第七步至第九步的化学沉铜工艺或黑影工艺、电镀工艺、影像转移及蚀刻工艺等过程均不会导致压合板107出现皱褶、卷曲或报废的情况。有利于提高产品的良率。此外,形成压合板107后,可同时对其两侧的第一导电层12进行电镀,相较于传统的需要针对每一电路基板10的某一个表面进行选择性电镀的做法,可省去在第二导电层13贴附保护膜以及后续的去除保护膜的步骤,不仅节省了工序、有利于提高生产效率,还避免了电路基板10因厚度小而落入电镀槽内的风险,有利于提高产品良率。The circuit board manufacturing method provided by this technical solution presses two
可以理解的是,对于本领域的普通技术人员来说,可以根据本发明的技术构思做出其它各种相应的改变与变形,而所有这些改变与变形都应属于本发明权利要求的保护范围。It can be understood that those skilled in the art can make various other corresponding changes and modifications according to the technical concept of the present invention, and all these changes and modifications should belong to the protection scope of the claims of the present invention.
Claims (9)
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| CN 201010235271 CN102340933B (en) | 2010-07-23 | 2010-07-23 | How to make a circuit board |
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| CN 201010235271 CN102340933B (en) | 2010-07-23 | 2010-07-23 | How to make a circuit board |
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| CN102340933B true CN102340933B (en) | 2013-10-09 |
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| CN106604570A (en) * | 2016-12-21 | 2017-04-26 | 深圳市景旺电子股份有限公司 | Flexible laminated board and making method thereof |
| CN108200737B (en) * | 2017-12-22 | 2019-11-22 | 深圳市景旺电子股份有限公司 | A kind of production method of high frequency mixed pressure HDI plate |
| CN112584622A (en) * | 2019-09-27 | 2021-03-30 | 睿明科技股份有限公司 | Thin circuit manufacturing method |
| CN111010808B (en) * | 2019-12-31 | 2022-05-13 | 生益电子股份有限公司 | A method of making a PCB |
| CN111031690B (en) * | 2019-12-31 | 2022-03-25 | 生益电子股份有限公司 | A method of making a PCB |
| CN113873786B (en) * | 2020-06-30 | 2023-12-29 | 深南电路股份有限公司 | Circuit board processing method and circuit board |
| CN112911837B (en) * | 2021-01-21 | 2023-03-24 | 盐城维信电子有限公司 | Synchronous processing method for inner layer and outer layer of flexible circuit board |
| CN113038718A (en) * | 2021-01-27 | 2021-06-25 | 红板(江西)有限公司 | Ultra-thin PCB laminating process |
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| KR20030011434A (en) * | 2001-08-02 | 2003-02-11 | 주식회사 디에이피 | Manufacturing method for hidden laser via hole of multi-layered printed circuit board |
| CN101287339A (en) * | 2007-04-13 | 2008-10-15 | 富葵精密组件(深圳)有限公司 | Method for making circuit board with gap structure |
| CN101494957A (en) * | 2008-01-23 | 2009-07-29 | 富葵精密组件(深圳)有限公司 | Method and substrate for producing multi-layer circuit board |
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| US8063315B2 (en) * | 2005-10-06 | 2011-11-22 | Endicott Interconnect Technologies, Inc. | Circuitized substrate with conductive paste, electrical assembly including said circuitized substrate and method of making said substrate |
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| KR20030011434A (en) * | 2001-08-02 | 2003-02-11 | 주식회사 디에이피 | Manufacturing method for hidden laser via hole of multi-layered printed circuit board |
| CN101287339A (en) * | 2007-04-13 | 2008-10-15 | 富葵精密组件(深圳)有限公司 | Method for making circuit board with gap structure |
| CN101494957A (en) * | 2008-01-23 | 2009-07-29 | 富葵精密组件(深圳)有限公司 | Method and substrate for producing multi-layer circuit board |
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Address after: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Applicant after: Fuku Precision Components (Shenzhen) Co., Ltd. Co-applicant after: Zhending Technology Co., Ltd. Address before: 518103 Shenzhen Province, Baoan District Town, Fuyong Tong tail Industrial Zone, factory building, building 5, floor, 1 Applicant before: Fuku Precision Components (Shenzhen) Co., Ltd. Co-applicant before: Honsentech Co., Ltd. |
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Address after: Guangdong city of Shenzhen province Baoan District Songgang street Chuanyan Luo Lu Yan Co-patentee after: Peng Ding Polytron Technologies Inc Patentee after: Peng Ding Holdings (Shenzhen) Limited by Share Ltd Address before: 518000 Shenzhen Baoan District city Songgang street Chuanyan Luzhen Yan Luo Ding Technology Park plant A1 building to building A3 Co-patentee before: Peng Ding Polytron Technologies Inc Patentee before: Fuku Precision Components (Shenzhen) Co., Ltd. |