CN102480408B - Scheduling method and device for pseudo wire emulation system - Google Patents

Abstract

The present invention relates to a scheduling method and device for a pseudowire emulation system. The method includes an uplink step: receiving various service data on the user side, inputting the service data into the SDH optical interface on the user side after recovering the clock and data, and then Perform overhead processing, or convert the PDH service data input from the user side through the interface and output data of a unified data structure through the cross-connection processing circuit, and perform frame processing on the above-mentioned processed various service data on the user side to obtain all The payload data of various service data on the user side is described, and the payload data is dispatched to the Ethernet side and encapsulated into PWE3 data packets for transmission; the method and device have simple interface, easy multiplexing, convenient bandwidth adjustment and configuration, and service processing There are many types and the scheduling algorithm is simple.

Description

Scheduling method and device for pseudowire simulation system

technical field

The invention relates to the field of communication technology, in particular to the business data scheduling of data transmission chips at ports, in particular to the comprehensive scheduling method and device of a pseudowire simulation system.

Background technique

With the comprehensive IP (Internet Protocol, Internet Protocol) trend of telecommunication services, and the rapid development of mobile communication technologies such as 3G (3rd-generation, third-generation mobile communication technology)/LTE (long term evolution, long-term evolution technology), As a combination of packet technology and traditional SDH (Synchronous Digital Hierarchy, Synchronous Digital System) technology, PTN (Package Transport Network, Packet Transport Network) emerged as the times require, and has quickly become the mainstream technology choice for the next-generation metro transport network. In the future, there will be rapid growth of IP-based packet services. At the same time, traditional TDM (Time Division Multiplex, time division multiplexing mode) services will still provide operators with considerable profits for a period of time. This poses a challenge to PTN. The requirement of multi-service bearing capacity, PWE3 (Pseudo-Wire Emulation Edge to Edge, end-to-end pseudo-wire emulation) is the key technology to solve this requirement.

PWE3 provides a powerful and low-cost solution for the TDM service bearer of PTN products and the interconnection between SDH/SONET (Synchronous Digital Hierarchy/Synchronous Optical Network) and PTN heterogeneous networks. It can be applied to the core and aggregation layer devices of PTN and subsequent NG PTN (next generation PTN, next generation PTN) products based on the unified packet platform.

PWE3 is a Layer 2 VPN (Virtual Private Network, virtual private network) protocol that provides tunnels on the packet switching network to simulate some services (ATM, Ethernet, TDM, SONET/SDH). They are interconnected to realize resource sharing and network expansion, making the network networking mode of the protocol itself more flexible.

Since PWE3 can transmit and process various service data, its interface needs to interface with various service modules. How to cache, manage and schedule the data flow of these interfaces requires an integrated scheduling manager.

Related patent technology query: the application (patent) number is CN200910252928.8, and the patent name is: Pseudowire-based service traffic processing method, device and system, which discloses a pseudowire-based service traffic processing method, device and system , wherein the method for processing service traffic based on a pseudowire includes: receiving service data traffic from a user edge device; determining a pseudowire aggregation group corresponding to the service traffic; and aggregating the service data traffic through the pseudowire according to a local policy The pseudowires in the sending state or active state in the group are forwarded to the peer device. The pseudowire aggregation group includes more than one pseudowire corresponding to the service data flow, and the service data flow is sent through the corresponding pseudowire aggregation group. The status or active pseudowire is forwarded to the peer device, which can improve the average convergence speed of service data traffic and speed up the switching time when a network failure occurs. However, the above prior art also has the disadvantages of complex interface, inconvenient bandwidth adjustment and configuration, few types of protocols to be processed, and complex scheduling algorithms.

Contents of the invention

The main purpose of the present invention is to provide a scheduling method and device for a pseudowire emulation system, which has simple interface, easy multiplexing, convenient bandwidth adjustment and configuration, many types of processing protocols, and simple scheduling algorithm.

The technical solution adopted by the present invention to solve its technical problems is:

A scheduling method for a pseudowire simulation system, comprising:

Receive the synchronous digital system SDH optical interface input service data from the user side and the quasi-synchronous digital system PDH service data input from the user side;

The SDH optical interface is input into the service data to perform clock and data recovery and overhead processing in sequence, and the PDH service data is processed through interface conversion;

performing cross-connection processing on the SDH optical interface input service data and PDH service data;

Perform framing processing on the service data after the cross-connection processing, obtain the payload data of various service data on the user side, and transfer the payload data to the Ethernet side for transmission;

Wherein, the business data processed by the cross-connection are respectively subjected to framing processing, including:

Perform virtual concatenation processing, MLPPP-IMA processing, and CEP-CES processing on the above-mentioned processed user-side various business data;

The MLPPP-IMA processing is: Multi Link PPP-Inverse Multiplexing for ATM, the inverse multiplexing processing of the multi-link point-to-point protocol ATM; the CEP-CES processing is: CircuitEmulation Service-Circuit Emulation over Packet, circuit emulation service- Packet-based circuit simulation processing.

Preferably, the SDH optical interface input service data received from the user side and the PDH service data input from the user side specifically include:

Respectively receive data in VC4 format from the SDH optical interface and receive data converted and encapsulated into VC4 format from the PDH interface through the PDH interface.

Preferably, the overhead processing specifically includes:

The data in VC4 format received from the SDH optical interface is subjected to segment overhead processing, high-order pointer interpretation and high overhead extraction processing.

Preferably, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The present invention also provides a scheduling method for a pseudowire simulation system, which includes:

Receive various service data sent from the Ethernet side, cache various service data on the network side in different storage spaces according to different services, and remove the corresponding frame structure;

The service data on the network side that has been removed from the corresponding frame structure is cross-connected, and then output through the SDH optical interface after overhead insertion processing, or the PDH service data is directly output by the interface conversion module.

Preferably, the receiving various business data sent by the Ethernet side, and extracting the corresponding frame structure specifically includes:

Performing virtual concatenation processing, MLPPP-IMA processing, and CEP-CES processing on various service data on the network side to extract corresponding frame structures of various service data, and reorganizing the frame structures;

Wherein, the MLPPP-IMA processing is: Multi Link PPP-Inverse Multiplexing forATM, the inverse multiplexing processing of the multi-link point-to-point protocol ATM;

The CEP-CES processing is: Circuit Emulation Service-Circuit Emulation overPacket, circuit emulation service-circuit emulation processing based on packets.

Preferably, the service data on the network side that is detached from the corresponding frame structure is cross-connected, and then the overhead is inserted and then output through the SDH optical interface, specifically including:

The various service data on the network side after the reorganization of the frame structure are output from the SDH optical interface after the low-order pointer generation module, the low-order overhead insertion, the high-order pointer generation module, the high-order overhead insertion and the segment overhead insertion.

Preferably, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The present invention also provides a scheduling device for a pseudowire simulation system, which includes:

The user-side data receiving unit is used to receive the synchronous digital system SDH optical interface input service data input from the user side and the quasi-synchronous digital system PDH service data input from the user side;

The user-side data processing unit, which sequentially performs clock and data recovery and overhead processing on the SDH optical interface input service data, and performs interface conversion processing on the PDH service data;

A cross-connect unit, configured to perform cross-connect processing on the SDH optical interface input service data and PDH service data;

The user-side data framing unit is configured to perform framing processing on the service data after the cross-connection processing, obtain the payload data of various service data on the user side, and transfer the payload data to Ethernet side sending;

Wherein, the user-side data framing unit is also used to perform virtual concatenation processing, MLPPP-IMA processing, and CEP-CES processing on the above-mentioned processed user-side various service data;

The MLPPP-IMA processing is: Multi Link PPP-Inverse Multiplexing for ATM, the inverse multiplexing processing of the multi-link point-to-point protocol ATM; the CEP-CES processing is: CircuitEmulation Service-Circuit Emulation over Packet, circuit emulation service- Packet-based circuit simulation processing.

Preferably, the user-side data receiving unit is configured to respectively receive data in VC4 format from the SDH optical interface and receive data converted and encapsulated into VC4 format from the PDH interface through the PDH interface.

Preferably, the user-side data processing unit is configured to perform section overhead acceptance processing, high-order pointer interpretation, and high-overhead extraction processing on the data received from the SDH optical interface in VC4 format.

Preferably, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The present invention also provides a scheduling device for a pseudowire simulation system, which includes:

The network-side data receiving unit is used to receive various service data sent from the Ethernet side, cache the various service data on the network side in different storage spaces according to different services, and remove the corresponding frame structure;

The network-side data processing unit is used to cross-connect the service data on the network side from which the corresponding frame structure has been removed, and then perform overhead insertion processing to output through the SDH optical interface, or directly output the PDH service data through the interface conversion module.

Preferably, the network-side data receiving unit is configured to perform virtual concatenation processing, MLPPP-IMA processing, and CEP-CES processing on various service data on the network side to extract corresponding frame structures of various service data, and reorganizing the frame structure;

Wherein, the MLPPP-IMA processing is: Multi Link PPP-Inverse Multiplexing forATM, the inverse multiplexing processing of the multi-link point-to-point protocol ATM;

The CEP-CES processing is: Circuit Emulation Service-Circuit Emulation overPacket, circuit emulation service-circuit emulation processing based on packets.

Preferably, the network-side data processing unit is configured to perform low-order pointer generation module, low-order overhead insertion, high-order pointer generation module, high-order After overhead insertion and segment overhead insertion, it is output from the SDH optical interface.

Preferably, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The implementation of the technical solution of the present invention has the following beneficial effects: the method and device provided by the present invention process multiple service data streams through the method and device, the interface is simple and easy to reuse, bandwidth adjustment and configuration are convenient, and there are many types of services, The scheduling algorithm is simple.

Description of drawings

Fig. 1 is the flow chart of the method provided by the embodiment of the present invention;

Fig. 2 is another method flowchart provided by the embodiment of the present invention;

Fig. 3 provides device structural diagram for the embodiment of the present invention

Fig. 4 provides another device structure diagram according to the embodiment of the present invention;

Fig. 5 is an application example of a device provided by an embodiment of the present invention.

The realization of the purpose of the present invention, functional characteristics and advantages will be further described in conjunction with the embodiments and with reference to the accompanying drawings.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

An embodiment of the present invention provides a scheduling method for a pseudowire simulation system. In the uplink process, as shown in FIG. 1, the method includes steps:

S110. Receive SDH (Synchronous Digital Hierarchy, synchronous digital system) optical interface input service data input from the user side and PDH (plesiochronous digital hierarchy, plesiochronous digital hierarchy) service data input from the user side;

In this embodiment, the SDH optical interface input service data received from the user side and the PDH service data input from the user side specifically include:

Respectively receive data in VC4 (4Order virtual Container: 4th order virtual container) format from the SDH optical interface and receive data converted and encapsulated into VC4 format from the PDH interface through the PDH interface.

S120. Perform clock and data recovery and overhead processing on the SDH optical interface input service data in sequence, and interface conversion processing on the PDH service data;

In this embodiment, the overhead processing specifically includes:

The data in VC4 format received from the SDH optical interface is subjected to segment overhead acceptance processing, high-order pointer interpretation, and high overhead extraction processing.

S130. Perform cross-connection processing on the SDH optical interface input service data and PDH service data;

S140. Perform framing processing on the service data after the cross-connection processing, acquire payload data of various service data on the user side, and transfer the payload data to the Ethernet side for transmission.

In this embodiment, the framing processing of the service data processed by the cross-connection is carried out, which specifically includes:

The above-mentioned processed user-side business data are respectively subjected to virtual concatenation processing, MLPPP-IMA (Multi Link PPP-Inverse Multiplexing for ATM, multi-link point-to-point protocol ATM inverse multiplexing) processing and CEP- CES (Circuit Emulation Service-CircuitEmulation over Packet, Circuit Emulation Service-Circuit Emulation over Packet) processing.

In the downlink process of the method further provided by the embodiment of the present invention, as shown in FIG. 2 , the method includes steps:

S210. Receive various service data sent from the Ethernet side, and extract the corresponding frame structure;

In this embodiment, the removing the various service data on the network side into the corresponding frame structure specifically includes: performing virtual concatenation processing, MLPPP-IMA processing and CEP processing on the various service data on the network side respectively. - The CES process extracts the corresponding frame structures of various service data, and reassembles the frame structures.

S220. Cross-connect the service data on the network side from which the corresponding frame structure has been removed, and then perform overhead insertion processing and then output through the SDH optical interface, or directly output the PDH service data through the interface conversion module.

In this embodiment, the service data on the network side from which the corresponding frame structure is removed is cross-connected, and then the overhead insertion process is performed and then output through the SDH optical interface, specifically including:

After performing the low-order pointer generation module and low-order overhead insertion on the various service data on the network side after the frame structure reorganization, output from the PDH optical interface, after the high-order pointer generation module, high-order overhead insertion and segment overhead insertion Output from the SDH optical interface.

In other embodiments, after receiving the various service data sent from the Ethernet side, the method further includes: buffering the various service data on the network side in different storage spaces according to different services.

In the uplink and downlink steps in each of the above-mentioned embodiments, the various service data include: CES (Circuit Emulation Service, circuit emulation service) service data, CEP (Circuit Emulationover Packet, circuit emulation based on grouping) service data, MLPPP ( Multi Link Point to Point Protocol, Multi Link Point to Point Association) business data, IMA business data and VCG (Virtual Container Group, virtual container group) business data.

The method provided by the embodiment of the present invention processes multiple service data streams through the method and device, the interface is simple and convenient for multiplexing, bandwidth adjustment and configuration are convenient, there are many types of processing protocols, and the scheduling algorithm is simple.

The embodiment of the present invention also provides an integrated scheduling device for a pseudowire emulation system, which is used in the uplink process, as shown in FIG. 3 , the device includes:

The user side data receiving unit 310 is used to receive the synchronous digital system SDH optical interface input service data input by the user side and the quasi-synchronous digital system PDH service data input by the user side; in this embodiment, more specifically, the user side The data receiving unit 310 is configured to respectively receive data in VC4 format from the SDH optical interface and receive data converted and encapsulated into VC4 format from the PDH interface through the PDH interface.

The user-side data processing unit 320 performs clock and data recovery and overhead processing on the SDH optical interface input service data in sequence, and performs interface conversion processing on the PDH service data; in this embodiment, more specifically, the The user-side data processing unit 320 is configured to perform section overhead acceptance processing, high-order pointer interpretation, and high-overhead extraction processing on the data received from the SDH optical interface in VC4 format.

A cross-connect unit 330, configured to perform cross-connect processing on the SDH optical interface input service data and PDH service data;

The user-side data framing unit 340 is configured to perform framing processing on the service data after the cross-connection processing, obtain the payload data of various service data on the user side, and adjust the payload data to sent to the Ethernet side. In this embodiment, more specifically, the user-side data framing unit 340 is configured to perform virtual concatenation processing, MLPPP-IMA processing, and CEP processing on the above-mentioned processed user-side service data respectively. -CES processing.

In this embodiment, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The present invention also provides another scheduling device for a pseudowire emulation system, which is used in the downlink process, as shown in Figure 4, the device includes:

The network-side data receiving unit 410 is used to receive various service data sent from the Ethernet side, and extract the corresponding frame structure; in this embodiment, more specifically, the network-side data receiving unit is used to convert the Various service data on the network side are respectively subjected to virtual concatenation processing, MLPPP-IMA processing, and CEP-CES processing to extract corresponding frame structures of various service data, and perform reorganization of the frame structures.

The network-side data processing unit 420 is used to cross-connect the service data on the network side from which the corresponding frame structure has been removed, and then perform overhead insertion processing to output through the SDH optical interface, or directly output the PDH service data by the interface conversion module . In this embodiment, more specifically, the network-side data processing unit 420 is configured to perform a low-order pointer generation module, low-order overhead insertion, and Output from the SDH optical interface after high-order pointer generation module, high-order overhead insertion, and segment overhead insertion. In this embodiment, more specifically, the network side data processing unit 420 is also configured to cache various service data on the network side according to different services after receiving various service data sent from the Ethernet side to different storage spaces.

In this embodiment, the various service data include: CES service data, CEP service data, MLPPP service data, IMA service data and VCG service data.

The following describes the application embodiments of the scheduling method and scheduling device provided by the above-mentioned embodiments in the processing of different business data:

In order to simplify the interface connection and unify the encapsulation form, the PDH service, ATMIMA and MLPPP-related E1 service interfaces that can be processed by the pseudowire emulation system are encapsulated in VC4 format to facilitate transmission and processing according to the SDH encapsulation structure. The left side of Fig. 5 is attributed to the SDH side, while the right side of Fig. 5 is mainly related to the Ethernet interface, which is collectively referred to as the ETH (Ethernet: Ethernet) side in this application embodiment. On the SDH side, because CEP CES is applied in both UNI (User to Network Interface: user and network interface) and NNI (Network to Network Interface: network and network interface) application environments, it is related to the 8 Each VC4 has an interface, as shown in the schematic diagram of the data trend of group 1 and group 2 in Figure 5.

On the SDH side:

Virtual concatenation processing 1. In the downlink direction, multiple VCGs of the same type are interleaved by bytes to form a logically larger bandwidth and higher bandwidth utilization container to transmit services; uplink retransmits SDH services through GFP Assembled and then transmitted over Ethernet.

CEP-CES2 realizes the function of encapsulation and decapsulation of PDH service and SDH service,

The generation and processing of CES read and write requests are as follows:

Generation of read and write requests:

Generation of SDH side read request: every time two E1 frames are sent, a read request of SDH side CES is generated;

Generation of SDH side write request: every time two E1 frames are received, a write request of SDH side CES is generated;

Generation of read requests on the ETH side: poll and query each E1 channel in turn, if an E1 channel stores enough frames of a PWE3 message in the external memory, a read request for the CES on the ETH side is generated;

Generation of ETH side write request: every time two E1 frames are received, a write request of ETH side CES is generated;

Since there are multiple E1 channels to be processed, in order to prevent the request from being lost, the request is first stored in a FIFO (first input first output, first in first out) and waits for processing.

After the above processing, the read and write requests of CES are completely equivalent to the bandwidth configured by CES;

The process of reading and writing requests is as follows:

Write request processing on the SDH side: send a write request to the scheduling device 4, and after the scheduling device 4 responds, write the corresponding data block into the external memory. If the external memory is full, it will be discarded and no request will be sent to the external memory.

Read request processing on the SDH side: send a read request to the scheduling device 4, and after waiting for a response, receive the data block from the scheduling device 4. If the external memory is empty, insert all 0 or all 1 codes, and do not send a request to the scheduling device.

ETH profile request processing: send a write request to the scheduling device 4, after the scheduling device 4 responds, write the corresponding block into the external memory 5, if the external memory 5 is full, then discard (directly discard the entire PWE3 message), and do not send to the outside The memory 5 sends the request.

ETH side read request processing: send a read request to the dispatcher, wait for the dispatcher 4 to respond, receive the data from the dispatcher 4, and repeat this process until the number of cascades is reached.

Among them: the generation and processing process of the read and write requests of CEP are:

Generation of read and write requests:

The processing idea of CEP is basically the same as that of CES, but it needs to be specially noted that for Vc-12 CEP, the payload length of each CEP is the number of bytes of the respective virtual container. For the CEP of Vc-4, the length of each CEP payload is one-third of the length of the Vc-4 virtual container, that is, 783 bytes. Therefore, in the external memory 5, the CEP emulation stores Vc-12 in units of virtual containers on the basis of 64-byte blocks. The CEP of Vc-4 and the CEP of Vc-4-4c are stored in units of 783 bytes based on 64-byte blocks. Since the length of the CEP payload is not an integer multiple of 64 bytes, the last block is less than 64 bytes, and it is also treated as one block.

According to the above processing principles, for Vc-12, each virtual container generates 3 blocks, and the first byte of the first block is V5; for Vc-4, Vc-4-4c, each virtual container generates 3 , 12, 48 CEP messages, each CEP message accounts for 13 blocks (13X64=832 bytes, greater than 783 bytes, the last block has padding bytes), the first byte of the first CEP message is J1 byte.

SDH profile request: A write request is generated every time a block is received. Note that the generation of blocks depends on the structure of the virtual container;

SDH side read request: 3 read requests are generated every time a Vc-12 frame is sent, and the first byte of the block corresponding to the first read request is V5. For Vc-4 and Vc-4-4c, each frame sent corresponds to 39, 156, and 624 read requests respectively, and the first byte of the block corresponding to the first read request is J1.

ETH profile request: A request is generated every time a block is received. Note that the generation of blocks depends on the structure of the virtual container.

ETH side read request: Query each Vc channel in turn, and if a certain Vc channel satisfies the conditions for generating PWE3, a read request is generated.

Since there are multiple Vc channels to be processed, in order to prevent the request from being lost, the request is first stored in a FIFO and waits for processing.

After such processing, the read and write requests of CEP are completely equivalent to the bandwidth configured by CES;

The process of reading and writing requests:

SDH profile request processing: send a write request to the scheduling device 4, after the scheduling device 4 responds, write the corresponding block into the external memory 5, if the external memory 5 is full, then discard (discard in the unit of a virtual container) and do not write to the external memory 5 send request;

SDH side read request processing: send a read request to the scheduling device 4, after the scheduling device 4 responds, receive the data block of the scheduling device 4, if the external memory 5 is empty, then do not send the request, then insert all 0 or all 1.

ETH profile request processing: send a request to the scheduling device 4, wait for the scheduling device 4 to respond, write the data block into the scheduling device 4, if the external memory 5 is full, then discard (discard in the unit of the entire virtual container), do not send to the outside The memory 5 sends a request;

ETH read request processing process: send a request to the dispatcher 4, wait for the dispatcher 4 to respond, accept the data block, and repeat the above process until the PWE3 encapsulation requirements are met.

IMAMLPPP3 realizes reverse multiplexing of ATM and realizes point-to-point multi-link transmission by using E1. in:

The generation and processing of MLPPP read and write requests are as follows:

Generation of read and write requests:

Write request on the SDH side: a write request is generated every time a fragment is recovered by the MLPPP group;

Read request on the SDH side: poll and query each PPP (Point to Point Protocol) in turn, whether the connection has enough space to generate and store a fragment, and the MLPPP group has fragments that have not been allocated yet, then generate a read request ask;

ETH side read request: poll to detect whether each MLPPP group has a message, and if so, generate a read request;

ETH profile request: every time a block is received, a request is generated;

Since there are multiple MLPPP groups to be processed, in order to prevent the request from being lost, the request is first stored in a FIFO and waits for processing.

The process of reading and writing requests:

SDH profile request processing process: send a write request to the scheduling device 4, wait for the response of the scheduling device 4, write the data block into the scheduling device 4, repeat the above process until a fragment is written, if the external memory 5 is full, then do not write to the The dispatching device 4 sends a request and discards the entire restored message.

SDH side read request processing: send a read request to the scheduling device 4, wait for the response of the scheduling device 4, receive the data block, and repeat the above process until a fragment read is completed.

ETH profile request processing process: send a write request to the scheduling device 4, wait for the response of the scheduling device 4, write the data block into the external memory 5, if the external memory 5 is full, discard the entire message according to the MLPPP group.

ETH side read request processing process: send a read request to the scheduling device 4, wait for the response of the scheduling device 4, receive the data block, repeat the above process until the end of a message.

The generation and processing of IMA read and write requests are as follows:

Generation of read and write requests:

ETH profile request: each ATM cell generates a write request;

ETH side read request: poll each VC/VP connection, whether it meets the conditions for sending a PWE3 message, and if so, generate a read request;

SDH profile request: When the IMA group can be restored, each VC is polled in turn, and according to the sorting result, if the current message is a data message, a write request is generated;

SDH side read request:

Since there are multiple IMA groups to be processed, in order to prevent the request from being lost, the request is first stored in a FIFO and waits for processing.

The process of reading and writing requests:

SDH side write request processing process: send a write request to the scheduling device 4, wait for the response of the scheduling device 4, write the data block into the scheduling device 4, repeat the above process until a fragment is written, if the external memory is full, then do not write to the scheduling device Device 4 sends a request and discards the entire restored message.

SDH side read request processing process: send a write request to the scheduling device 4, wait for the response of the scheduling device 4, read 64 bytes from the scheduling device 4 and store it locally for sorting.

ETH profile request process: send a write request to the scheduling device 4, wait for the scheduling device 4 to respond, write the data block into the scheduling device 4, and discard the cell if the external memory is full;

ETH side read request processing: send a read request to the scheduling device 4, wait for the response of the scheduling device 4, receive the data block, and repeat the above process until a PWE3 message is satisfied.

The scheduling device 4 (namely: read-write control and DDR (Double Data Rate: double data rate) controller 4) realizes the arbitration of peripheral reading and writing and the reading and writing control of external memory, that is, polling processing of 6 reads and 6 writes.

The external memory 5 realizes the buffering of data exchanged between the SDH side and the ETH side.

In the upward direction of ETH:

VCG framer 6, MLPPP framer 7, ATM-PWE3 framer 8, CESCEP-PWE3 framer 9 and ECC message framer 10 are framers for corresponding services, and they complete the corresponding VC4 format The data package:

In the downlink direction of ETH:

The ECC message write pointer generation module 11, the VCG send write pointer generation module 12, the IMA-PWE3 receive write pointer generation module 13, the CEP-CES-PWE3 receive write pointer generation module 14 and the MLPPP group receive write pointer generation module 15 are respectively The location where the generated downlink data needs to be temporarily stored in the external memory after the message is parsed.

Among them: the generation and processing process of VCG read and write requests are as follows:

Generation of read and write requests:

SDH profile request generation: every time a block is received, a write request is generated;

SDH side read request generation: For each VCG, count the data read requests of each VCG separately, and generate a read request for every 64 bytes counted;

ETH profile request: every time a block is received, a write request is generated;

ETH side read request: Query each VCG port in turn, if a port is satisfied to send a message, a read request will be generated;

Since there are multiple VCG groups to be processed, in order to prevent the request from being lost, the request is first stored in a FIFO and waits for processing.

The process of reading and writing requests:

SDH profile request processing: send a request to the scheduling device 4, wait for the response of the scheduling device 4, write the data block into the scheduling device 4, if the external memory is full, discard the entire message according to the VCG.

SDH side read request processing process: send a read request to the scheduling device 4, wait for the scheduling device 4 to respond, and then receive the data block. If the internal cache is full, or there is no data in the external memory, the request will not be sent;

ETH profile request processing process: send a request to the scheduling device 4, wait for the scheduling device 4 to respond, write the data block into the scheduling device 4, if the external memory is full, discard the entire message according to the VCG;

ETH side read request processing process: send a read request to the scheduling device 4, wait for the response of the scheduling device 4, receive the data block, repeat the above process until the end of a message.

The structure of the external memory is divided into two parts, one is the data storage area, and the other is the message information storage area. This application embodiment only involves the storage and scheduling of data in the data storage area.

The space allocation of different business data in the storage space is shown in Table 1 below:

bank business type row address 0 VCG 0---63 0 CEP-CES 1024---2047 1 MLPPP 0---255 1 IMA 512---1023 1 CEP-CES 1024---2047 2 VCG 0---63 2 CEP-CES 1024----2047 3 MLPPP 0---255 3 IMA 512---1023 3 CEP-CES 1024---2047

Table I

The data storage area is divided into blocks according to 64 bytes, and the block settings corresponding to different business data are shown in Table 2 below:

Table II

After applying the method provided by the above-mentioned embodiment, the data storage area uses an external memory, because the information of the message is stored for no more than 64ms during the transmission process, for the 64ms DDR2 memory module, the scheduling device provided by the embodiment of the present invention does not need to It handles the refresh process and simplifies scheduling management.

Assume that a clock frequency of 250M is used, the bit width of the data line is 64 bits, and the total bandwidth of the scheduling device 4 is 32G. The scheduling device 4 uses 6 writes and 6 reads to fix round-robin scheduling. The scheduling method is shown in Table 3 below:

Table three

Because there is generally mixed transmission of multi-service data in PWE3 chips, the design of multiple service data sharing bandwidth is involved in scheduling. In this application example, VCG and CEP-CES share 4G bandwidth, and CEP-CES and MLPPP-IMA shares 4G bandwidth, so corresponding to the external GE interface also involves port configuration: the VCG and CEP of the same group are on the Ethernet interface, and a maximum of 2 GE interfaces are allowed to be occupied, the CEP-CES of the same group, and the CEP-CES and MLPP-IMA are allowed to occupy up to 2 GE interfaces on the Ethernet interface, so as to ensure that the service data will not be congested or lost when a certain service data bursts.

In this application example, the data bit width is assumed to be 64 bits, so reading and writing according to 64-byte fragmentation requires 4 clock cycles (data is transmitted on the upper and lower edges of each clock). It takes 96 clock cycles, plus the overhead of 16 clock cycles, the usage efficiency is 85%. When the 4G bandwidth usage efficiency is 85%, the actual effective scheduling bandwidth is 3.4G, and the traffic of two GE bursts is the largest. is 2.5G, so the scheduling device 4 meets the port flow requirement in the worst case. In addition, the above method assumes that all service data exists at the same time. If a certain service data does not exist in a certain period of time, the scheduling bandwidth of the service data on the port will be greatly increased at this time, ensuring that the service data will not be congested or lost.

This application embodiment enables the method and device provided by the above-mentioned embodiment to use a simple algorithm to meet the needs of various business data through appropriate sharding of external memory, encapsulation and conversion of different business data, and processing of read and write generation methods. congestion scheduling.

The above are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention. Inside.

Claims (14)

1. a dispatching method for pseudo wire emulation system, is characterized in that, comprising:

Receive the SDH (Synchronous Digital Hierarchy) SDH optical interface incoming traffic data of user's side input and the PDH (Pseudo-synchronous Digital Hierarchy) PDH business datum of user's side input;

Described SDH optical interface incoming traffic data are carried out to clock and data recovery, overhead processing successively, described PDH business datum is processed through interface conversion;

Described SDH optical interface incoming traffic data and PDH business datum are carried out to interconnection processing;

Described business datum after interconnection is processed is carried out respectively to framing processing again, obtain the payload data of the miscellaneous service data of described user's side, described payload data is transferred to Ethernet side and sends;

Wherein, described business datum after interconnection is processed is carried out respectively to framing processing again, comprising:

The miscellaneous service data of above-mentioned user's side are after treatment carried out respectively to Virtual Concatenation processing, MLPPP-IMA processing and CEP-CES again to be processed;

Described MLPPP-IMA is treated to: Multi Link PPP-Inverse Multiplexing for ATM, and the reverse multiple connection of Multi-Link Point-to-Point Protocol ATM is processed; Described CEP-CES is treated to: Circuit Emulation Service-Circuit Emulation over Packet, circuit emulation service-packet-based circuit simulation is processed.

2. method as claimed in claim 1, is characterized in that, the SDH optical interface incoming traffic data of described reception user side input and the PDH business datum of user's side input, specifically comprise:

From SDH optical interface, receive the data of VC4 form and from PDH interface, receive the data that are packaged into VC4 form through this PDH interface conversion respectively.

3. method as claimed in claim 2, is characterized in that, described overhead processing, specifically comprises:

The described data from SDH optical interface reception VC4 form are carried out to section overhead processing, high-order pointer interpreter and high overhead extraction to be processed.

4. method as described in as arbitrary in claim 1-3, is characterized in that, described miscellaneous service data comprise: CES business datum, CEP business datum, MLPPP business datum, IMA business datum and VCG business datum;

Wherein, described CES business datum is: Circuit Emulation Service, circuit emulation service data; Described CEP business datum is: Circuit Emulation over Packet, packet-based circuit emulation service data; Described MLPPP business datum is: Multi Link Point to Point Protocol, PPP Multilink business datum; Described IMA business datum is: Inverse Multiplexing for ATM, the reverse multiple connection business datum of ATM; Described VCG business datum is: Virtual Container Group, virtual container set business datum.

5. a dispatching method for pseudo wire emulation system, is characterized in that, comprising:

Receive the miscellaneous service data that Ethernet side sends over, according to different business, the miscellaneous service data buffer storage of described network side is arrived to different memory spaces, and split out respective frame structure;

By the described business datum process interconnection that splits out the network side of respective frame structure, then carry out through the optical interface of SDH, exporting after expense insert handling, or directly by interface modular converter output PDH business datum;

Wherein, the miscellaneous service data that described reception Ethernet side sends over, split out respective frame structure, specifically comprise:

The miscellaneous service data of described network side are carried out respectively to Virtual Concatenation processing, MLPPP-IMA processing and CEP-CES processing and split out the respective frame structure of miscellaneous service data, and carry out the restructuring of described frame structure;

Wherein, described MLPPP-IMA is treated to: Multi Link PPP-Inverse Multiplexing for ATM, and the reverse multiple connection of Multi-Link Point-to-Point Protocol ATM is processed;

Described CEP-CES is treated to: Circuit Emulation Service-Circuit Emulation over Packet, circuit emulation service-packet-based circuit simulation is processed.

6. method as claimed in claim 5, is characterized in that, described by the business datum of the described network side that splits out respective frame structure through interconnection, then carry out after expense insertion, through the optical interface output of SDH, specifically comprising:

Described miscellaneous service data of carrying out the network side after frame structure restructuring are carried out to low-order pointer generation module, the insertion of low order expense, after high-order Pointer generator module, high-order overhead insertion and section overhead insert, from SDH optical interface, exported.

7. method as described in claim 5 or 6, is characterized in that, described miscellaneous service data comprise: CES business datum, CEP business datum, MLPPP business datum, IMA business datum and VCG business datum;

Wherein, described CES business datum is: Circuit Emulation Service, circuit emulation service data; Described CEP business datum is: Circuit Emulation over Packet, packet-based circuit emulation service data; Described MLPPP business datum is: Multi Link Point to Point Protocol, PPP Multilink business datum; Described IMA business datum is: Inverse Multiplexing for ATM, the reverse multiple connection business datum of ATM; Described VCG business datum is: Virtual Container Group, virtual container set business datum.

8. a dispatching device for pseudo wire emulation system, is characterized in that, comprising:

User's side data receiving element, for receiving the SDH (Synchronous Digital Hierarchy) SDH optical interface incoming traffic data of user's side input and the PDH (Pseudo-synchronous Digital Hierarchy) PDH business datum of user's side input;

User's side data processing unit, carries out clock and data recovery, overhead processing successively by described SDH optical interface incoming traffic data, and described PDH business datum is processed through interface conversion;

Cross-connection unit, for carrying out interconnection processing by described SDH optical interface incoming traffic data and PDH business datum;

User's side data framing unit, for described business datum after interconnection is processed is carried out respectively to framing processing again, obtains the payload data of the miscellaneous service data of described user's side, described payload data is transferred to Ethernet side and sends;

Wherein, described user's side data framing unit is also processed for the miscellaneous service data of above-mentioned user's side after treatment being carried out respectively again to Virtual Concatenation processing, MLPPP-IMA processing and CEP-CES;

Described MLPPP-IMA is treated to: Multi Link PPP-Inverse Multiplexing for ATM, and the reverse multiple connection of Multi-Link Point-to-Point Protocol ATM is processed; Described CEP-CES is treated to: Circuit Emulation Service-Circuit Emulation over Packet, circuit emulation service-packet-based circuit simulation is processed.

9. install as claimed in claim 8, it is characterized in that, described user's side data receiving element, for receiving the data of VC4 form and receive the data that are packaged into VC4 form through this PDH interface conversion from PDH interface from SDH optical interface respectively.

10. install as claimed in claim 9, it is characterized in that, described user's side data processing unit, accepts processing, high-order pointer interpreter and the processing of high overhead extraction for the described data from SDH optical interface reception VC4 form are carried out to section overhead.

11. as arbitrary in claim 8-10 as described in device, it is characterized in that, described miscellaneous service data comprise: CES business datum, CEP business datum, MLPPP business datum, IMA business datum and VCG business datum;

Wherein, described CES business datum is: Circuit Emulation Service, circuit emulation service data; Described CEP business datum is: Circuit Emulation over Packet, packet-based circuit emulation service data; Described MLPPP business datum is: Multi Link Point to Point Protocol, PPP Multilink business datum; Described IMA business datum is: Inverse Multiplexing for ATM, the reverse multiple connection business datum of ATM; Described VCG business datum is: Virtual Container Group, virtual container set business datum.

The dispatching device of 12. 1 kinds of pseudo wire emulation systems, is characterized in that, comprising:

Network side data receiving element, the miscellaneous service data that send over for receiving Ethernet side, arrive different memory spaces according to different business by the miscellaneous service data buffer storage of described network side, and split out respective frame structure;

Network side data processing unit, for by the described business datum process interconnection that splits out the network side of respective frame structure, then carries out through the optical interface of SDH, exporting after expense insert handling, or directly by interface modular converter output PDH business datum;

Wherein, described network side data receiving element also for: the miscellaneous service data of described network side are carried out respectively to Virtual Concatenation processing, MLPPP-IMA are processed and CEP-CES processes and splits out the respective frame structure of miscellaneous service data, and carry out the restructuring of described frame structure;

Wherein, described MLPPP-IMA is treated to: Multi Link PPP-Inverse Multiplexing for ATM, and the reverse multiple connection of Multi-Link Point-to-Point Protocol ATM is processed;

Described CEP-CES is treated to: Circuit Emulation Service-Circuit Emulation over Packet, circuit emulation service-packet-based circuit simulation is processed.

13. install as claimed in claim 12, it is characterized in that, described network side data processing unit, for carrying out described miscellaneous service data of carrying out the network side after frame structure restructuring low-order pointer generation module, the insertion of low order expense, exporting from SDH optical interface after high-order Pointer generator module, high-order overhead insertion and section overhead insert.

14. install as described in claim 12 or 13, it is characterized in that, described miscellaneous service data comprise: CES business datum, CEP business datum, MLPPP business datum, IMA business datum and VCG business datum;

Wherein, described CES business datum is: Circuit Emulation Service, circuit emulation service data; Described CEP business datum is: Circuit Emulation over Packet, packet-based circuit emulation service data; Described MLPPP business datum is: Multi Link Point to Point Protocol, PPP Multilink business datum; Described IMA business datum is: Inverse Multiplexing for ATM, the reverse multiple connection business datum of ATM; Described VCG business datum is: Virtual Container Group, virtual container set business datum.