CN102637415B - Liquid crystal display device and drive method thereof - Google Patents

Abstract

The invention provides a liquid crystal display device and a driving method thereof, and relates to the technical field of liquid crystal displays. Wherein, the driving method includes: in the first stage of the theoretical writing period of the display data of the pixel electrode, outputting the display data signal to the pixel electrode of the current charging row through the data line; In the second phase of the theoretical write cycle, the connection between the data line and the pixel electrode of the current charging row is disconnected, and then a reference voltage signal is applied on the data line, so that the potential of the data line reaches a reference voltage , wherein the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range. The invention can improve the image display quality of the liquid crystal display device.

Description

A liquid crystal display device and its driving method

technical field

The invention relates to the technical field of liquid crystal displays, in particular to a liquid crystal display device and a driving method thereof.

Background technique

Thin film transistor liquid crystal display (TFT-LCD) has the advantages of thinness, low power consumption and strong portability, and is widely used in televisions, computers and other display devices.

The schematic diagram of the structure of a traditional thin film transistor liquid crystal display is shown in Figure 1, which includes a liquid crystal panel 14, a gate driver 13 and a source driver 11 for controlling the liquid crystal panel 14, and a gate driver 13 and a source driver for controlling the liquid crystal panel 14. 14 timing controller 12, and a common voltage circuit 15 providing common voltage. The liquid crystal panel 14 includes a plurality of gate lines 143 arranged in parallel and at equal intervals, a common voltage line 145 arranged in parallel with the gate lines 143 and at equal intervals, a plurality of data lines 141 arranged perpendicularly to the gate lines 143, and a plurality of The sub-pixel unit 142 defined by the intersection of the gate line 143 and the data line 141 . The sub-pixel unit 142 includes a thin film transistor 1421 , a pixel electrode and a common electrode (only the thin film transistor 1421 is shown in the figure). The TFT 1421 includes a gate, a source and a drain, respectively connected to the gate line 143 , the data line 141 and the pixel electrode. The pixel electrode, the common electrode and the liquid crystal layer sandwiched between them form a liquid crystal capacitor C2; the pixel electrode, the common voltage line 145 and the insulating layer between them form a storage capacitor C1.

The gate line 143 is connected to the gate driver 13 , and the data line 141 is connected to the source driver 11 . The common voltage circuit 15 is connected to the common electrode through the common voltage line 145, which is a common voltage for the common electrode. The conventional structure of the source driver 11 is shown in FIG. 2 , including a shift register, a data temporary register, a potential shifter, a digital-to-analog converter and an output circuit. Among them, the shift register is used to sequentially control the reading of display data corresponding to each data line; the data temporary register temporarily stores the display data of each row of sub-pixel units, and throws the display data to the The digital-to-analog converter is used to convert an analog voltage signal and transmit it to the corresponding data line 141 through the output circuit. Under the control of the timing signal generated by the timing controller 12 , the gate driver 13 generates a scan signal to turn on the thin film transistors corresponding to the charging row. At the same time, under the control of the timing signal generated by the timing controller 12, the source driver 11 transmits the analog voltage signal generated by itself to the corresponding data line 141, and applies the analog voltage signal to the pixel electrode through the thin film transistor, and the corresponding The liquid crystal capacitor C2 and the storage capacitor C1 are charged. Before the next frame scan signal arrives, the storage capacitor C1 keeps the liquid crystal capacitor C2 at a stable gray scale voltage. The liquid crystal molecules between the common electrode and the pixel electrode are deflected under the action of the gray-scale voltage to control the luminous flux passing through the liquid crystal panel.

In addition to the liquid crystal capacitor C2 and the storage capacitor C1, there are also a large number of parasitic capacitances in thin film transistor liquid crystal displays, such as the gate-source parasitic capacitance between the gate and the source of the thin film transistor, the parasitic capacitance between the gate and the drain, and the data line and the common electrode. The parasitic capacitance between, etc. The parasitic capacitance between the data line and the common electrode will cause capacitive coupling between the data line and the common electrode, causing the voltage of the common electrode to shift relative to the common voltage output by the common voltage circuit. In some screens, the coupling effect will be amplified, resulting in problems such as crosstalk, green color and flicker in the displayed image. Liquid crystal display devices based on conventional structures and driving methods are difficult to avoid the above-mentioned problems.

Contents of the invention

The technical problem to be solved by the present invention is to provide a liquid crystal display device and a driving method thereof, which are used to improve the image display quality of the liquid crystal display device.

In order to solve the problems of the technologies described above, the present invention provides the following solutions:

A method for driving a liquid crystal display device, the liquid crystal display device comprising a common voltage circuit, a gate line, a data line, and a plurality of sub-pixel units defined by intersections of the gate lines and data lines; the sub-pixel units include pixel electrodes and a common electrode corresponding to the pixel electrode, the common electrode is connected to a common voltage circuit; the driving method includes:

In the first stage of the theoretical writing cycle of the display data of the pixel electrodes, the display data signals are output to the pixel electrodes of the current charging row through the data lines;

And, in the second stage of the theoretical writing period of the display data of the pixel electrodes, disconnect the connection between the data lines and the pixel electrodes of the current charging row, and then apply a reference voltage signal on the data lines, so that the The potential of the data line reaches a reference voltage, wherein the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range.

Preferably, in the above driving method,

The sub-pixel unit also includes a thin film transistor, the gate, source and drain of the thin film transistor are respectively connected to the corresponding gate line, data line and pixel electrode;

Said outputting the display data signal to the pixel electrode of the current charging row through said data line includes:

Turning on the thin film transistors in the current charging row, so as to control the corresponding connection between the data line and the pixel electrodes in the current charging row through the thin film transistors;

The display data signal is output on the data line, so that the voltage of the pixel electrode corresponding to the charging row is charged to the potential corresponding to the display data signal.

Preferably, in the above driving method,

In the second stage, the connection between the data line and the pixel electrode of the current charging row is further cut off by turning off the thin film transistor of the current charging row.

Preferably, in the above driving method, the reference voltage is equal to the common voltage output by the common voltage circuit.

The present invention also provides a liquid crystal display device, comprising a common voltage circuit, a gate line, a data line, and a plurality of sub-pixel units defined by intersections of the gate lines and data lines; the sub-pixel units include pixel electrodes and A common electrode provided corresponding to the pixel electrode, the common electrode is connected to a common voltage circuit;

The liquid crystal display device also includes:

The potential control unit is used to output the display data signal to the pixel electrode of the current charging row through the data line in the first stage of the theoretical writing period of the display data of the pixel electrode; and, in the theoretical display data of the pixel electrode In the second stage of the writing cycle, disconnect the connection between the data line and the pixel electrode of the current charging row, and then apply a reference voltage signal on the data line, so that the potential of the data line reaches a reference voltage, wherein , the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range.

Preferably, in the above-mentioned liquid crystal display device, the sub-pixel unit further includes a thin film transistor, the gate, source and drain of the thin film transistor are respectively connected to the corresponding gate line, data line and pixel electrode; The potential control unit specifically includes:

The gate driver is used to output a turn-on signal for turning on the thin film transistors of each sub-pixel unit in the current charging row through the gate line in the first stage; and, in the second stage, output through the gate line Outputting a cut-off signal for turning off the thin film transistors of each sub-pixel unit in the current charging row;

a timing controller, configured to generate a first trigger signal corresponding to the first stage, and generate a second trigger signal corresponding to the second stage, wherein the second trigger signal is output after the cut-off signal produce;

a source driver, configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line according to the trigger of the first trigger signal; and receive the second trigger signal, and output the reference voltage signal to the data line according to the trigger of the second trigger signal.

Preferably, in the above-mentioned liquid crystal display device, the source driver includes a shift register, a first data register, a second data register, a digital-to-analog converter, and an output circuit;

Wherein, the shift register is used to sequentially control the reading of display data and reference voltage data corresponding to each data line;

The first data temporary register is used to obtain and temporarily store the display data of the current charging row from the shift register, and output the display data to the digital-to-analog converter according to the triggering of the first trigger signal device;

The second data temporary register is used to obtain and temporarily store the reference voltage data of the current charging row from the shift register, and output the reference voltage data to the data register according to the triggering of the second trigger signal. analog converter;

The digital-to-analog converter is used to perform digital-to-analog conversion on the received digital signal to obtain a corresponding analog voltage signal, and output it to a corresponding data line through the output circuit.

Preferably, the above-mentioned liquid crystal display device further includes:

a reference signal line corresponding to each row of sub-pixel units; and,

a common voltage line connected to the common voltage circuit, the voltage of the common voltage line is equal to the common voltage output by the common voltage circuit;

The sub-pixel unit also includes a first thin film transistor and a second thin film transistor; wherein, the gate, source and drain of the first thin film transistor are respectively connected to corresponding gate lines, data lines and pixel electrodes; The gate, source and drain of the second thin film transistor are respectively connected to the corresponding reference signal line, data line and the common voltage line;

The potential control unit specifically includes:

The gate driver is used to output a first turn-on signal for turning on the first thin film transistors of each sub-pixel unit in the current charging row through the gate line in the first stage; and in the second stage, through The gate line outputs a first cut-off signal for turning off the first thin film transistor of each sub-pixel unit in the current charging row;

a timing controller, configured to generate a first trigger signal corresponding to the first stage, and in the second stage, output through the reference signal line to turn on the second thin film of each sub-pixel unit in the current charging row a second turn-on signal for the transistor, wherein the second turn-on signal is output after the first turn-off signal;

The source driver is configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line according to the trigger of the first trigger signal.

Preferably, the above-mentioned liquid crystal display device further includes:

a reference signal line corresponding to each row of sub-pixel units; and,

a common voltage line connected to the common voltage circuit, the voltage of the common voltage line is equal to the common voltage output by the common voltage circuit;

The sub-pixel unit also includes a first thin film transistor and a second thin film transistor; wherein, the gate, source and drain of the first thin film transistor are respectively connected to corresponding gate lines, data lines and pixel electrodes; The gate, source and drain of the second thin film transistor are respectively connected to the corresponding reference signal line, data line and the common voltage line;

The potential control unit specifically includes:

The gate driver is used to output a first turn-on signal for turning on the first thin film transistors of each sub-pixel unit in the current charging row through the gate line in the first stage; and in the second stage, through The gate line outputs a first turn-off signal for turning off the first thin film transistor of each sub-pixel unit in the current charging row, and in the second stage, outputs a signal for turning on each sub-pixel in the current charging row through the reference signal line a second turn-on signal of the second thin film transistor of the unit, wherein the second turn-on signal is output after the first turn-off signal;

a timing controller, configured to generate a first trigger signal corresponding to the first stage;

The source driver is configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line according to the trigger of the first trigger signal.

Preferably, in the above liquid crystal display device, the reference voltage is equal to the common voltage output by the common voltage circuit.

It can be seen from the above that the liquid crystal display device and its driving method provided by the present invention divide the theoretical writing period of the display data of the pixel electrode into a first stage and a second stage: The pixel electrode is charged by the display data signal, and the voltage of the data line is adjusted to a reference voltage while maintaining the voltage of the pixel electrode in the second stage, and the reference voltage is equal to or close to the common voltage output by the common voltage circuit for use in Compensating the influence of the parasitic capacitance between the data line and the common electrode on the voltage of the common electrode to reduce or eliminate the influence of the parasitic capacitance on the voltage of the common electrode, thereby improving or eliminating the crosstalk of the display image caused by the above-mentioned parasitic capacitance, Green Fu and Flicker (Flicker) and other problems have improved the display quality of the image.

Description of drawings

FIG. 1 is a schematic structural view of a thin film transistor liquid crystal display in the prior art;

FIG. 2 is a schematic structural diagram of a source driver in the prior art;

3 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present invention;

4 is a schematic structural diagram of a source driver according to an embodiment of the present invention;

5 is a schematic diagram of the timing relationship between the trigger signals TS1, TS2 and the cut-off signal OE1 in the embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a liquid crystal display device according to another embodiment of the present invention.

Detailed ways

The present invention provides a liquid crystal display device and its driving method, by dividing the theoretical writing period of display data of the pixel electrode into the first stage and the second stage: The electrode is charged, and the voltage of the data line is adjusted to a reference voltage at the second stage while maintaining the voltage of the pixel electrode, and the reference voltage is equal to or close to the common voltage output by the common voltage circuit. Through this processing method, the present invention compensates the influence of the parasitic capacitance between the data line and the common electrode on the voltage of the common electrode, so as to reduce or eliminate the influence of the parasitic capacitance on the voltage of the common electrode, thereby improving or eliminating the influence caused by the above parasitic capacitance. The display image crosstalk, green pay and flicker (Flicker) and other problems, improve the display quality of the image.

The present invention will be further described through specific embodiments below in conjunction with the accompanying drawings.

The driving method of the liquid crystal display device provided by the embodiment of the present invention is applied to a liquid crystal display device. The liquid crystal display device includes a common voltage circuit, a gate line, a data line, and a plurality of sub-pixel units defined by intersections of the gate line and the data line; the sub-pixel units include a pixel electrode and a common electrodes, and the common electrodes are connected to the common voltage circuit.

The driving method of the liquid crystal display device provided in this embodiment specifically includes:

In the first stage, the display data signal is output to the pixel electrode of the current charging row through the data line;

And, in the second stage of the theoretical writing period of the display data of the pixel electrodes, disconnect the connection between the data lines and the pixel electrodes of the current charging row, and then apply a reference voltage signal on the data lines, so that the The potential of the data line reaches a reference voltage, wherein the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range. Preferably, the reference voltage is equal to the common voltage output by the common voltage circuit.

Here, the theoretical writing period T of the display data of the pixel electrodes is predetermined. For example, if the liquid crystal display device displays N frames of images per second, and there are L rows of sub-pixel units on the liquid crystal panel, then T=1/N*L can be determined. In this theoretical writing period T, the display data signal output by the source driver charges the pixel electrodes of the sub-pixel units in the current charging row, so that the pixel electrodes reach the corresponding potential. Usually, the pixel electrode only needs a short time to reach the corresponding potential, that is, at the later stage of the theoretical writing period T, the charging has ended.

Therefore, this embodiment divides the theoretical writing cycle into the first stage and the second stage. In the first stage, the display data signal is output to the pixel electrode of the current charging row through the data line to charge the pixel electrode, so that the corresponding The voltage of the pixel electrode of the charging row is charged to the potential corresponding to the display data signal; in the second stage, the data line is controlled to be disconnected from the pixel electrode of the current charging row to maintain the potential of the pixel electrode, and The potential of the data line is pulled back to a reference potential, and the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range, for example, the difference is between -0.1V and 0.1V, so that the reference The potential is close to the common voltage output by the common voltage circuit, that is to say, the potential of the data line is very close to the potential of the common electrode, so that the influence of the above-mentioned parasitic capacitance on the voltage of the common electrode can be reduced or eliminated, and the influence caused by the above-mentioned parasitic capacitance can be improved or eliminated. The problem of crosstalk, green color and flicker (Flicker) of the displayed image can be solved, and the display quality of the image can be improved.

Liquid crystal display devices usually have two working modes, normally black mode and normally white mode. In this embodiment, when the liquid crystal display device is in a normally white mode, the reference voltage signal is a white state signal; when the liquid crystal display device is in a normally black mode, the reference voltage signal is a black state signal.

In the liquid crystal display device of this embodiment, each sub-pixel unit further includes a thin film transistor, and the gate, source and drain of the thin film transistor are respectively connected to the corresponding gate line, data line and pixel electrode. That is, the gate of the thin film transistor is connected to the corresponding gate line, the source is connected to the corresponding data line, and the drain is connected to the pixel electrode of the sub-pixel unit. Therefore, in the first stage, this embodiment controls the corresponding connection between the data line and the pixel electrode of the current charging row through the thin film transistor by turning on the thin film transistor in the current charging row, and then, in the The display data signal is output on the data line, so that the voltage of the pixel electrode corresponding to the charging row is charged to the potential corresponding to the display data signal. In the second stage, the connection between the data line and the pixel electrode of the current charging row is further cut off by turning off the thin film transistor of the current charging row.

A liquid crystal display device employing the above driving method will be described below.

A liquid crystal display device provided by the present invention includes a common voltage circuit, a gate line, a data line, and a plurality of sub-pixel units defined by intersections of the gate line and the data line; the sub-pixel unit includes a pixel electrode and the The pixel electrodes correspond to the common electrodes, and the common electrodes are connected to the common voltage circuit. Wherein, the liquid crystal display device also includes:

A potential control unit, used to output the display data signal to the pixel electrode of the current charging row through the data line in the first stage of the theoretical writing period of the display data of the pixel electrode; and, during the display data of the pixel electrode In the second stage of the theoretical writing cycle, disconnect the connection between the data line and the pixel electrode of the current charging row, and then apply a reference voltage signal on the data line, so that the potential of the data line reaches a reference voltage, Wherein, the difference between the reference voltage and the common voltage output by the common voltage circuit is within a preset range. Preferably, the reference voltage is equal to the common voltage output by the common voltage circuit.

The following further illustrates the specific structure of the liquid crystal display device of the present invention through two specific embodiments.

Please refer to FIG. 3, a liquid crystal display device according to an embodiment of the present invention includes:

A liquid crystal panel 34 , a gate driver 33 , a source driver 31 , a timing controller 32 and a common voltage circuit 35 providing a common voltage. Wherein, the liquid crystal panel 34 includes a plurality of parallel grid lines 343 arranged at equal intervals and a common voltage line 345 arranged parallel to the gate lines 343 at equal intervals, a plurality of data lines 341 arranged perpendicularly to the gate lines 343, and A plurality of sub-pixel units 342 defined by intersections of gate lines 343 and data lines 341 . The sub-pixel unit 342 includes a thin film transistor 3421, a pixel electrode and a common electrode (only the thin film transistor 3421 is shown in the figure). The common electrode is connected to the common voltage circuit 35 through the common voltage line 345 , so that the common voltage circuit 35 outputs a common voltage to the common electrode through the common voltage line 345 . The gate of the thin film transistor 3421 is connected to the corresponding gate line 343 , the source is connected to the corresponding data line 341 , and the drain is connected to the pixel electrode of the sub-pixel unit to which the thin film transistor 3421 belongs. The pixel electrode, the common electrode and the liquid crystal layer sandwiched between them form a liquid crystal capacitor C2; the pixel electrode, the common voltage line 345 and the insulating layer between them form a storage capacitor C1.

In this embodiment, the function of the potential control unit is realized by the gate driver, timing controller and source driver, wherein,

The gate driver 33 is configured to output a turn-on signal for turning on the thin film transistor 3421 of each sub-pixel unit in the current charging row through the gate line 343 in the first stage; and, in the second stage , outputting an off signal for turning off the thin film transistor 3421 of each sub-pixel unit in the current charging row through the gate line 343;

The timing controller 32 is configured to generate a first trigger signal corresponding to the first stage, and generate a second trigger signal corresponding to the second stage, wherein the second trigger signal is Generated after the signal output;

The source driver 31 is configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line 341 according to the trigger of the first trigger signal; the second trigger signal, and output the reference voltage signal to the data line 341 according to the trigger of the second trigger signal.

The structure of the source driver 31 in this embodiment is shown in FIG. 4 , which specifically includes a shift register, a first data register, a second data register, a digital-to-analog converter and an output circuit.

Wherein, the shift register is used to sequentially control the reading of display data and reference voltage data corresponding to each data line;

The first data temporary register is used to obtain and temporarily store the display data of the current charging row from the shift register, and output the display data to the digital-to-analog converter according to the triggering of the first trigger signal device;

The second data temporary register is used to obtain and temporarily store the reference voltage data of the current charging row from the shift register, and output the reference voltage data to the data register according to the triggering of the second trigger signal. analog converter;

The digital-to-analog converter is used to perform digital-to-analog conversion on the received digital signal to obtain a corresponding analog voltage signal, and output it to a corresponding data line through the output circuit.

It can be seen that in the liquid crystal display device of this embodiment, the source driver 31 includes two data temporary registers, wherein the first data temporary register temporarily stores the display data of the sub-pixel unit, and the second data temporary register temporarily stores the reference Voltage data (when the liquid crystal display device works in the normally white mode, the reference voltage data is the data corresponding to the white state signal; when the liquid crystal display device works in the normally black mode, the reference voltage data is the data corresponding to the black state signal). Moreover, the first and second data temporary registers are triggered by different trigger signals. For example, there are two trigger signals TS1 and TS2. When TS1 is at a high level, the data in the first data temporary register can be thrown out. When TS2 is high level, the data in the second data temporary register is thrown out.

The theoretical writing time of display data corresponding to each row of sub-pixel units is divided into two stages. In the first stage, under the control of the timing signal of the timing controller, the gate driver turns on the thin film transistors corresponding to the sub-pixel units of the charging row, and at the same time, the trigger signal TS1 is at a high level to transfer the data in the first data temporary register through the digital-analog The converter and output circuit are applied to the data line, thereby charging all the pixel electrodes of the corresponding charging row. In the second stage, under the control of the cut-off signal OE1 generated by the timing controller, the gate driver turns off all the thin-film transistors in the corresponding charging row, and at the same time the thin-film transistors in the next row are also in the off state, and then outputs a high-level trigger signal TS2, The reference voltage data in the second data temporary register is applied to the data line through the digital-to-analog converter and the output circuit, and at this time, the compensation for the common voltage offset is mainly performed. In this embodiment, the timing relationship between the trigger signals TS1 , TS2 and the cut-off signal OE1 is shown in FIG. 5 .

Please refer to FIG. 6, a liquid crystal display device provided by another embodiment of the present invention includes:

A liquid crystal panel 64 , a gate driver 63 , a source driver 61 , a timing controller 62 and a common voltage circuit 65 for providing a common voltage. Wherein, the liquid crystal panel 64 includes a plurality of gate lines 643 parallel and equally spaced, common voltage lines 645 parallel to the gate lines 643 and equally spaced, a plurality of data lines 641 perpendicular to the gate lines 643, and A plurality of sub-pixel units 642 defined by intersections of gate lines 643 and data lines 641 . The common electrode is connected to the common voltage circuit 65 through the common voltage line 645 , so that the common voltage circuit 65 outputs a common voltage to the common electrode.

Each sub-pixel unit 642 in this embodiment includes two thin film transistors (a first thin film transistor 6421 and a first thin film transistor 6422 ), a pixel electrode and a common electrode (the pixel electrode and the common electrode are not shown in the figure). Here, the common electrode is connected to the common voltage circuit 65 through the common voltage line 645, so that the common voltage circuit 65 outputs a common voltage to the common electrode through the common voltage line 645, and the voltage of the common voltage line 645 is equal to that of the common voltage circuit 65. output common voltage. The pixel electrode, the common electrode and the liquid crystal layer sandwiched between them form a liquid crystal capacitor C2; the pixel electrode, the common voltage line 645 and the insulating layer between them form a storage capacitor C1.

Wherein, the gate of the first thin film transistor 6421 is connected to the corresponding gate line 643 , the source is connected to the corresponding data line 641 , and the drain is connected to the pixel electrode of the sub-pixel unit to which the thin film transistor 6421 belongs. The gate of the second TFT 6422 is connected to the corresponding reference signal line, the source is connected to the corresponding data line 641 , and the drain is connected to the common voltage line 645 .

In this embodiment, the liquid crystal display device further includes: a reference signal line 647 corresponding to each row of sub-pixel units, the reference signal line 647 may be parallel to the gate line 643, and the number of the two is equal.

In this embodiment, the function of the potential control unit is realized by the gate driver, timing controller and source driver, wherein,

The gate driver is configured to output a first turn-on signal for turning on the first thin film transistors of each sub-pixel unit in the current charging row through the gate line in the first stage; and in the second stage , outputting a first cut-off signal for turning off the first thin film transistor of each sub-pixel unit in the current charging row through the gate line;

The timing controller is configured to generate a first trigger signal corresponding to the first stage, and in the second stage, output the first trigger signal for turning on each sub-pixel unit of the current charging row through the reference signal line. A second turn-on signal for the two thin film transistors, wherein the second turn-on signal is output after the first turn-off signal;

The source driver is configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line according to the trigger of the first trigger signal.

It can be seen that the second conduction signal output on the reference signal line in FIG. 6 is generated by the timing controller. Of course, the second conduction signal in this embodiment can also be generated by other modules, such as a gate driver. At this time, the function of the potential control unit is through the following gate driver, timing controller and source pole driver is implemented where,

The gate driver is configured to output a first turn-on signal for turning on the first thin film transistors of each sub-pixel unit in the current charging row through the gate line in the first stage; and in the second stage , outputting the first cut-off signal for turning off the first thin film transistor of each sub-pixel unit of the current charging row through the gate line, and outputting through the reference signal line in the second stage for turning on each sub-pixel unit of the current charging row A second turn-on signal of the second thin film transistor of the sub-pixel unit, wherein the second turn-on signal is output after the first turn-off signal;

The timing controller is configured to generate a first trigger signal corresponding to the first stage;

The source driver is configured to receive the first trigger signal, and output the display data signal to the pixel electrode of the current charging row through the data line according to the trigger of the first trigger signal.

The above is only the embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be regarded as Be the protection scope of the present invention.

Claims (10)

1. a driving method for liquid crystal indicator, described liquid crystal indicator comprises common electric voltage circuit, gate line, data line, a plurality ofly by gate line and data line, intersects the sub-pixel unit defining; Described sub-pixel unit comprise pixel electrode and with the public electrode of the corresponding setting of described pixel electrode, described public electrode is connected with common electric voltage circuit; It is characterized in that, described driving method comprises:

First stage in the theoretical write cycle of the demonstration data of pixel electrode, by described data line, display data signal is exported to the pixel electrode of current charging row;

And, subordinate phase in the theoretical write cycle of the demonstration data of pixel electrode, disconnect being connected of pixel electrode of described data line and current charging row, then on described data line, apply reference voltage signal, so that the current potential of described data line reaches a reference voltage, wherein, the difference of the common electric voltage of described reference voltage and the output of described common electric voltage circuit is in a preset range.

2. driving method as claimed in claim 1, is characterized in that,

Described sub-pixel unit also comprises a thin film transistor (TFT), and the grid of described thin film transistor (TFT), source electrode and leakage level are connected with corresponding gate line, data line and pixel electrode respectively;

The described pixel electrode that exports display data signal to current charging row by described data line comprises:

The described thin film transistor (TFT) of the current charging row of conducting, is connected by described thin film transistor (TFT) is corresponding to control the pixel electrode of described data line and current charging row;

Output display data-signal on described data line, so that described voltage to the capable pixel electrode of inductive charging is charged to current potential corresponding to described display data signal.

3. driving method as claimed in claim 2, is characterized in that,

In described subordinate phase, by ending the described thin film transistor (TFT) of current charging row, to disconnect being connected of pixel electrode of described data line and current charging row.

4. driving method as claimed in claim 1, is characterized in that, described reference voltage equals the common electric voltage of described common electric voltage circuit output.

5. a liquid crystal indicator, comprises common electric voltage circuit, gate line, data line, a plurality of sub-pixel unit being defined by gate line and data line intersection; Described sub-pixel unit comprise pixel electrode and with the public electrode of the corresponding setting of described pixel electrode, described public electrode is connected with common electric voltage circuit;

It is characterized in that, described liquid crystal indicator also comprises:

Control of Electric potentials unit, the first stage for the theoretical write cycle of the demonstration data at pixel electrode, exports display data signal to by described data line the pixel electrode of current charging row; And, subordinate phase in the theoretical write cycle of the demonstration data of pixel electrode, disconnect being connected of pixel electrode of described data line and current charging row, then on described data line, apply reference voltage signal, so that the current potential of described data line reaches a reference voltage, wherein, the difference of the common electric voltage of described reference voltage and the output of described common electric voltage circuit is in a preset range.

6. liquid crystal indicator as claimed in claim 5, is characterized in that, described sub-pixel unit also comprises a thin film transistor (TFT), and the grid of described thin film transistor (TFT), source electrode and leakage level are connected with corresponding gate line, data line and pixel electrode respectively; Described control of Electric potentials unit specifically comprises:

Gate drivers, in the described first stage, exports the Continuity signal for the thin film transistor (TFT) of each sub-pixel unit of the current charging row of conducting by gate line; And, in described subordinate phase, by gate line, export for ending the pick-off signal of the thin film transistor (TFT) of current each sub-pixel unit of charging row;

Time schedule controller, for generation of the first trigger pip corresponding to the described first stage, and produces the second trigger pip corresponding to described subordinate phase, and wherein, described the second trigger pip produces after described pick-off signal output;

Source electrode driver, for receiving described the first trigger pip, and according to the triggering of described the first trigger pip, exports display data signal to by described data line the pixel electrode of current charging row; And receive described the second trigger pip, and according to the triggering of described the second trigger pip, to described data line, export described reference voltage signal.

7. liquid crystal indicator as claimed in claim 6, is characterized in that, described source electrode driver comprises shift register, the first data working storage, the second data working storage, digital to analog converter and output circuit;

Wherein, described shift register, for reading of demonstration data corresponding to every data line of sequential control and reference voltage data;

Described the first data working storage, for obtaining the demonstration data of current charging row from described shift register and keeping in, and according to the triggering of described the first trigger pip, exports demonstration data to described digital to analog converter;

Described the second data working storage, for obtaining the reference voltage data of current charging row from described shift register and keeping in, and according to the triggering of described the second trigger pip, exports described digital to analog converter to reference to voltage data;

Described digital to analog converter, for the digital signal receiving is carried out to digital-to-analog conversion, obtains corresponding analog voltage signal, and exports corresponding data line to by described output circuit.

8. liquid crystal indicator as claimed in claim 5, is characterized in that, also comprises:

Reference signal line with the corresponding setting of every a line sub-pixel unit; And,

With the public pressure wire that described common electric voltage circuit is connected, the voltage of described public pressure wire equals the common electric voltage of described common electric voltage circuit output;

Described sub-pixel unit also comprises the first film transistor and the second thin film transistor (TFT); Wherein, the transistorized grid of described the first film, source electrode and leakage level, be connected with corresponding gate line, data line and pixel electrode respectively; The grid of described the second thin film transistor (TFT), source electrode and leakage level, be connected with corresponding reference signal line, data line and described public pressure wire respectively;

Described control of Electric potentials unit specifically comprises:

Gate drivers, in the described first stage, exports transistorized the first Continuity signal of the first film for each sub-pixel unit of the current charging row of conducting by gate line; And in described subordinate phase, by gate line, export for ending transistorized first pick-off signal of the first film of current each sub-pixel unit of charging row;

Time schedule controller, for generation of the first trigger pip corresponding to the described first stage, and in described subordinate phase, the second Continuity signal by described reference signal line output for the second thin film transistor (TFT) of each sub-pixel unit of the current charging row of conducting, wherein, described the second Continuity signal is exported after described the first pick-off signal;

Source electrode driver, for receiving described the first trigger pip, and according to the triggering of described the first trigger pip, exports display data signal to by described data line the pixel electrode of current charging row.

9. liquid crystal indicator as claimed in claim 5, is characterized in that, also comprises:

Reference signal line with the corresponding setting of every a line sub-pixel unit; And,

With the public pressure wire that described common electric voltage circuit is connected, the voltage of described public pressure wire equals the common electric voltage of described common electric voltage circuit output;

Described sub-pixel unit also comprises the first film transistor and the second thin film transistor (TFT); Wherein, the transistorized grid of described the first film, source electrode and leakage level, be connected with corresponding gate line, data line and pixel electrode respectively; The grid of described the second thin film transistor (TFT), source electrode and leakage level, be connected with corresponding reference signal line, data line and described public pressure wire respectively;

Described control of Electric potentials unit specifically comprises:

Gate drivers, in the described first stage, exports transistorized the first Continuity signal of the first film for each sub-pixel unit of the current charging row of conducting by gate line; And in described subordinate phase, by gate line, export for ending transistorized first pick-off signal of the first film of current each sub-pixel unit of charging row, and in described subordinate phase, the second Continuity signal by described reference signal line output for the second thin film transistor (TFT) of each sub-pixel unit of the current charging row of conducting, wherein, described the second Continuity signal is exported after described the first pick-off signal;

Time schedule controller, for generation of the first trigger pip corresponding to the described first stage;

Source electrode driver, for receiving described the first trigger pip, and according to the triggering of described the first trigger pip, exports display data signal to by described data line the pixel electrode of current charging row.

10. the liquid crystal indicator as described in as arbitrary in claim 5 to 9, is characterized in that, described reference voltage equals the common electric voltage of described common electric voltage circuit output.

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