CN102722684B - Analog multiplier - Google Patents
Analog multiplier Download PDFInfo
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- CN102722684B CN102722684B CN201210182804.9A CN201210182804A CN102722684B CN 102722684 B CN102722684 B CN 102722684B CN 201210182804 A CN201210182804 A CN 201210182804A CN 102722684 B CN102722684 B CN 102722684B
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- analog multiplier
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Abstract
The invention discloses an analog multiplier which comprises two operational amplifiers, a set of divider resistors and a set of switch transmission gates. The first operational amplifier is connected with an input end of the second operational amplifier electrically, and the first operational amplifier is connected with an output end of the second operational amplifier through the set of divider resistors. One ends of the switch transmission gates are spliced together, and the other ends of the switch transmission gates are connected onto the divider resistors respectively. Currently designs of modules of modulation, demodulation, detection and the like of signals are achieved by using an analog multiplier with a traditional structure. Multiplication of analog signals is achieved by utilizing the operational amplifiers and switch signals, the implementation manner is clear in design thought and simple in design structure, design difficulty is relieved in actual design of a related integrated circuit, and design efficiency of the circuit is improved.
Description
Technical field
The present invention relates to a kind of analog multiplier, particularly relate to a kind of analog multiplier utilizing amplifier and switching signal to realize, belong to integrated circuit (IC) design technical field.
Background technology
Analog multiplier is widely used in the modulation of signal, demodulation, the field such as detection and mixing.The analog multiplier of current widespread use is Gilbert multiplier, also cries Double deference to analog multiplier.Its structure as shown in Figure 1.Us, Vs are incoherent 2 input signals mutually, and Uo is that multiplier exports, Uo=k*Us*Vs.As seen from the figure, to realize multiplying, T1-T6 must operate at amplification region, and therefore this structure has high requirement to quiescent biasing, and when in figure transistor base and the function effect of emitter resistance to this structure huge, therefore this structure is very high to production engineering specifications.
Summary of the invention
The defect that the present invention seeks to exist for prior art provides a kind of analog multiplier utilizing amplifier and switching signal to realize, in integrated circuit design by the characteristic of reasonable analysis amplifier, controlled to select different amplifiers to output signal by switching signal again, realize the multiplying of simulating signal at output terminal.
The present invention for achieving the above object, adopts following technical scheme: a kind of analog multiplier, and described analog multiplier utilizes amplifier and switching signal to realize; It comprises two operational amplifiers, a component piezoresistance and one group of switch transmission gate; Described first operational amplifier and the electrical connection of the second opamp input terminal, its output terminal is connected by a component piezoresistance; One end of described switch transmission gate connects together, and the other end is connected on divider resistance respectively.
Further, the switching signal controlling described switch transmission gate is one group of signal, and this group signal entirety forms a sinusoidal wave switching signal.
Further, the structure of described two operational amplifiers is identical.
Beneficial effect of the present invention: all adopt the analog multiplier of traditional structure to realize at present in the design of the module such as modulation, demodulation, detection of signal, the multiplying of the present invention by utilizing amplifier and switching signal namely to achieve simulating signal, this kind of implementation mentality of designing is clear, project organization is simple, in the actual design of integrated circuit related with same, simplify design difficulty, improve the design efficiency of circuit.
Accompanying drawing explanation
Fig. 1 gilbert analog multiplier structural drawing; Fig. 2 amplifier and switching signal realize the structural drawing of multiplier;
The control signal of Fig. 3 switch transmission gate.
Embodiment
Figure 1 shows that Gilbert multiplier structural drawing, the principle of work of this multiplier is:
ic1- ic2= ic5*th(Ux/VT);
ic3- ic4= ic6*th(Ux/VT);
ic5- ic6= I1*th(2 Uy/VT);
io1- io2= (ic1+ic3)- (ic2+ic4)= (ic1- ic2)- (ic3- ic4)
=(ic5-ic6)* th(Ux/VT)= I1*th(2 Uy/VT)* th(Ux/VT)
When Ux " 2VT, and Uy " 2VT, time,
io1- io2≈I1/4VT
2*Ux*Uy;
Uo=-（io1- io2）*R≈I1*R/4VT
2*Ux*Uy；
Shown in Fig. 2, be the concrete structure of analog multiplier of the present invention, its method utilizing double operational and switch transmission gate to realize multiplier comprises two operational amplifiers, one group of series connection divider resistance, one group of switch transmission gate.Described first operational amplifier and the electrical connection of the second opamp input terminal, its output terminal is connected by a component piezoresistance; One end of described switch transmission gate connects together, and the other end is connected on divider resistance respectively.Wherein, the switching signal controlling described switch transmission gate is one group of signal, and this group signal entirety forms a sinusoidal wave switching signal.
The DC reference Vref current potential of the operational amplifier that two structures are identical is consistent, so it be unanimously Vref that operational amplifier exports DC potential, the DC potential on series connection divider resistance is Vref, so switch transmission gate output DC potential is Vref.
Suppose that A point signal is A; B point signal is B.The common-mode signal of A, B point is (A+B)/2; The difference mode signal of A, B point is (A-B)/2; The control signal of switch transmission gate as shown in Figure 3; Between AB point, each point common-mode signal is all identical, so the common-mode signal no matter which storbing gate conducting exports is (A+B)/2; Difference mode signal between AB point is (A-B)/2, and after switch transmission gate is selected, output signal is [(A-B)/2] * SinC or [(A-B)/2] * CosC; (SinC/CosC is switching signal waveform), the output signal of this structure is then (A+B)/2+[(A-B)/2] * SinC or (A+B)/2+[(A-B)/2] * CosC.Therefore, this structure achieves the multiplying of sinusoidal signal that switching signal comprises and amplifier input signal.The occasions such as this structure is mainly used in stereophonic signal demodulation, the phase demodulation of sinusoidal signal detection and sinusoidal signal.
If amplifier input signal is SinX, if then the gain of amplifier is identical, phase place is then K*SinX*SinC or K*SinX*CosC according to inference this structure output known above on the contrary.(K is amplifier gain, and SinC, CosC are switching signal) this be this structure and do sinusoidal signal detection and phase demodulation purposes.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. an analog multiplier, is characterized in that, described analog multiplier utilizes amplifier and switching signal to realize; Comprise the first operational amplifier and the second operational amplifier two operational amplifiers, a component piezoresistance and one group of switch transmission gate; Described first operational amplifier and the electrical connection of the second opamp input terminal, output terminal is connected by hexad divider resistance; Described switch transmission gate has six switches, and one end of switch connects together, and the other end is connected on divider resistance respectively;
Described divider resistance is six resistance of ratio 1.8:5.0:3.2:3.2:5.0:1.8;
The switching signal controlling described switch transmission gate is hexad signal, and this group signal entirety forms a sinusoidal wave switching signal.
2. a kind of analog multiplier according to claim 1, is characterized in that, the structure of described two operational amplifiers is identical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210182804.9A CN102722684B (en) | 2012-06-05 | 2012-06-05 | Analog multiplier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210182804.9A CN102722684B (en) | 2012-06-05 | 2012-06-05 | Analog multiplier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102722684A CN102722684A (en) | 2012-10-10 |
| CN102722684B true CN102722684B (en) | 2015-03-11 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201210182804.9A Active CN102722684B (en) | 2012-06-05 | 2012-06-05 | Analog multiplier |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104048316B (en) * | 2014-05-23 | 2016-09-07 | 江苏海事职业技术学院 | A kind of air feed system being used for the auxiliary boiler of oil tanker based on analog multiplier |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6812769B1 (en) * | 2003-08-12 | 2004-11-02 | System Chemical Corp. | Switched charge multiplier-divider |
| CN101013462A (en) * | 2007-02-15 | 2007-08-08 | 姚侗 | Method and apparatus for parameter transformation analog signal multiplication |
| CN201270035Y (en) * | 2008-10-30 | 2009-07-08 | 上海大学 | Two types of four-quadrant analog multiplier |
| CN102045934A (en) * | 2011-01-14 | 2011-05-04 | 中国电子科技集团公司第四十五研究所 | Constant power control circuit for super high pressure mercury lamp |
-
2012
- 2012-06-05 CN CN201210182804.9A patent/CN102722684B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6812769B1 (en) * | 2003-08-12 | 2004-11-02 | System Chemical Corp. | Switched charge multiplier-divider |
| CN101013462A (en) * | 2007-02-15 | 2007-08-08 | 姚侗 | Method and apparatus for parameter transformation analog signal multiplication |
| CN201270035Y (en) * | 2008-10-30 | 2009-07-08 | 上海大学 | Two types of four-quadrant analog multiplier |
| CN102045934A (en) * | 2011-01-14 | 2011-05-04 | 中国电子科技集团公司第四十五研究所 | Constant power control circuit for super high pressure mercury lamp |
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| CN102722684A (en) | 2012-10-10 |
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Address after: No. 5, Xijin Road, Xinwu District, Wuxi City, Jiangsu Province, 214000 Patentee after: Wuxi Jingyuan Microelectronics Co.,Ltd. Address before: 214028 Room 209, Building A, Plot 106-C, Wuxi National High tech Industrial Development Zone, New District, Wuxi City, Jiangsu Province Patentee before: Wuxi Jingyuan Microelectronics Co.,Ltd. |