CN102760420B - Method for dithering display panel and relevant device - Google Patents

Abstract

The invention relates to a method and a related device for dithering on a display panel. The dithering method sets a dithering pattern, which includes a plurality of elements, and each element corresponds to a sub-pixel on the display panel. At least two of the plurality of elements have the same value, and at least two of the elements with the same value correspond to two sub-pixels with different driving polarities, so as to avoid flicker caused by the same driving polarity. When performing dithering, if the sub-pixel data corresponding to a sub-pixel corresponds to between two preset color levels that the sub-pixel can display, then according to the element corresponding to the sub-pixel and the sum of the sub-pixel data, the two The color scale that the sub-pixel should display is determined in the preset color scale.

Description

Method and related device for dithering on display panel

technical field

The present invention relates to a method of dithering on a display panel and a related device, in particular to a dithering method and a related device that consider driving polarity to avoid flickering phenomenon.

Background technique

Display panels are one of the most important human-machine interfaces in modern electronic systems. How to realize a display panel with good performance at a relatively low cost has become the research and development focus of modern electronic manufacturers.

Contents of the invention

The display panel uses a plurality of pixels to display each frame in the image data. And each pixel (pixel) can be subdivided into multiple sub-pixels (sub-pixel), and each sub-pixel can display different color levels. For example, a red sub-pixel can display different shades of red, green Subpixels can display different shades of green, and so on. The number of bits in the color scale can represent the ability of a display panel to display colors. For example, in a 6-bit display panel, each sub-pixel can display 64 different shades of color levels.

In modern electronic systems, in order to present images with delicate colors, the sub-pixel data corresponding to each sub-pixel in the frame will reach 8 bits, plus the 2 bits required for color temperature adjustment, the sub-pixel data will reach 10 bits. Sub-pixel data requires that each sub-pixel can present 1024 color levels. On a 6-bit display panel, each sub-pixel actually has only 64 displayable color levels. In order to display high-bit (eg 8-bit or 10-bit) sub-pixel data on a low-bit (eg 6-bit) display panel, a dithering technique emerges as the times require.

The dithering technique simulates the high-bit color gradation by changing the low-bit color gradation in space and time. For example, assuming that the color levels L0 and L1 are two adjacent color levels that can be displayed by each sub-pixel, if n sub-pixels in 4*4 sub-pixels are made to display the color level L1 (n is greater than 0 and less than 16), and at the same time By making the other (16-n) sub-pixels display the color scale L0, the 4*4 sub-pixels can be used to simulate the color scale (L0+n*(L1-L0)/16) that cannot be displayed originally. On the other hand, if a sub-pixel displays color level L1 in n frames among 16 consecutive frames, and displays color level L0 in other (16-n) frames, this sub-pixel can also be displayed in the time dimension Simulate the color scale (L0+n*(L1-L0)/16) that cannot be displayed originally.

Simulate the color scale (L0+n*(L1-L0)/16) between the adjacent color scales L0 and L1 that can be displayed on the 6-bit display panel, which is equivalent to displaying 10-bit sub-colors on the 6-bit display panel. The 10-bit color scale required by the pixel data. Since the 6-bit color scale L0 is adjacent to L1, the color scale L1=(L0+1); multiplying the 6-bit color scale L0 and L1 by 16 (2 to the 4th power), these two 6-bit The color scales are respectively supplemented as 10-bit color scales 16*L0 and 16*L1=16*L0+16.

Preferably, when setting the dithering pattern, the driving polarity of each sub-pixel is taken into consideration, so as to avoid various negative factors affecting the dithering effect.

The invention provides a method for dithering, which is applied to a display panel to display an image data. The image data includes a plurality of frames, and each frame has a plurality of sub-pixel data, and each sub-pixel data corresponds to a sub-pixel. The display panel has a plurality of pixels, each pixel is formed by a plurality of sub-pixels, each sub-pixel corresponds to one of a plurality of driving polarities, and can display a plurality of color levels to present corresponding sub-pixel data. When setting the dithering style, the dithering style will contain multiple elements, and each element corresponds to a sub-pixel; at least two of these elements have the same value, and at least two of the elements with the same value correspond to The two drive sub-pixels with different polarities to offset/reduce the flicker phenomenon. When performing dithering, the color level displayed by each sub-pixel is determined from two adjacent displayable color levels according to the element corresponding to each sub-pixel.

The dithering pattern is formed by multiple dithering matrices, and each dithering matrix has multiple elements in multiple columns and multiple rows. For example, the dithering pattern can be an 8*8 matrix with 8 columns and 8 rows, which is formed by 4 dithering matrices; each dithering matrix is a 4*4 matrix with 4 columns and 4 rows, corresponding to 4 on the display panel. *4 sub-pixels. The elements in each dithering matrix can be 4-bit numbers, and the 4*4 elements in the same dithering matrix are all different, and the value of each element is one of 0 to 15. That is to say, each dithering matrix has an element whose value is equal to d (d is greater than or equal to 0 and less than or equal to 15), and the 4 dithering matrices of the entire dithering pattern have a total of 4 elements whose value is equal to d. In order to reduce flickering, elements with the same value d in different dithering matrices will correspond to sub-pixels with different driving polarities, among which two elements with value d will correspond to positive driving polarity, and the other two values will be The element of d corresponds to the negative drive polarity.

When dithering is performed according to the above dithering pattern/dithering matrix, the 10-bit sub-pixel data of each sub-pixel is added to the corresponding element in the dithering pattern, and the last 4 is cut off from the added sum Bits, the resulting 6-bit result is the 6-bit color scale that each sub-pixel should display. Equivalently speaking, when 4*4 sub-pixels corresponding to a 4*4 dithering matrix are to be used to simulate 10-bit color levels (16*L0+n) in 10-bit sub-pixel data, assuming a certain sub-pixel The value of the corresponding element in the dithering matrix is d. If (d+n) is greater than or equal to 16, it means that after adding the sub-pixel data and element d, it will be greater than or equal to (16*L0+16), and the last 4 bits are truncated. The result obtained by the element is equivalent to a 6-bit color scale (L0+1). On the contrary, if (d+n) is less than 16, the sub-pixel should display 6-bit color level L0. Since the 16 elements in the same dithering matrix are respectively equal to 0 to 15, there will be n sub-pixels in the corresponding 4*4 sub-pixels displaying 6-bit color scale (L0+1), and the remaining (16-n) sub-pixels Pixels display 6-bit color level L0.

When different frames in the image data are displayed sequentially, the present invention will reset the dithering pattern (and the dithering matrix), but the reset dithering pattern will still maintain the aforementioned characteristics; for example, in the dithering pattern Elements with the same value correspond to sub-pixels with different driving polarities. When resetting the dithering pattern, the elements corresponding to the same sub-pixel are reset to a different value periodically in every 16 frames. In other words, with 16 consecutive frames as a period, the element corresponding to the same sub-pixel will change from 0 to 15 with frame switching, and its value in each frame will be equal to one of 0 to 15 respectively. Such a design can dither in the time dimension.

When setting each dithering matrix in the dithering pattern, one of the dithering matrices is set according to a dot matrix and a block matrix, and at least one of the dot matrix and the block matrix is subjected to a column exchange operation and a row One of the swap operations is to provide a swap point matrix and a swap block matrix, and set the other dithering matrix according to the swap point matrix and the swap block matrix. The dot matrix and the block matrix can be 4*4 matrices with 4 columns and 4 rows, each having 4*4 elements. The row swap operation is to swap the order of the rows in the matrix, and the column swap operation is to swap the order of the columns in the matrix.

The elements in the dot matrix and the block matrix can be 2-bit numbers whose value is greater than or equal to 0 and less than or equal to 3. In each row and each column of the dot matrix and the block matrix, the four elements in the same row and the same column may have different values, which are one of 0 to 3, respectively.

Preferably, the dot matrix can be multiplied by a preset value of 4 and added to the block matrix to obtain a dithering matrix; the other 3 swap point matrices are also multiplied by 4 and added to the 3 swap block matrices respectively to obtain Another 3 dithering matrices are obtained. In other words, for the 4-bit elements in the dithering matrix, the first 2 more important bits are the 2-bit elements in the dot matrix, and the last 2 less important bits are the 2-bit elements in the block matrix. 2-bit elements of . In addition, the 4 elements with the same value d (d greater than or equal to 0 and less than or equal to 3) in the dot matrix/swap dot matrix will correspond to the 4 elements with different values in the block matrix/swap block matrix; their values equal to one of 0 to 3 respectively. Therefore, when the dot matrix/swapping dot matrix and the block matrix/swapping block matrix are combined to form a dithering matrix, each element in the dithering matrix can completely cover any value between 0 and 15.

In the dot matrix/swapping dot matrix and block matrix/swapping block matrix, since the elements with the same value will not appear in the same row and the same column, the colors are displayed in the 4*4 sub-pixels corresponding to each dithering matrix When one of the levels L0 and L1 simulates the color level (L0+n*(L1-L0)/16), n sub-pixels displaying the color level L1 will be evenly distributed in each row and each column. That is to say, if n is equal to (4*n1+n0) (where n0 is greater than 0 and less than 4, and n1 is greater than or equal to 0 and less than 4), then in the 4 rows corresponding to the same dithering matrix, there are ( n1+1) sub-pixels display the color level L1, and n1 sub-pixels in the remaining rows need to display the color level L1 respectively. Similarly, in the four columns corresponding to the same dithering matrix, there are (n1+1) sub-pixels in the n0 column to display the color level L1, and there are n1 sub-pixels in the remaining columns to display the color level L1. Under such an arrangement, the number of sub-pixels required to display the color level L1 in each row/column differs by only one at most, and will not be excessively concentrated in the same row/column. For example, when n=9, there are 3 sub-pixels displaying the color level L1 in a certain row (column), and 2 sub-pixels displaying the color level L1 in the remaining 3 rows (columns).

Preferably, the dot matrix/swap the dot matrix and the block matrix/swap the block matrix can be reset as the frame is updated, so as to reset each dithering matrix and dithering pattern. The dot matrix and the block matrix can be reset respectively according to a preset dot matrix sequence and block matrix sequence. For example, the point matrix sequence corresponds to 4 different point matrices A, B, C, and D; when resetting the point matrix, it is to periodically select one of the four point matrices corresponding to the point matrix sequence One of them takes 4 frames as a cycle. The block matrix sequence corresponds to 16 block matrices; when resetting the block matrix, one of the 16 block matrices corresponding to the block matrix sequence is periodically selected in sequence, and the 16 A frame is a period. The block matrix sequence can be composed of four different block matrices W, X, Y, and Z. For example, the block matrix sequence may be W, X, Y, Z, X, Y, Z, W, Y, Z, W, X, Z, W, X, Y.

In other words, in the 16 adjacent frames from the kth to (k+15)th frames, the dot matrices are A, B, C, D, A, B, C, D, A, B, C, D, A, B, C, D, repeat 4 periods of 4 frames, and the block matrix is W, X, Y, Z, X, Y, Z, W, Y, Z, W, X, Z , W, X, Y. In the period of 16 frames, each dot matrix appears multiple times in multiple frames, and each time corresponds to a different block matrix. For example, the dot matrix A appears in the kth, (k+4), (k+8) and (k+12)th frames. In these frames, the corresponding block matrices are W, X, Y, and Z. Under this sequence design, each element of the dithering matrix is set to one of 0 to 15 in a period of 16 frames to perform dithering in the time dimension.

When the same sub-pixel is switched to display the color scale L0 and L1 in 16 frames to simulate the color scale (L0+n*(L1-L0)/16), since the dot matrix controls the more important of each element in the dithering matrix2 Bit, n frames to display the color level L1 will be evenly distributed in four 4-frame periods, that is, the period when the dot matrix is reset; the kth to (k+3)th frames are one 4-frame period, the (k+4)th to (k+7)th frames are the next 4-frame period, and so on. That is to say, if n is equal to (4*n1+n0) (where n0 is greater than 0 and less than 4, and n1 is greater than or equal to 0 and less than 4), then in 4 4-frame periods, it needs to be displayed in n0 4-frame periods (n1+1) times of color level L1, and the remaining 4 frame periods need to display n1 times of color level L1; in each 4 frame period, the number of times (frames) of displaying color level L1 will only be different by 1 time at most, and will not Excessive concentration in the same 4-frame period. For example, if n=9, the sub-pixel will display the color level L1 three times in three frames in one 4-frame period, and display the color level L1 twice in the other three four-frame periods.

The present invention also provides a dithering control circuit, including a dot matrix setting module, a block matrix setting module, an exchange module, a dithering pattern setting module and a dithering module. The dot matrix setting module and the block matrix setting module are respectively used to set the dot matrix and the block matrix; the exchange module performs column exchange and row exchange on the dot matrix and the block matrix to provide exchange dot matrix and exchange block matrix. The dithering pattern setting module forms each dithering matrix and dithering pattern according to the dot matrix/swapping dot matrix and the block matrix/swapping block matrix, and the dithering module determines the color scale to be displayed by the sub-pixels according to the dithering pattern.

In order to further understand the features and technical content of the present invention, please refer to the following detailed description and drawings related to the present invention. However, the drawings are only for reference and illustration, and are not intended to limit the present invention.

Description of drawings

FIG. 1 schematically shows an embodiment of the dithering pattern applied to a display panel of the present invention.

FIG. 2 is an embodiment in which each dithering matrix forms the dithering pattern in FIG. 1 .

FIG. 3 schematically shows an embodiment of dithering according to the dithering pattern in FIG. 1 .

FIG. 4 schematically shows an embodiment in which the dithering pattern in FIG. 1 is updated with frame switching.

FIG. 5 schematically shows an embodiment of each dot matrix and block matrix in FIG. 4 .

FIG. 6 and FIG. 7 illustrate an embodiment in which the dithering matrix in FIG. 4 is updated as the frame changes.

8 to 10 respectively illustrate various embodiments of the dithering patterns of the present invention.

FIG. 11 schematically shows the dithering operation process of the embodiment of the present invention.

Fig. 12 schematically shows the dithering control circuit of the embodiment of the present invention.

Description of main component symbols

10 display panel

12 receiving circuit

14-point matrix setting module

16 block matrix setting module

18 swap modules

20 dithering control circuit

22 dithering style setting module

24 dithering modules

26 drive polarity control module

100 processes

102-112 steps

DTP, DTPf dithering style

DTM1-DTM4 dithering matrix

DM, A, B, C, D point matrix

BM, W, X, Y, Z block matrix

DMa-DMc swap point matrix

BMa-BMc swap block matrix

DTP(0,0)-DTP(0,2), DTP(1,0) elements

F(k)-F(k+15) frame

S(i, j) sub-pixel

red

G green

B blue

T0(1)-T0(4), T1 cycle

Detailed ways

Please refer to FIG. 1 , which shows an embodiment of the dithering pattern DTP applied to a display panel 10 of the present invention. There are multiple sub-pixels S(i, j) on the display panel 10; Pixel (marked as R in the figure), green sub-pixel and blue sub-pixel; sub-pixels S(0, 3) and S(0, 4) on the same scan line are respectively red sub-pixels in the next pixel with the green subpixel, and so on. The red sub-pixel S(1,0), the green sub-pixel S(1,1) and the blue sub-pixel S(1,2) are synthesized into one pixel on the next scan line. In order to save power consumption and prevent image sticking, each sub-pixel is alternately driven with different driving polarities. In FIG. 1 , the sub-pixels marked with slashes and the sub-pixels without slashes respectively represent two kinds of sub-pixels with different driving polarities. For example, sub-pixels S(0, 0), S(1, 1) and S(0, 2) correspond to the same driving polarity, and sub-pixels S(0, 1), S(1, 0) and S (1, 2) corresponds to another opposite driving polarity.

In FIG. 1 , the dithering pattern DTP is an 8*8 matrix with 8 columns and 8 rows, which has a plurality of elements DTP(i, j), and each element corresponds to a sub-pixel. For example, elements DTP(0,0), DTP(0,1) and DTP(0,2) respectively correspond to sub-pixels S(0,0), S(0,1) and S(0,2), The element DTP(1,0) corresponds to the sub-pixel S(1,0), and so on. In order to cover all sub-pixels on the display panel 10, the dithering pattern DTP is applied repeatedly such that sub-pixel S(i,j) corresponds to the element DTP(mod(i,8), mod(j,8)), where mod is a congruence function, and mod(i, 8) is the remainder of dividing i by 8. For example, sub-pixels S(0,8) and S(0,9) correspond to elements DTP(0,0) and DTP(0,1) respectively, and sub-pixels S(8,0) and S(9, 0) corresponds to elements DTP(0,0) and DTP(1,0) respectively.

Continuing the embodiment of FIG. 1 , please refer to FIG. 2 . The characteristics of the dithering pattern DTP can be further discussed in Figure 2. In FIG. 2 , the sub-pixel driving polarity corresponding to each element DTM(i, j) is also marked with twill/no twill. For example, the element DTM(0,0) corresponds to the sub-pixel S(0,0), so the driving polarity corresponding to the element DTM(0,0) is also represented by slashes.

In the embodiment of FIG. 2, the dithering pattern DTP is formed by 4 dithering matrices DTM1 to DTM4, and each dithering matrix is a 4*4 matrix with 4 columns and 4 rows, with 4*4 elements, corresponding to the display 4*4 sub-pixels on panel 10. That is to say, elements DTM1(i, j), DTM2(i, j), DTM3(i, j) and DTM4(i, j) in each dithering matrix are elements DTP(i, j), DTP( i+4, j), DTP(i, j+4) and DTP(i+4, j+4) (both i and j are greater than or equal to 0 and less than or equal to 3). The elements in each dithering matrix can be 4-bit numbers, and the 4*4 elements in the same dithering matrix are all different, and the value of each element is one of 0 to 15. For example, in the dithering matrix DTM1, the elements DTM1(2,0), DTM1(3,2), DTM1(0,3), DTM1(1,1), DTM1(3,1), DTM1(2 ,3), DTM1(1,2), DTM1(0,0), DTM1(0,2), DTM1(1,0), DTM1(2,1), DTM1(3,3), DTM1(1, 3), the values of DTM1 (0, 1), DTM1 (3, 0), and DTM1 (2, 2) are respectively equal to 0 to 15. Therefore, each dithering matrix has an element whose value is equal to d (d is greater than or equal to 0 and less than or equal to 15), and the 4 dithering matrices of the entire dithering pattern have a total of 4 elements whose value is equal to d. For example, the values of the elements DTM1(2,2), DTM2(3,0), DTM3(1,3) and DTM4(0,1) are all equal to 15.

In order to reduce/offset the flicker phenomenon, when designing each dithering matrix, elements with the same value d in different dithering matrices will correspond to sub-pixels with different driving polarities; in this embodiment, the two values are d The elements of d will correspond to the same driving polarity, and the other two elements with value d will correspond to another driving polarity. For example, the values of elements DTM1(2,2), DTM2(3,0), DTM3(1,3) and DTM4(0,1) are all equal to 15, elements DTM1(2,2) and DTM4(0, 1) Corresponding to the same driving polarity, elements DTM2(3,0) and DTM3(1,3) correspond to another different driving polarity. Similarly, the values of elements DTM1(3,0), DTM2(2,2), DTM3(0,1) and DTM4(1,3) are all equal to 14, elements DTM1(3,0) and DTM4(1,3 ) corresponds to the same driving polarity, but elements DTM2(2, 2) and DTM3(0, 1) correspond to another driving polarity. Such an arrangement can balance the color scale differences of different driving polarities in the same frame, equalize the visual differences, and reduce the interference of the flicker phenomenon.

The dithering situation of the present invention using the dithering pattern DTP can be illustrated by FIG. 3 . When dithering, the 10-bit sub-pixel data of each sub-pixel will be added to the corresponding 4-bit element in the dithering pattern, and the last 4 bits will be truncated from the sum of the addition, and the resulting 6-bit The result is the 6-bit color scale that each subpixel should display. Equivalently speaking, when the 10-bit color scale (16*L0+n) in the 10-bit sub-pixel data is to be simulated with the 4*4 sub-pixel corresponding to the 4*4 dithering matrix, it is assumed that a certain sub-pixel The value of the corresponding element in the dithering pattern/dithering matrix is d, if (d+n) is greater than or equal to 16, it means that the sub-pixel data and element d will be greater than or equal to (16*L0+16) after being added, and then proceed Therefore, the result obtained by truncating the last 4 bits is equivalent to a 6-bit color scale (L0+1), which means that the sub-pixel should display a 6-bit color scale (L0+1). On the contrary, if (d+n) is less than 16, the sub-pixel displays 6-bit color scale L0. Since the 16 elements in the same dithering matrix are respectively equal to 0 to 15, there will be n sub-pixels in the corresponding 4*4 sub-pixels displaying 6-bit color scale (L0+1), and the remaining (16-n) sub-pixels Pixels display 6-bit color level L0.

In one embodiment, each dithering matrix DTM1 to DTM4 can be set according to a dot matrix DM and a block matrix BM, as shown in FIG. 4 . The dot matrix DM and the block matrix BM are respectively 4*4 matrices with 4 columns and 4 rows, each having 4*4 elements. In the embodiment of FIG. 4 , the dithering matrix DTM1 is obtained by (DM*4+BM). On the other hand, the dot matrix DM can obtain 4*4 exchanged dot matrices DMa to DMc through different column exchange operations, and the block matrix BM can respectively obtain 4*4 exchange matrices BMa to DMc through different row exchange operations. BMc. The dithering matrices DTM2 to DTM4 are respectively equal to (4*DMa+BMa), (4*DMb+BMb) and (4*DMc+BMc). Performing a row transposition operation on a matrix is to transpose the order of the rows in the matrix; for example, possible row permutations include (but are not limited to) one of the following: intermodulate row 1 with row 2 and swap row 3 Intermodulate row 4 with row 1, row 1 with row 3 and row 2 with row 4, row 1 with row 4 and row 2 with row 3 . Similarly, performing a column transposition operation on a matrix is to transpose the order of the columns in the matrix; for example, the column transposition that can be adopted includes (but is not limited to) one of the following: interchanging column 1 and column 2 and intermodulate column 3 with column 4, intermodulate column 1 with column 3 and intermodulate column 2 with column 4, intermodulate column 1 with column 4 and intermodulate column 2 with Column 3 intermodulates.

In this embodiment, the elements in the dot matrix DM and the block matrix BM may be 2-bit numbers, and the values thereof are greater than or equal to 0 and less than or equal to 3. Therefore, when calculating the 4-bit dithering style elements in the dithering matrix DTM1 according to (4*DM+BM), it is equivalent to use the 2-bit elements of the dot matrix DM as the first two comparisons of the dithering style elements. important bits, and use the 2-bit elements in the block matrix BM to form the latter 2 less important bits of the dithering pattern element, as shown in FIG. 3 . Similarly, each 4-bit element of the dithering matrix DTM2/DTM3/DTM4 is also formed by exchanging the corresponding 2-bit elements in the dot matrix DMa/DMb/DMc to form a more important 2-bit element, and by exchanging the block matrix BMa The corresponding 2-bit elements in /BMb/BMc are treated as less significant 2-bits.

In this embodiment, the design of the dithering matrix is synthesized by the dot matrix and the block matrix, so that it can be compatible with dithering from 8-bit sub-pixel data to 6-bit color levels. In the 8-bit to 6-bit dithering conversion, since there is only a 2-bit gap between the sub-pixel data and the displayable color scale, only a 2-bit dot matrix can be used to construct the dithering pattern required for dithering , without using a block matrix. In the 10-bit to 6-bit dithering from 10-bit sub-pixel data to 6-bit color scale, a 4-bit dithering pattern is combined with a 2-bit dot matrix and a 2-bit block matrix to simulate a sub-pixel The 4-bit difference between pixel data and the displayable color scale. In other words, the design of 8-bit to 6-bit dithering and the design of 10-bit to 6-bit dithering can be considered independently; the latter's dithering requirements can be reflected in the design of the block matrix without interfering with the dot matrix the design of.

In this embodiment, the dot matrix/swap dot matrix and block matrix/swap block matrix can be reset along with the frame update to reset each dithering matrix and dithering pattern; it can be based on a preset point The matrix sequence and the block matrix sequence reset the point matrix and the block matrix, respectively. For example, the point matrix sequence corresponds to 4 different point matrices A, B, C, and D; when resetting the point matrix, it is to periodically select one of the four point matrices corresponding to the point matrix sequence One of them takes 4 frames as a cycle. As shown in Figure 4, as the kth frame F(k) is sequentially updated to the (k+3)th frame F(k+3), the dot matrix DM will also be sequentially set as the dot matrix A , B, C, D. In the subsequent four frames F(k+4) to F(k+7), the dot matrix DM is set as the dot matrix A, B, C, D in sequence. Therefore, frames F(k) to F(k+3) can be regarded as a 4-frame period T0(1) of the dot matrix sequence, and frames F(k+4) to F(k+7) correspond to the next 4 frames Period T0(2), and so on.

On the other hand, the block matrix sequence corresponds to 16 block matrices; when resetting the block matrix, one of the 16 block matrices corresponding to the block matrix sequence is periodically selected in sequence , taking 16 frames as a cycle T1. The block matrix sequence can be composed of four different block matrices W, X, Y, and Z; in the embodiment of Figure 4, the block matrix sequence corresponds to the block matrix W, X, Y, Z, X, Y, Z, W, Y, Z, W, X, Z, W, X, Y. In other words, as frame F(k) is sequentially updated to frame F(k+15), block matrix BM is reset to block matrix W, X, Y, Z, X, Y, Z respectively , W, Y, Z, W, X, Z, W, X, Y. When the dot matrix DM/block matrix BM is reset as the frame changes, each exchange dot matrix DMa/DMb/DMc and exchange block matrix BMa/BMb/BMc will also change accordingly, and jointly, each dithering matrix DTM1 to DTM4 and even the dithering pattern DTP will also be updated with frame switching.

After the dithering pattern is reset with frame switching, the updated dithering pattern will continue to maintain the aforementioned dithering pattern characteristics. For example, elements with the same value in the dithering pattern are respectively corresponding to sub-pixels with different driving polarities, so that different driving polarities can be used to offset/reduce the flicker phenomenon caused by the same driving polarity. In addition, when resetting the dithering pattern/dithering matrix, elements corresponding to the same sub-pixel are periodically reset to a different value in every 16 frames. In other words, with 16 frames as a period, the element corresponding to the same sub-pixel will change from 0 to 15 with frame switching, and its value in each frame will be equal to one of 0 to 15 respectively. Such a design can dither in the time dimension.

FIG. 5 schematically shows an embodiment of dot matrices A, B, C, D and block matrices W, X, Y, Z. As previously mentioned, in the dot matrix A, B, C, D as the dot matrix DM and the dot matrix W, X, Y, Z as the block matrix BM, each element is a 2-digit number, and its value is greater than Equal to 0 and less than or equal to 3. In each row and each column of the dot matrix and the block matrix, the 4 elements in the same row have different values, which are one of 0 to 3; the 4 elements in the same column also have different values, One of 0 to 3 respectively. In other words, elements with the same value will not appear in the same column and row. For example, in the point matrix A, the 4 elements in the 0th column are 1, 3, 2, 0 which are different from each other, and the 4 elements in the 2nd row are 2, 1, 3, 0 which are different from each other. 0. In the dot matrix A, the values of elements A(0,1), A(1,3), A(2,2) and A(3,0) are all 3, but any two elements with the same value are not arranged in the same row and column. Similarly, in the point matrix Z, the 4 elements in the first column are 3, 0, 1, 2 which are different, and the 4 elements in the 0th row are 0, 3, 2, 1 which are different ; Elements Z(0, 2), Z(1, 3), Z(2, 0) and Z(3, 1) all have values of 2, but are not arranged in the same row and column.

The 4 elements with the same value in the dot matrix DM correspond to the 4 elements with different values in the block matrix BM. In this way, when the dot matrix DM and the block matrix BM are combined to form the dithering matrix DTM1, the 16 4-bit elements in the dithering matrix PTM1 can cover all values from 0 to 15. For example, in the dot matrix B, the values of the elements B(0,0), B(1,2), B(2,3) and B(3,1) are all 3, and in the block matrix W , the values of the corresponding elements W(0,0), W(1,2), W(2,3) and W(3,1) are respectively different 3, 2, 1, 0, the block matrix X The corresponding elements X(0,0), X(1,2), X(2,3) and X(3,1) are 2, 3, 0, 1 respectively, and the corresponding elements Y( 0, 0), Y(1, 2), Y(2, 3) and Y(3, 1) are 1, 0, 2, 3 respectively, and the corresponding elements in the block matrix Z Z(0, 0), Z(1,2), Z(2,3) and Z(3,1) are also 0, 1, 3, 2 which are different from each other. Similarly, the 4 elements with the same value in the block matrix BM also correspond to the 4 elements with different values in the dot matrix DM. For example, the diagonal 4 elements Y(0,0), Y(1,1), Y(2,2) and Y(2,3) of the block matrix Y are all 1, relatively, the point matrix The diagonal 4 elements of A, B, C, and D will be different values from 0 to 3.

When the exchange point matrix DMa/DMb/DMc and the exchange block matrix BMa/BMb/BMc are derived from the point matrix DM and the block matrix BM, each exchange point matrix DMa/DMb/DMc will have the same characteristics as the point matrix DM, The characteristics of the transposed block matrix BMa/BMb/BMc are also consistent with the characteristics of the block matrix BM. For example, in each row and each column of the exchange point matrix and the exchange block matrix, the 4 elements in the same row have different values, which are respectively one of 0 to 3; the 4 elements in the same column also have different values. have different values, one of 0 to 3. Similarly, the exchange of 4 elements with the same value in the dot matrix will correspond to the exchange of 4 elements with different values in the block matrix, just like the correspondence between the dot matrix and the block matrix, so that the dithering matrix PTM2/ The 16 4-bit elements in PTM3/PTM4 can cover all values from 0 to 15.

Continuing the embodiment shown in FIG. 4 and FIG. 5 , please refer to FIG. 6 to FIG. 7 ; FIG. 6 and FIG. 7 take the dithering matrix DTM1 as an example to illustrate the update of the dithering matrix/dithering pattern as each frame is switched. For example, DTM1F(k) in Figure 6 is the dithering matrix DTM1 corresponding to frame F(k), and DTM1F(k+8) in Figure 7 represents the dithering matrix under frame F(k+8) DTM1.

In the dot matrix/swapping dot matrix and block matrix/swapping block matrix, since the elements with the same value will not appear in the same row and the same column, the colors are displayed in the 4*4 sub-pixels corresponding to each dithering matrix When one of the levels L0 and L1 simulates the color level (L0+n*(L1-L0)/16), n sub-pixels displaying the color level L1 will be evenly distributed in each row and each column. That is to say, if n is equal to (4*n1+n0) (where n0 is greater than 0 and less than 4, and n1 is greater than or equal to 0 and less than 4), then in the 4 rows corresponding to the same dithering matrix, there are ( n1+1) sub-pixels display the color level L1, and n1 sub-pixels in the remaining rows need to display the color level L1 respectively. Similarly, in the four columns corresponding to the same dithering matrix, there are (n1+1) sub-pixels in the n0 column to display the color level L1, and there are n1 sub-pixels in the remaining columns to display the color level L1. Under such an arrangement, the number of sub-pixels required to display the color level L1 in each row/column differs by only one at most, and will not be excessively concentrated in the same row/column. For example, when n=9, there are 3 sub-pixels displaying the color level L1 in a certain row (column), and 2 sub-pixels displaying the color level L1 in the remaining 3 rows (columns).

Taking the dithering matrix DTM1F(k+2) corresponding to frame F(k+2) in Figure 6 as an example, when n=9, the sub-pixels displaying the color scale L1 will correspond to the elements DTM1(0, 2), DTM1 (1,2), DTM1(0,0), DTM1(2,3), DTM1(3,1), DTM1(0,3), DTM1(1,1), DTM1(3,2), DTM1( 2, 0) (the values of these elements are 7 to 15 respectively); in the 4 columns, only the 0th column corresponds to 3 sub-pixels of color level L1, and the 1st to 3rd columns correspond to 2 sub-pixels of color level L1 pixels. Similarly, among the 4 lines, only the 2nd line corresponds to 3 sub-pixels of the color level L1, and the 0th line, the 1st line and the 3rd line all correspond to 2 sub-pixels that need to display the color level L1.

In terms of dithering in the time dimension, it can be seen from Figure 4 that in the 16 adjacent frames F(k) to F(k+15) of the kth to (k+15)th frames, the point matrices are A , B, C, D, A, B, C, D, A, B, C, D, A, B, C, D, repeat four 4-frame cycles T0(1) to T0(4), and the area The block matrices are respectively W, X, Y, Z, X, Y, Z, W, Y, Z, W, X, Z, W, X, Y. In the period T1 of 16 frames, each dot matrix appears multiple times in multiple frames, and each time corresponds to a different block matrix. For example, dot matrix A will be selected in frames F(k), F(k+4), F(k+8) and F(k+12); and in these frames, the corresponding block matrix Then there are four different block matrices W, X, Y and Z respectively. Under this sequence design, each element of the dithering matrix is set to one of 0 to 15 in the 16 frame periods T1 to perform dithering in the time dimension.

For example, it can be seen from FIG. 6 and FIG. 7 that the element DTM1(0,0) of the dithering matrix DTM1 will be set to 7 sequentially in the 16-frame periods of frames F(k) to F(k+15). , 14, 9, 0, 6, 13, 8, 3, 5, 12, 11, 2, 4, 15, 10, 1, covering all integers from 0 to 15. Similarly, the value of element DTM(1, 2) will be set to 6, 15, 8, 1, 7, 12, 9, 2, 4, 13, 10, 3, 5, 14, 11, 0.

When a sub-pixel is switched to display the adjacent color levels L0 and L1 in 16 frames to simulate the color level (L0+n*(L1-L0)/16), since the dot matrix/exchange dot matrix controls each of the dithering matrix The more important 2 bits of the element, n frames to display the color scale L1 will be evenly distributed into four 4-frame periods T0(1) to T0(4), that is, the dot matrix/swap dot matrix is reset fixed cycle. That is to say, if n is equal to (4*n1+n0) (where n0 is greater than 0 and less than 4, and n1 is greater than or equal to 0 and less than 4), then in 4 4-frame periods, it needs to be displayed in n0 4-frame periods (n1+1) times of color level L1, and the remaining 4 frame periods need to display n1 times of color level L1; in each 4 frame period, the number of times (frames) of displaying color level L1 will only be different by 1 time at most, and will not Excessive concentration in the same 4-frame period. For example, if n=9, the sub-pixel will display the color level L1 three times in three frames in one 4-frame period, and display the color level L1 twice in the other three four-frame periods. Taking the sub-pixel corresponding to element DTM1(0, 0) as an example, it should be in frame F(k), F(k+1), F(k+2), F(k+5), F(k+6 ), F(k+9), F(k+10), F(k+13), F(k+14) display the color scale L1, there are 3 times in the 4 frame period T0(1) to display the color scale L1, in other periods T0(2) to T0(4), there are two display levels L1 respectively.

Since the dithering pattern/dithering matrix of the present invention acts on sub-pixels that are finer than pixels, the patterns caused by dithering can be further improved. Taking dithering in the time dimension as an example, assume that the red sub-pixel corresponding to the dithering matrix element DTM1(0, 0) is to alternately use adjacent color levels R0 and R1 to simulate the color level (R0+(R1 -R0)/16), the green sub-pixel corresponding to the element DTM1 (0, 1) should simulate the color scale (G0+(G1-G0)/16) with the color scale G0 and G1 in the same period, and the element DTM (0, 2 ) corresponding to the blue sub-pixel should simulate the color scale (B0+(B1-B0)/16) with the color scales B0 and B1 in the same cycle. Referring to Figure 6 and Figure 7, it can be known that the red sub-pixel corresponding to the element DTM(0,0) will display the color scale R1 in the frame F(k+13) (the color scale R0 will be displayed in the remaining 15 frames), and the corresponding element DTM(0 , 1) the green sub-pixel will display the color level G1 in the frame F(k+12), and the blue sub-pixel corresponding to the element DTM(0,2) will display the color level B1 in the frame F(k+15). It can be known from the above discussion that when using the dithering technique of the present invention, the three red, green and blue sub-pixels may not be concentrated in the same frame to simultaneously display the color levels (R1, G1, B1).

Please refer to FIG. 8 to FIG. 10 , which illustrate different embodiments of the dithering pattern DTP of the present invention. In the embodiment in FIG. 8 , the dithering pattern DTP is an 8*4 matrix with 8 columns and 4 rows; in the embodiment in FIG. 9 , the dithering pattern DTP is a 4*8 matrix with 4 rows and 8 columns. In the embodiment of FIG. 10 , the dithering pattern DTP is formed by two 4*4 matrices arranged along the diagonal, which can correspond to each sub-pixel of the display panel 10 with an inverted dithering pattern DTPf. In the dithering patterns DTP in FIGS. 8 to 10 , there are two elements with the same value, which correspond to different driving polarities, so as to balance the differences between different driving polarities.

In FIG. 1 , it is assumed that when the display panel 10 is driven, the driving polarity pattern based on it is to make the middle 2 scan lines of every 4 scan lines (such as sub-pixels S(1,0) and S(2,0) ) where the scan lines) have the same driving polarity. Other types of driving polarity patterns can be exemplified as follows: in every 4 scanning lines, make the first 2 lines correspond to the same driving polarity and make the latter 2 lines correspond to another driving polarity, or, in every 4 scanning lines Make the first and third scanning lines correspond to the same driving polarity and make the second and fourth scanning lines correspond to another driving polarity, and so on. The dithering technique of the present invention can be further applied to various driving polarity modes. When popularizing and using the technology of the present invention, one of the key points is to make the dithering pattern have an even number of elements with the same value, and make half of them correspond to one driving polarity, and the other half correspond to another driving polarity , to counteract/reduce flicker.

In various driving polarity modes, half of the sub-pixels in every 4*4 adjacent sub-pixels correspond to the same driving polarity, and the other half of the sub-pixels correspond to another driving polarity. However, when using 4*4 sub-pixels to simulate the color scale (L0+n*(L1-L0)/16), if n is an odd number, the n sub-pixels that need to display the color scale L1 must not be able to balance the differences in quantity. drive polarity. For example, when n=9, among the 9 sub-pixels displaying the color level L1, the optimal situation is that 4 sub-pixels correspond to the same driving polarity, and the other 5 sub-pixels correspond to another driving polarity; however , in this case, a certain driving polarity is still dominant, and the flicker phenomenon cannot be improved by balancing among different driving polarities. Preferably, an even number of paired 4*4 matrices can be used to form a dithering pattern; the sub-pixels corresponding to the paired 4*4 matrices are used to simulate the color scale (L0+n*(L1-L0)/16 ), even if n is an odd number, different driving polarities can be balanced in the number of sub-pixels. Also taking n=9 as an example, in every two pairs of 4*4 matrices, there can be 4 and 5 sub-pixels corresponding to the same driving polarity, and 5 and 4 sub-pixels corresponding to another driving polarity Polarity, so that the number of sub-pixels with different driving polarities can be fully balanced, and the resistance to flickering phenomenon can be optimized.

Please refer to FIG. 11 , which shows an embodiment 100 of the operation process of the present invention. The main steps in the process 100 can be described as follows:

Step 102: start. Start dithering.

Step 104: For a frame in the image data, set a dot matrix and a block matrix, and perform column swap/row swap on the dot matrix and the block matrix respectively, so as to provide a swap dot matrix and a swap block matrix. Dot matrix/transpose dot matrix and block matrix/transpose block matrix conform to various properties discussed previously.

Step 106: Synthesize dithering matrices by using dot matrix/swap dot matrix and block matrix/swap block matrix, and form a dithering pattern DTP with each dithering matrix, so that the dithering pattern DTP conforms to the characteristics discussed above. For example, in the dithering pattern DTP, elements with the same value are corresponding to different driving polarities to reduce/offset the flicker phenomenon.

Step 108: Perform dithering according to each element in the dithering pattern DTP and the sub-pixel data of each sub-pixel, and obtain the color scale that each sub-pixel should display. Its principle and its progress are shown in Figure 3.

Step 110: Decide whether to process the next frame. If yes, return to step 104 to reset the dot matrix/exchange the dot matrix and the block matrix/exchange the block matrix according to the dot matrix sequence and the block matrix sequence. If there is no need to process another frame, proceed to step 112 .

Step 112: End the process 100.

Please refer to FIG. 12 ; the dithering technology and process 100 of the present invention can be implemented in the dithering control circuit 20 of FIG. 12 . For example, the dithering control circuit 20 may be implemented in a timing controller of a display panel. In this embodiment, the dithering control circuit 20 is provided with a receiving circuit 12, a dot matrix setting module 14, a block matrix setting module 16, an exchange module 18, a dithering pattern setting module 22, a dithering module 24 and Drive polarity control module 26 . The receiving circuit 12 receives image data, obtains sub-pixel data (for example, 10-bit sub-pixel data) in each frame, and provides related frame information, such as when a frame is switched to a next frame. The drive polarity control module 26 controls the drive polarity corresponding to each sub-pixel according to the preset drive polarity mode; for example, the drive polarity control module 26 can support multiple drive polarity modes, and for The driving polarity pattern provides corresponding driving polarity pattern information.

According to the driving polarity pattern information and the frame information, the dot matrix setting module 14 and the block matrix setting module correspondingly provide the dot matrix DM and the block matrix BM updated with the frame, and the exchange module 18 provides the corresponding exchange dot matrix DMa to DMc, and transpose the block matrix BMa to BMc. The dithering pattern setting module 22 synthesizes each dithering matrix and dithering pattern DTP by using each dot matrix/swapping dot matrix and block matrix/swapping block matrix. The dithering module 24 provides the color scale (for example, 6-bit color scale) to be displayed by each sub-pixel according to the dithering pattern DTP and the sub-pixel data corresponding to each sub-pixel in the frame, so as to achieve the purpose of dithering.

In the dithering control circuit 20 , the dot matrix setting module 14 , the block matrix setting module 16 , the exchange module 18 , the dithering pattern setting module 22 and the dithering module 24 can be realized by hardware, software or firmware. For example, a microcontroller may be used to execute firmware codes to realize the functions of these modules.

To sum up, compared with the existing dithering technology, the dithering technology of the present invention arranges the dithering patterns in a balanced manner in space and time in units of sub-pixels, and also takes into consideration the driving polarity of each sub-pixel , not only can avoid the pattern that will disturb the visual perception during dithering, but also can improve the flickering phenomenon.

To sum up, although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the claims.

Claims (19)

1. A dithering method, applied to a display panel to display an image data, the image data includes a plurality of frames, the frames have a plurality of sub-pixel data; the display panel includes a plurality of pixels, each pixel is composed of a plurality of sub-pixels Formed, each sub-pixel can display a plurality of color levels to present a sub-pixel data; each sub-pixel corresponds to one of multiple driving polarities; the method includes: A dithering pattern is set for a first frame, so that the dithering pattern includes a plurality of elements, each element is related to a sub-pixel, and each element corresponds to a value, and the value is the same as the display panel can display The number of bits is related to the number of bits of the image data; pairing elements with the same value among the elements, and respectively corresponding to two sub-pixels with different driving polarities among the sub-pixels; and When the sub-pixel data corresponding to each sub-pixel corresponds to between two preset color levels in the color scales, the values corresponding to the elements in the dithering pattern corresponding to each sub-pixel are determined by the two preset color levels. In the color scale, the color scale displayed by each sub-pixel is determined. 2. The method according to claim 1, wherein the step of setting the dithering pattern further comprises: When setting the dithering pattern, there are multiple dithering matrices in the dithering pattern, and each dithering matrix has a plurality of elements arranged in multiple rows and columns; setting a dot matrix and a block matrix, the dot matrix has a plurality of elements arranged in rows and columns, and the block matrix has a plurality of elements arranged in rows and columns; and The dithering matrices are synthesized according to a dot matrix and a block matrix. 3. The method of claim 2, further comprising: performing one of a column swap operation and a row swap operation on at least one of the dot matrix and the block matrix to provide a swap dot matrix and a swap block matrix, wherein the row swap operation swaps the rows order, and the column swap operation transposes the order of the columns; and At least one of the dithering matrices is set according to the switching point matrix and the switching block matrix. 4. The method of claim 2, further comprising: At least one of the dithering matrices is set according to a sum of a product of the dot matrix and a preset value added to the block matrix. 5. The method of claim 2, further comprising: When setting the dot matrix, make the elements in each row of the dot matrix have different numerical values, and make the elements in each column of the dot matrix have different numerical values respectively; making the elements of the block matrix in each row have different values, and making the elements of the block matrix in each column have different values; making each element of the block matrix correspond to one of the elements of the dot matrix; and Make the elements with the same value in the dot matrix correspond to the elements in the block matrix with different values. 6. The method of claim 2, further comprising: When setting the dithering matrix, make the elements in the dithering matrix have different values respectively. 7. The method of claim 2, further comprising: When displaying different frames among the frames, the dot matrix and the block matrix are reset, and the dithering matrices are reset according to the reset dot matrix and the block matrix. 8. The method of claim 7, further comprising: Set a point matrix sequence, the point matrix sequence corresponds to the first number of point matrices; Setting a block matrix sequence, the block matrix sequence corresponds to the second number of block matrices; When resetting the point matrix, periodically select one of the point matrices corresponding to the point matrix sequence; and When resetting the block matrix, periodically select one of the block matrices corresponding to the block matrix sequence; Wherein the first quantity is different from the second quantity. 9. The method of claim 1, further comprising: The dithering pattern is reset when a different one of the frames is displayed. 10. The method of claim 9, further comprising: When resetting the dithering pattern, the elements corresponding to the same position are reset to a different value periodically in every preset number of frames. 11. A dithering control circuit, applied to a display panel to display an image data, the image data includes multiple frames, each frame includes a plurality of sub-pixel data; the display panel includes a plurality of pixels, each pixel is composed of a plurality of sub-pixels Pixels are formed, and each sub-pixel corresponds to one of multiple driving polarities, and can display multiple color levels; the dithering control circuit includes: a dot matrix setting module, used to receive a drive polarity information to provide a dot matrix, the dot matrix has a plurality of elements arranged in multiple rows and multiple columns; A block matrix setting module, used to receive the driving polarity information to provide a block matrix, the block matrix has a plurality of elements arranged in multiple rows and columns; A dithering pattern setting module, coupled to the dot matrix setting module and the block matrix setting module, for synthesizing a dithering pattern according to the dot matrix and the block matrix, the dithering pattern includes A plurality of elements, each element is related to a sub-pixel, and each element corresponds to a value, and the value is related to the number of bits that can be displayed by the display panel and the number of bits of the image data, and the dithering pattern Elements having the same numerical value among these elements respectively correspond to two sub-pixels with different driving polarities among the sub-pixels; and A dithering module, coupled to the dithering pattern setting module, uses the dithering pattern to dither the sub-pixel data. 12. The dithering control circuit according to claim 11, further comprising: A swapping module for performing one of a column swapping operation and a row swapping operation on at least one of the dot matrix and the block matrix to provide a swapping point matrix and a swapping block matrix, wherein the row is swapped The operation is to transpose the order of the rows, and the column transposition operation is to transpose the order of the columns; The dithering pattern setting module synthesizes a plurality of dithering matrices and forms the dithering pattern according to the dithering matrices, wherein the dithering pattern setting module sets the dithering pattern according to the exchange point matrix and the exchange block matrix At least one of these dithering matrices. 13. The dithering control circuit according to claim 11, wherein the dithering pattern setting module synthesizes a plurality of dithering matrices and forms the dithering pattern according to the dithering matrices, wherein the dithering pattern The setting module sets at least one of the dithering matrices according to adding the product of the dot matrix and a preset value to the sum of the block matrix. 14. The dithering control circuit according to claim 11, wherein the dot matrix has multiple rows and multiple columns, the elements in each row of the dot matrix have different values, and the dot matrix has different values in each row. The elements in the columns have different values respectively; the block matrix has multiple rows and columns, the elements in each row of the block matrix have different values respectively, and the block matrix has different values in each column The elements of each have different values; each element of the block matrix corresponds to one of the elements of the dot matrix; the elements with the same value in the dot matrix correspond to the elements of the block matrix These elements have different values. 15. The dithering control circuit according to claim 11, wherein the dithering pattern setting module synthesizes a plurality of dithering matrices and forms the dithering pattern according to the dithering matrices, in the dithering matrix Each element of has a different value. 16. The dithering control circuit according to claim 11, wherein the dithering pattern setting module synthesizes a plurality of dithering matrices and forms the dithering pattern according to the dithering matrices, and displays the frames In different frames, the dot matrix setting module will reset the dot matrix, the block matrix setting module will reset the block matrix, and the dithering pattern setting module will reset according to The dot matrix and the block matrix reset the dithering matrices. 17. The dithering control circuit as claimed in claim 16, wherein the dot matrix setting module sets a dot matrix sequence, and the dot matrix sequence corresponds to a first number of dot matrices; the block matrix setting module sets Determine a block matrix sequence, the block matrix sequence corresponds to the second number of block matrices; when resetting the point matrix, the point matrix setting module is periodically in the point matrices corresponding to the point matrix sequence Select one of them sequentially; and when resetting the block matrix, the block matrix setting module periodically selects one of the block matrices corresponding to the block matrix sequence one of; wherein the first quantity is different from the second quantity. 18. The dithering control circuit according to claim 11, wherein the dot matrix setting module provides the dot matrix according to the driving polarity information and a frame information; and the block matrix setting module according to the Driving polarity information and the frame information provide the block matrix. 19. The dithering control circuit according to claim 11, wherein when the dithering pattern setting module resets the dithering pattern, it periodically makes the corresponding The element of the same sub-pixel is reset to a different value.