CN102789984B - Forming method of embedded region and forming method of embedded source and drain - Google Patents

Abstract

The embodiment of the invention discloses a method for forming an embedded area, which comprises the following steps: providing a substrate and a first structure on the substrate; forming a trench in the substrate on at least one side of the first structure; depositing to form at least one filling layer on the groove, the substrate, the first structure and the side wall of the first structure; forming a protective layer on the filling layer above the groove; removing the filling layer above the surface of the substrate so that the filling layer only remains in the trench; and removing the protective layer. Due to the deposition method, the materials of the substrate and the filling layer are not limited, and the substrate and the filling layer can be randomly configured according to the performance requirements of the device, so that the device has universality. In addition, under the covering of the protective layer, the filling layer in the groove cannot be damaged by the middle etching process, and the quality of the filling layer is ensured.

Description

A method for forming an embedded region and a method for forming an embedded source and drain

technical field

The present invention relates to semiconductor manufacturing technology, more specifically, to a method for forming an embedded region and a method for forming an embedded source and drain.

Background technique

With the rapid development of integrated circuit technology, the industry has put forward higher requirements for the performance of integrated circuit devices. In the manufacturing process of integrated circuit devices, it is necessary to form embedded regions in the substrate, especially embedded source and drain, to meet device performance requirements.

After entering the 90nm process era, one approach is to form embedded sources and drains through epitaxial technology, such as e-SiGe and e-SiC, and introduce stress on the channel through the embedded sources and drains to improve carrier mobility. , thereby increasing the speed of the device. Generally, the formation steps of the embedded source and drain include: as shown in FIG. The growth method forms embedded source and drain 130 in the groove 120 .

The technique of epitaxial growth is to grow a layer of epitaxial material with the same lattice arrangement as the substrate on the substrate. The limitation is that only the same material or materials with the same composition can be formed on the substrate material. When the substrate is single crystal silicon, it can only be epitaxially grown on single crystal silicon to form materials such as silicon or SiGe/SiC.

Due to the limitation of epitaxial technology, the above-mentioned problem of using epitaxial technology to form embedded sources and drains is that it can only be the same as the material or has the material composition, and cannot be filled with other materials arbitrarily.

Contents of the invention

An embodiment of the present invention provides a method for forming an embedded region, which can be applied to a substrate of a single crystal, amorphous or polycrystalline material, to form a filling region of any material on the substrate, and improve the versatility of the manufacturing process.

In order to achieve the above object, the embodiment of the present invention provides the following technical solutions:

A method of forming an embedding region, comprising:

providing a substrate and a first structure on the substrate;

forming trenches in the substrate on at least one side of the first structure;

Depositing to form at least one filling layer on the trench, the substrate, the first structure, and the sidewall of the first structure;

forming a protective layer on the filling layer above the trench;

removing the fill layer above the substrate surface such that the fill layer remains only in the trench;

The protective layer is removed.

Optionally, the step of forming the protective layer includes:

forming a protective layer on the surface of the filling layer; performing planarization until the filling layer on the first structure is exposed; etching the protective layer so that the protective layer remains only in the trench on top of the filling layer.

Optionally, the protection layer partially or completely covers the filling layer of the trench.

Optionally, the first structure includes a gate region, and the step of forming a trench on the substrate on at least one side of the first structure includes: forming a groove in the substrate below the sidewall of the gate region. groove.

Optionally, the step of forming a trench on the substrate on at least one side of the first structure includes: performing wet etching, so that the trench is embedded under at least one side of the first structure.

The material of the filling layer may include any one or combination of more of the following: single crystal or amorphous Si, Ge, SiGe, GaAs, InP or SiC. The material of the filling layer may also include Al, Ni or a combination thereof.

In addition, the present invention also proposes a method for forming an embedded source and drain according to the above method, the method comprising:

providing a substrate and a gate region on the substrate;

forming trenches in the substrate on at least one side of the gate region;

By depositing, at least one filling layer is formed on the substrate, the trench, the gate region, and the sidewall of the gate region;

forming a protection layer on the filling layer of the trench;

removing the fill layer above the substrate surface such that the fill layer remains only in the trench;

Remove the protective layer.

Optionally, the protection layer partially or completely covers the filling layer of the trench.

Optionally, the step of forming a protective layer on the filling layer of the trench includes: forming a protective layer on the surface of the filling layer; performing planarization treatment until the filling layer on the gate region is exposed; The protective layer is etched such that the protective layer remains only on the filling layer above the trench.

In an embodiment of the present invention, the gate region includes a gate stack and sidewalls surrounding the gate stack, and the step of forming the trench includes: performing wet etching so that the trench is embedded in the sidewall below.

Compared with the prior art, the above-mentioned technical solution has the following advantages:

In the method for forming the embedded region in the embodiment of the present invention, after forming a trench in the substrate, a filling layer is formed by deposition, and then a protective layer is formed on the filling layer of the trench, and through the masking of the protective layer, the Filling layer outside the trench to form an embedding region in the trench. Since it is deposited, the materials of the substrate and the filling layer are not limited, and can be arbitrarily configured according to device performance requirements, which is universal. In addition, under the cover of the protective layer, the filling layer in the trench will not be damaged by the intermediate etching process, thus ensuring the quality of the filling layer. For the formation of embedded source and drain regions, the embodiment of the present invention introduces various filling materials in the source and drain regions, because it is possible to introduce stress to the channel region through different source and drain region materials and processes, and improve the carrier density. the migration rate.

Description of drawings

The above and other objects, features and advantages of the present invention will be more clearly illustrated by the accompanying drawings. Like reference numerals designate like parts throughout the drawings. The drawings are not intentionally scaled according to the actual size, and the emphasis is on illustrating the gist of the present invention.

Figure 1-2 is a schematic diagram of the formation of embedded source and drain by epitaxial growth;

3 is a flowchart of a method for forming an embedded region according to an embodiment of the present invention;

4-11 are cross-sectional views of a method for forming an embedded region according to an embodiment of the present invention.

detailed description

In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described here, and those skilled in the art can do it without departing from the meaning of the present invention. By analogy, the present invention is therefore not limited to the specific examples disclosed below.

Secondly, the present invention is described in detail in combination with schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth should be included in actual production.

As mentioned in the background technology section, the embedded sources and drains are formed by epitaxial growth technology, and the embedded sources and drains filled on the substrate can only be the same as the material or have the material composition, and cannot be filled with other materials arbitrarily. , the present invention proposes a method for forming an embedded region. After the filling layer is formed by deposition, a protective layer is formed on the filling layer of the trench, and the filling layer outside the trench is removed through the cover of the protective layer, so that An embedding region is formed in the trench, so that the embedding region of any desired filling layer can be formed on any substrate.

Based on the above ideas, the present invention provides a method for forming an embedding region, the method comprising:

providing a substrate and a first structure on the substrate;

forming a trench in the substrate on at least one side of the first structure;

Depositing to form at least one filling layer on the trench, the substrate, the first structure, and the sidewall of the first structure;

forming a protective layer on the filling layer above the trench;

removing the fill layer above the substrate surface such that the fill layer remains only in the trench;

Remove the protective layer.

Wherein, the first structure may be a gate region.

Wherein, the protective layer may partially or completely cover the filling layer of the trench.

In addition, in the present invention, when forming the filling layer, a deposition method is adopted. The deposition method is relative to the epitaxial growth method. This deposition method can form an embedded region of any material on any substrate. , is a method of filling trenches other than the method of epitaxial growth.

In order to better understand the present invention, specifically, the formation of the embedded source and drain is taken as an example below, with reference to FIG. 3 and FIGS. 4-11 are cross-sectional views of the method for forming an embedded region according to an embodiment of the present invention.

In step S1 , a substrate 200 and a first structure 210 on the substrate 200 are provided.

Referring to FIG. 4, in this embodiment, the substrate 200 is a silicon substrate, the silicon substrate may be single crystal or amorphous silicon, the first structure 210 is a gate region, and the gate region 210 may include: a gate dielectric layer 202, a gate electrode 204, a cap layer 206, and sidewalls 208. Specifically, after depositing the gate dielectric layer 202, the gate electrode 204, and the cap layer 206 in sequence on the substrate 200, patterning The gate dielectric layer 202, the gate electrode 204 and the cap layer 206 are formed by forming the gate dielectric layer 202, the gate electrode 204, and the cap layer 206, and then, the sidewalls 208 are formed on their side walls. The structure and formation method of the gate region 210 are only examples, and the specific formation steps can be obtained through existing The process, materials, equipment, etc. in the technology are used to complete the process, which is not limited in the present invention.

In other embodiments, the substrate 200 may also include other semiconductors and compound semiconductors, such as germanium, silicon carbide, gallium arsenide, indium arsenide or indium phosphide. The substrate 200 may include various doping configurations according to design requirements known in the art (eg, p-type substrate or n-type substrate). In addition, preferably, the substrate 200 further includes an epitaxial layer, and the substrate 200 may also include a silicon-on-insulator (SOI) structure. In addition, the substrate 200 may have undergone pre-processing operations, and the processing operations may include pre-cleaning and forming isolation regions.

In step S2 , referring to FIG. 5 , trenches 212 are formed on the substrate 200 on at least one side of the first structure 210 .

In the present invention, it is determined according to specific requirements whether the trench embedded in the source and drain is formed in one step or separately. Specifically, in some cases, both the source region and the drain region need to be etched and formed symmetrically, then trenches can be etched on the substrate on both sides of the gate region at the same time; Although both the source region and the drain region need to be etched to form, but the etching conditions are different, the trenches of the source region and the drain region need to be formed on the substrate separately; One is formed by etching and the other is formed without etching.

In the embodiment shown in FIG. 5, only one of the source region or the drain region is formed by etching, that is, a trench 212 is formed in the substrate 200 on one side of the gate region 210 by etching. , as shown in Figure 5.

Specifically, first, a mask is formed on the substrate on one side of the gate region 210 and on the gate region 210, and then, the substrate is etched using an etching technique, and the substrate 200 on the other side of the gate region 210 is trenches 212 are formed inside, and then the mask is removed, and the substrate can be etched by wet etching, so that part of the substrate under the sidewalls 208 of the gate region 210 can also be etched away, so that under the sidewalls and The trench 210 formed on the substrate on the side of the side wall, the embedded source and drain formed through the trench has a better stress effect on the channel.

In step S3 , referring to FIG. 6 , deposition is performed to form at least one filling layer 214 on the trench 212 , the substrate 200 , the first structure 210 and the sidewalls of the first structure 210 .

In the present invention, the method of deposition is relative to the method of epitaxial growth. The method of deposition does not require the crystal orientation of the substrate to be a single crystal material, and is a method of forming a film other than the method of epitaxial growth. The method of epitaxial growth is a method of forming a single crystal film on a single crystal substrate.

In this embodiment, the filling layer formed by deposition can be semiconductor, semiconductor compound or metal material, for example, it can be single crystal or amorphous Si, Ge, SiGe, GaAs, InP or SiC, or metal material such as Al and Ni, the deposition method may be CVD (Chemical Vapor Deposition) and PVD (Physical Vapor Deposition). Multiple depositions can be performed and more than one fill layer can be formed.

In step S4 , referring to FIG. 9 , a protective layer 216 is formed on the filling layer 214 above the trench 212 .

In this embodiment, specifically, first, as shown in FIG. The layer 216 can be a dielectric material, such as SiO ₂ or SiN, and the thickness of the protective layer can be greater than the thickness of the gate region 210 plus the filling layer 214 .

Then, CMP (Chemical Mechanical Polishing) can be used to planarize the protective layer 216 until the upper surface of the filling layer 214 of the gate region 210 is exposed, as shown in FIG. 8 .

Then, an anisotropic etching method, such as RIE (Reactive Ion Etching), can be used to etch and remove the protective layer on the filling layer 214 of the substrate 200, as shown in FIG. A protection layer 216 is formed on the filling layer 214 of the trench 212 . In this embodiment, the protection layer 216 partially covers the filling layer 214 of the trench 212 .

In step S5 , referring to FIG. 10 , the substrate 200 , the first structure 210 and the filling layer 214 on the sidewall of the first structure 210 are removed.

An anisotropic etching method, such as RIE (Reactive Ion Etching), can be used to etch and remove the substrate 200, the gate region 210, and the filling layer 214 on the sidewall of the gate region 210, so that only in the trench 212 Fill layer 214 remains.

In step S6, referring to FIG. 11, the protection layer 216 is removed.

The protective layer 216 can be removed by dry or wet etching technology, so as to form embedded source and drain.

The protection layer covers the filling layer in the trench, and under the cover of the protection layer, the filling layer in the trench will not be damaged by the above multiple etching processes, thus ensuring the quality of the filling layer.

The above is the method of forming the embedded source and drain only on one side of the gate region, the embedded source and drain can be used as the embedded source region or the embedded drain region, and the corresponding drain region can be further formed on the other side of the gate region as required Or the source region, the above method can be used to further form the embedded drain region or source region, and other processes can also be used to form the required drain region or source region.

The method for forming the embedding region of the present invention has been described in detail above. After the trench is formed in the substrate, a filling layer is formed by deposition, and then a protective layer is formed on the filling layer of the trench. Through the protective layer The masking of the filling layer outside the trench is removed to form an embedded region in the trench. Since the deposition method is used, the materials of the substrate and the filling layer are not limited, and can be arbitrarily configured according to device performance requirements. Versatility. In addition, under the cover of the protective layer, the filling layer in the trench will not be damaged by the intermediate etching process, thus ensuring the quality of the filling layer.

In addition, through the method of the present invention, embedded sources and drains can also be formed on both sides of the gate region at the same time as required.

The above descriptions are only preferred embodiments of the present invention, and do not limit the present invention in any form.

Although the example embodiments and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made to these embodiments without departing from the spirit and scope of the invention as defined by the appended claims. For other examples, those of ordinary skill in the art will readily understand that the order of process steps may be varied while remaining within the scope of the present invention.

In addition, the scope of application of the present invention is not limited to the process, mechanism, manufacture, material composition, means, method and steps of the specific embodiments described in the specification. From the disclosure of the present invention, those of ordinary skill in the art will easily understand that for the processes, mechanisms, manufacturing, material compositions, means, methods or steps that currently exist or will be developed in the future, they are implemented in accordance with the present invention Corresponding embodiments described which function substantially the same or achieve substantially the same results may be applied in accordance with the present invention. Therefore, the appended claims of the present invention are intended to include these processes, mechanisms, manufacture, material compositions, means, methods or steps within their protection scope.

Claims (11)

1. embedding the forming method in district, described method includes:

The first structure on substrate and substrate is provided;

The substrate being positioned at described first structure at least side is formed groove;

It is deposited, groove, substrate, the first structure and the first structure side wall are formed at least one of which packed layer;

Protective layer is formed being positioned on the packed layer above described groove;

Remove the packed layer being positioned at more than described substrate surface, so that described packed layer is only remained in described groove;

Remove described protective layer;

The step forming described protective layer includes:

The surface of described packed layer is formed protective layer;

Carry out planarization process to expose to the packed layer in described first structure;

Described protective layer is performed etching, so that described protective layer is only remained on the packed layer above described groove.

2. method according to claim 1, it is characterised in that the packed layer of the part or all of covering groove of described protective layer.

3. method according to claim 1, it is characterised in that

Described first structure includes gate regions,

The described step forming groove on the substrate being positioned at the first structure at least side includes: the substrate below the sidewall of described gate regions forms groove.

4. method according to claim 1, it is characterised in that the described step forming groove on the substrate being positioned at the first structure at least side includes:

Carry out wet etching so that described groove is embedded in the lower section of at least side of described first structure.

5. according to the method one of Claims 1-4 Suo Shu, it is characterised in that the material of described packed layer includes any one or more combination following: Si, Ge, SiGe, GaAs, InP or SiC of monocrystalline or amorphous.

6. according to the method one of Claims 1-4 Suo Shu, it is characterised in that the material of described packed layer includes: Al, Ni or its combination.

7. embedding a forming method for source and drain, described method includes:

Gate regions on substrate and substrate is provided;

Groove is formed at the substrate being positioned at least side, described gate regions;

By depositing, described substrate, groove, gate regions and gate regions sidewall form at least one of which packed layer;

Protective layer is formed being positioned on the packed layer above described groove;

Remove the packed layer being positioned at more than described substrate surface, so that described packed layer is only remained in described groove;

Remove described protective layer;

Wherein, the step forming protective layer on the packed layer of groove includes:

The surface of described packed layer is formed protective layer;

Carry out planarization process to expose to the packed layer being positioned on described gate regions;

Described protective layer is performed etching, so that described protective layer is only remained on the packed layer above described groove.

8. method according to claim 7, it is characterised in that the packed layer of the part or all of covering groove of described protective layer.

9. method according to claim 7, it is characterised in that

It is stacking and around the stacking side wall of described grid that described gate regions includes grid,

The step then forming groove includes: carry out wet etching so that described groove is embedded in the lower section of described side wall.

10. according to the method one of claim 7 to 9 Suo Shu, it is characterised in that the material of described packed layer includes any one or more combination following: Si, Ge, SiGe, GaAs, InP or SiC of monocrystalline or amorphous.

11. according to the method one of claim 7 to 9 Suo Shu, it is characterised in that the material of described packed layer includes: Al, Ni or its combination.