CN102833145A - Self-adaptive dynamic bandwidth adjusting device and method - Google Patents
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Abstract
The invention discloses a self-adaptive dynamic bandwidth adjusting device and a self-adaptive dynamic bandwidth adjusting method to overcome the defect that the existing bandwidth cannot be adjusted in real time according to the current network situation. The device comprises a read storage control module and a channel read request converting module, wherein the channel read request converting module is used for respectively accumulating data bit width requested by the read request from each channel; if the accumulated value of the data bit width requested by the read request from certain channel is more than the preset data bit width value, the channel read request converting module generates and buffers the read operation request of the channel; the data bit width value requested by the read operation request is equal to the accumulated value; the read storage control module is used for judging whether the channel meets the read operation requirement when detecting that at least one channel read operation request is stored in the channel read request converting module, and reading out the read operation request and sending the request to a storage scheduling module if the channel meets the read operation requirement. By virtue of the device and the method, the bandwidth can be adjusted in real time according to the actual interface bandwidth requirement, and the design requirement on the storage scheduling bandwidth can be effectively reduced.
Description
Technical field
The present invention relates to metadata cache control technology field, be specifically related to the device and method that a kind of self adaptation is dynamically adjusted bandwidth.
Background technology
When memory is carried out the processing of access data, can adopt the memory scheduling method of memory being read and write by the weight timesharing.Weighted value corresponding a fixing scheduling bandwidth; Scheduling bandwidth will satisfy the bandwidth requirement that reads and writes data and handle; And the clock frequency of the data bit width number of memory and control storage has just determined the total bandwidth of scheduling, the respective weights value decision that the bandwidth of final read-write scheduling is taken by read-write.Therefore, after the data bit width of memory was confirmed, the scheduling bandwidth that reads and writes data will satisfy the bandwidth requirement that reads and writes data and handle, and just needed to select the suitable clock frequency and the weighted value of scheduling.
Suppose to have 4 write access and 4 read channels that external memory storage is carried out read-write operation, the weighted value of each passage of mean allocation then can be divided into 8 scheduling time sheet timesharing and read and write scheduling.If it is 500M that the maximum of each passage requires bandwidth, then need the bandwidth of 4G altogether.And reality the situation that all read/write channels reach the maximum bandwidth flow simultaneously generally can not occur in using; Promptly in per 8 scheduling time sheets; In some timeslice, can't carry out read-write operation, the waste that this has just caused timeslice makes bandwidth utilization reduce.When the maximum bandwidth value of each passage requirement is higher, just need satisfy bandwidth requirement through improving clock frequency or increasing the memory chip number, this just has higher requirement to factors such as difficulty of design, stability, costs.
Publication number be CN101686177 disclosure of the Invention a kind of distribution method of dynamic bandwidth of multi-service transmitting network, equipment and system, wherein, this method comprises: the bandwidth request information of obtaining all transmission container T-CONT frames in the professional Frame of transmission polymorphic type; The bandwidth of distributing each T-CONT frame according to the bandwidth allocation algorithm of said bandwidth request information and setting; Send bandwidth allocation information and give each node in the multi-service transmitting network.Utilize this method, can make dissimilar service dynamic ground shared channel bandwidth, improved bandwidth availability ratio, guaranteed QoS simultaneously.
But; Bandwidth allocation algorithm that aforesaid way is based on setting realizes that its dynamic shared bandwidth is to improve percentage bandwidth; This has just proposed higher requirement to the design of bandwidth allocation algorithm, and this algorithm is in case confirm; When network condition changes, still can not regulate voluntarily according to current situation.
Summary of the invention
The purpose of this invention is to provide a kind of self adaptation and dynamically adjust the device and method of bandwidth, to solve the existing defective that can't regulate bandwidth according to the current network situation in real time.
For solving the problems of the technologies described above, the invention provides the device that a kind of self adaptation is dynamically adjusted bandwidth, comprise the memory scheduling module, said device also comprises: read storage control module and passage read request modular converter;
Said passage read request modular converter is used for respectively adding up the data bit width of asking from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the said read operation request data bit width value of being asked equals said aggregate-value;
The said storage control module of reading is used for after detecting said passage read request modular converter and storing the read operation request of at least one passage; If judging said passage meets the read operation requirement, then read said read operation Intra-request Concurrency and give said memory scheduling module.
Further, comprise the first in first out corresponding (FIFO) submodule and the request accumulative total submodule corresponding in the said passage read request modular converter with each passage with each passage;
Described request accumulative total submodule is used for the data bit width that accumulative total is asked from the read request of its corresponding passage; Also be used for the aggregate-value of the read request data bit width of asking during more than or equal to said preset data bit width value at corresponding passage of coming from of accumulative total, the said read operation Intra-request Concurrency that generates this passage is given corresponding FIFO submodule;
Said FIFO submodule is used for the said read operation request that buffer memory receives.
Further; The said storage control module of reading detects the read operation request that stores at least one passage correspondence in the said passage read request modular converter; Specifically comprise: the said storage control module of reading is carried out poll to said N FIFO submodule, detects wherein and stores at least one read operation request at least one FIFO submodule.
Further; The said storage control module of reading is judged said passage and is met the read operation requirement; Specifically comprise: the said storage control module of reading is judged and has been stored the message of said passage more than 1 in the external memory storage, and the remaining data space of the said channel interior data random access memory data bit width value of being asked greater than said read operation request.
Further, said preset data bit width value be no more than external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
Further, said device also comprises data processing module;
Said memory scheduling module is initiated read operation according to the said read operation request that receives to said external memory storage, and the data of reading are sent to said data processing module;
Said data processing module links to each other with a said N passage, is used for the data that receive are sent to the pairing passage of said read operation request.
Further, said data processing module also is used for reading the remaining data spatial information that storage control module reports the internal data random access memory of each passage to said; Offer the said storage control module of reading on the quantity of the message of each passage that said memory scheduling module also is used for said external memory storage is stored.
For solving the problems of the technologies described above, the method that the present invention also provides a kind of self adaptation dynamically to adjust bandwidth is applied to external memory storage is carried out comprising in the device of read-write operation:
The data bit width of totally asking respectively from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the said read operation request data bit width value of being asked equals said aggregate-value;
After in detecting this device, storing the read operation request of at least one passage,, then initiate the read operation request to said external memory storage if judging said passage meets the read operation requirement.
Further; Saidly judge said passage and meet the read operation requirement; Specifically comprise: judge and stored the message of said passage more than 1 in the said external memory storage, and the remaining data space of the said channel interior data random access memory data bit width value of being asked greater than said read operation request.
Further, said preset data bit width value be no more than said external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
After adopting the present invention, can adjust scheduling bandwidth in real time, effectively reduce designing requirement the memory scheduling bandwidth according to the demand of interface bandwidth.And the present invention need not to set bandwidth allocation algorithm, fully only based on the request at the upper reaches, therefore has more versatility and adaptivity.
Description of drawings
Fig. 1 dynamically adjusts the structure chart of the device of bandwidth for self adaptation in the embodiment of the invention;
The flow chart that Fig. 2 produces for read request in the applying examples of the present invention.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, hereinafter will combine accompanying drawing that embodiments of the invention are elaborated.Need to prove that under the situation of not conflicting, embodiment among the application and the characteristic among the embodiment be combination in any each other.
As shown in Figure 1, a kind of self adaptation is dynamically adjusted the device of bandwidth, comprising: memory scheduling module, data processing module and write storage control module.In this example, newly-increased passage read request modular converter and read storage control module.
Write storage control module and be used to accomplish the control that data is write request, data and address.When data to be written satisfy when writing the requiring of external memory storage, write storage control module and be used for sending and write request, write address and data to be written to the memory scheduling module, be written to data to be written in the external memory storage by the memory scheduling module.
The memory scheduling module is used to accomplish the scheduling of each passage read-write external memory storage.It is used to receive the read-write requests of each passage, correspondingly accomplishes according to request the data write in the external memory storage is operated.The memory scheduling module is handled the request of read-write direction according to the weight of preset read-write direction; Request timesharing according to the read-write direction takies the bandwidth of memory, guarantees the readwrite bandwidth of read-write direction.
Passage read request modular converter is used for respectively adding up the data bit width of asking from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the read operation request data bit width value of being asked equals above-mentioned aggregate-value.
Suppose to have the wide scheduling of will reading tape of N passage; Promptly send N read request Req1～ReqN; N FIFO (First IN First Out is set in passage read request modular converter; First in first out) and N request accumulative total submodule, totally submodule is corresponding one by one for each FIFO and a passage and a request.For guaranteeing that FIFO does not overflow, setting FIFO will have enough degree of depth.The data bit width that the read request that each request accumulative total submodule is sent the passage of correspondence is independently asked adds up; Up to the value of the data bit width of accumulative total during more than or equal to preset data bit width value; Send the read operation request of external memory storage being carried out a read operation to the FIFO of correspondence, FIFO preserves after receiving this read operation request; Wherein, this preset data bit width value be no more than external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
Read the control that storage control module is used to accomplish the read operation request and reads the address, the scheduling controlling of carrying out the read operation request.After in detecting said passage read request modular converter, storing the read operation request of at least one passage,, then read above-mentioned read operation Intra-request Concurrency and give the memory scheduling module if judging said passage meets the read operation requirement.It is used for the state of each FIFO of poll passage read request modular converter; If the FIFO non-NULL that is polled to; Then judge again and stored corresponding message and this channel interior data RAM (the Random Access Memory of passage more than 1 of this FIFO in the external memory storage; When random access memory) enough data spaces being arranged, produce this passage and give the memory scheduling module the read operation Intra-request Concurrency of external memory storage; Continue the situation of next FIFO of poll then.Wherein, the message storage condition of each passage is given by memory scheduling module real-time report and is read storage control module in the external memory storage, and the full state of the sky of each channel interior data RAM is reported by data processing module and reads storage control module;
Reading storage control module cooperates with passage read request modular converter; The read request of each passage real-time change is converted into read operation request from data read operation to external memory storage that carry out; Make the bandwidth demand that scheduling bandwidth dynamic tracking passage is actual, realize the self adaptation adjustment of each channel scheduling bandwidth.Avoid adopting each passage to take the traditional scheduler method of fixed schedule bandwidth, more effectively improved bandwidth availability ratio, and then reduced the bandwidth Design requirement of memory scheduling.
Data processing module will deposit internal data RAM through the data that the memory scheduling module is read from external memory storage in, and can carry out the output of data according to the read request of each passage.
Below in conjunction with accompanying drawing, this invention is described in further detail in the enforcement of POS (Packet Over SDH carries the IP bag based on synchronous digital system network) during interfacing is up.In this example, pos interface module Ethernet adopts a GE (Gigabit Ethernet, gigabit) interface, and the SDH interface is supported the pattern of 4 STM-1 or 2 STM-4.
The Ethernet receive direction receives message from Ethernet interface, and the payload that extracts message deposits external memory storage in; The SDH sending direction is mapped to each passage from the external memory storage reading of data.Each module that relates in the face of invention down is elaborated.
Storage control module is write by first.
Elder generation deposits the payload of the message that Ethernet interface receives in internal RAM.Internal RAM is accomplished the conversion of ethernet clock territory to memory scheduling module controls clock zone.When the data of internal RAM storage satisfy the requirement that deposits external memory storage in and external memory storage less than the time; According to the channel number under this message; Send to the memory scheduling module and to write request, write address and data to be written, remove the request of writing after receiving the response of memory scheduling module.
Second portion, the memory scheduling module.
Because the Ethernet interface of writing direction is GE (Gigabit Ethernet, gigabit Ethernet) mouthful, and the SDH interface maximum bandwidth demand of reading direction is 2*622M.Therefore design the SSRAM that a slice operating frequency is 100MHz (Synchronous Static Random Access Memory; Synchronous static RAM); External memory storage scheduling total bandwidth is 100*32=3.2G, is divided into 3 timeslices, and each timeslice has the scheduling bandwidth above 1G; Wherein the dispatch weight of writing of Ethernet receive direction is 1, takies 1 timeslice; The dispatch weight of reading of SDH sending direction is 2, takies two timeslices.The memory scheduling module adopts scheduler control clock, receives the read-write requests of each passage, accomplishes the scheduling of each passage read-write memory according to request.Once the data bit width of read-write scheduling is designed to the data of 4 bat clocks, 4*32=128 bit, i.e. 16 bytes altogether.
Third part, passage read request modular converter.
In this example, SDH supports 8 virtual cascade group passages, and the maximum bandwidth of each passage requires to be 622MHz, and passage read request modular converter converts the read request of 8 passages to the read operation request of 8 application scheduling bandwidths respectively.
In this example, it is 16 that each passage is provided with an address space size, and bit wide is 1 FIFO.Detect the request of data Req1～Req8 of each passage of SDH transmission, the request bit wide to each passage adds up respectively respectively.The read request of a corresponding byte data of SDH clock cycle of request signal, passage whenever receives the read request of a byte, and the read request bit wide aggregate-value of this passage is added 1.When the request bit wide aggregate-value of certain passage near the data bandwidth of primary memory scheduling promptly during 16 bytes (the request aggregate-value that is made as in originally showing when certain passage equals 12 bytes); The FIFO corresponding to this passage writes a read operation request, and the read request bit wide accumulated value of this passage of zero clearing also restarts accumulative total.FIFO writes and adopts the SDH clock, and FIFO completely then stops to write.
The 4th part is read storage control module.
Read the control that storage control module is used to accomplish the data reading operation request and reads the address.As shown in Figure 2, the state of the FIFO that each passage of poll is corresponding if the FIFO when the prepass correspondence of poll is empty, is then read the address with FIFO and is added 1, continues to detect the corresponding FIFO of next passage; If the FIFO non-NULL that the passage that is polled to is corresponding; And this channel interior data RAM has the space of the data of writing; And external memory storage has stored the above message data of this passage one frame; Then send the read operation request of this passage and read the address, remove this read operation request after receiving the response that the memory scheduling module sends to the memory scheduling module.
This is read storage control module and combines with passage read request modular converter; Each passage of SDH interface is converted to the read operation request of request for data scheduling bandwidth to the bandwidth in time read request; The bandwidth of each passage request for data is dynamically adjusted in realization according to the real-time configuration self adapting ground of each passage; Each passage is shared scheduling bandwidth according to real-time request of data situation; When the method for having avoided adopting each passage to divide a fixed schedule bandwidth was dispatched, each passage but still took the situation of fixing scheduling bandwidth at low discharge, has improved bandwidth utilization.
The 5th part, data processing module.
To deposit internal data RAM in by channel number through the data that the memory scheduling module is read from external memory storage.Accomplish of the conversion of scheduler control clock zone by internal data RAM to the SDH clock zone.Read request according to each passage of receiving is carried out processing back outputs such as framing to the data of respective channel.
External memory storage is being carried out in the device of read-write operation, the realization self adaptation is dynamically adjusted the method for bandwidth, comprising:
The data bit width of totally asking respectively from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the said read operation request data bit width value of being asked equals said aggregate-value;
After in detecting this device, storing the read operation request of at least one passage,, then initiate the read operation request to said external memory storage if judging said passage meets the read operation requirement.
Preferably; Above-mentionedly judge said passage and meet the read operation requirement; Specifically comprise: judge and stored the message of said passage more than 1 in the said external memory storage, and the remaining data space of the said channel interior data random access memory data bit width value of being asked greater than said read operation request.
Preferably, above-mentioned preset data bit width value be no more than said external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
Above-described specific embodiment has carried out further explain to the object of the invention, technical scheme and beneficial effect, this scheme in obtained checking in the emerging optical transmission device.The present invention is applicable to the situation of a scheduling bandwidth of a plurality of channels share, through the bandwidth demand self adaptation adjustment scheduling bandwidth of each passage of dynamic tracking, thereby realizes each channel scheduling bandwidth sharing, improves bandwidth availability ratio, has reduced the requirement to bandwidth Design.
One of ordinary skill in the art will appreciate that all or part of step in the said method can instruct related hardware to accomplish through program, said program can be stored in the computer-readable recording medium, like read-only memory, disk or CD etc.Alternatively, all or part of step of the foregoing description also can use one or more integrated circuits to realize.Correspondingly, each the module/unit in the foregoing description can adopt the form of hardware to realize, also can adopt the form of software function module to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
The above is merely the preferred embodiments of the present invention, is not to be used to limit protection scope of the present invention.According to summary of the invention of the present invention; Also other various embodiments can be arranged; Under the situation that does not deviate from spirit of the present invention and essence thereof, those of ordinary skill in the art are when making various corresponding changes and distortion according to the present invention, and are all within spirit of the present invention and principle; Any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a self adaptation is dynamically adjusted the device of bandwidth, comprises the memory scheduling module, it is characterized in that: also comprise: read storage control module and passage read request modular converter;
Said passage read request modular converter is used for respectively adding up the data bit width of asking from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the said read operation request data bit width value of being asked equals said aggregate-value;
The said storage control module of reading is used for after detecting said passage read request modular converter and storing the read operation request of at least one passage; If judging said passage meets the read operation requirement, then read said read operation Intra-request Concurrency and give said memory scheduling module.
2. device as claimed in claim 1 is characterized in that:
Comprise the first in first out corresponding (FIFO) submodule and the request accumulative total submodule corresponding in the said passage read request modular converter with each passage with each passage;
Described request accumulative total submodule is used for the data bit width that accumulative total is asked from the read request of its corresponding passage; Also be used for the aggregate-value of the read request data bit width of asking during more than or equal to said preset data bit width value at corresponding passage of coming from of accumulative total, the said read operation Intra-request Concurrency that generates this passage is given corresponding FIFO submodule;
Said FIFO submodule is used for the said read operation request that buffer memory receives.
3. device as claimed in claim 2 is characterized in that:
The said storage control module of reading detects the read operation request that stores at least one passage correspondence in the said passage read request modular converter, specifically comprises:
The said storage control module of reading is carried out poll to said N FIFO submodule, detects wherein and stores at least one read operation request at least one FIFO submodule.
4. like any described device in the claim 1～3, it is characterized in that:
The said storage control module of reading is judged said passage and is met the read operation requirement, specifically comprises:
The said storage control module of reading is judged and has been stored the message of said passage more than 1 in the external memory storage, and the remaining data space of the said channel interior data random access memory data bit width value of being asked greater than said read operation request.
5. like any described device in the claim 1～3, it is characterized in that:
Said preset data bit width value be no more than external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
6. device as claimed in claim 4 is characterized in that, also comprises data processing module;
Said memory scheduling module is initiated read operation according to the said read operation request that receives to said external memory storage, and the data of reading are sent to said data processing module;
Said data processing module links to each other with a said N passage, is used for the data that receive are sent to the pairing passage of said read operation request.
7. device as claimed in claim 6 is characterized in that:
Said data processing module also is used for reading the remaining data spatial information that storage control module reports the internal data random access memory of each passage to said;
Offer the said storage control module of reading on the quantity of the message of each passage that said memory scheduling module also is used for said external memory storage is stored.
8. a self adaptation is dynamically adjusted the method for bandwidth, is applied to external memory storage is carried out comprising in the device of read-write operation:
The data bit width of totally asking respectively from the read request of each passage; As the aggregate-value of the read request that comes from certain passage data bit width of asking is more than or equal to preset data bit width value, generates and a read operation request of this passage of buffer memory; Wherein, the said read operation request data bit width value of being asked equals said aggregate-value;
After in detecting this device, storing the read operation request of at least one passage,, then initiate the read operation request to said external memory storage if judging said passage meets the read operation requirement.
9. method as claimed in claim 8 is characterized in that:
Saidly judge said passage and meet the read operation requirement, specifically comprise:
Judge and stored the message of said passage more than 1 in the said external memory storage, and the remaining data space of the said channel interior data random access memory data bit width value of being asked greater than said read operation request.
10. like claim 8 or 9 described methods, it is characterized in that:
Said preset data bit width value be no more than said external memory storage is carried out a read operation maximum allowable number according to the bit wide value.
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| PCT/CN2012/072420 WO2012171370A1 (en) | 2011-06-16 | 2012-03-16 | Device for self-adaptively and dynamically adjusting bandwidth, and method thereof |
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| CN110134366B (en) * | 2019-05-21 | 2022-10-11 | 合肥工业大学 | Method and device for parallel writing in multi-channel FIFO |
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| WO2012171370A1 (en) | 2012-12-20 |
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