CN102931065B - The formation method of metal gates - Google Patents
The formation method of metal gates Download PDFInfo
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- CN102931065B CN102931065B CN201110231650.3A CN201110231650A CN102931065B CN 102931065 B CN102931065 B CN 102931065B CN 201110231650 A CN201110231650 A CN 201110231650A CN 102931065 B CN102931065 B CN 102931065B
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- 239000002184 metal Substances 0.000 title claims abstract description 59
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 59
- 238000000034 method Methods 0.000 title claims abstract description 41
- 230000015572 biosynthetic process Effects 0.000 title claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 230000002209 hydrophobic effect Effects 0.000 claims abstract description 11
- 150000002500 ions Chemical class 0.000 claims description 50
- 238000000137 annealing Methods 0.000 claims description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- -1 oxonium ion Chemical class 0.000 claims description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 239000003595 mist Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 239000001307 helium Substances 0.000 claims description 5
- 229910052734 helium Inorganic materials 0.000 claims description 5
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 5
- 239000007789 gas Substances 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 12
- 238000000227 grinding Methods 0.000 abstract description 10
- 239000007788 liquid Substances 0.000 abstract description 8
- 230000007423 decrease Effects 0.000 abstract description 5
- 239000000945 filler Substances 0.000 abstract description 3
- 239000000126 substance Substances 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 241000720974 Protium Species 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- 239000007943 implant Substances 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000011513 prestressed concrete Substances 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- YZCKVEUIGOORGS-IGMARMGPSA-N Protium Chemical compound [1H] YZCKVEUIGOORGS-IGMARMGPSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 230000005226 mechanical processes and functions Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention provides a kind of formation method of metal gates, comprising: provide substrate, described substrate surface is formed with alternative gate structure; Form dielectric layer at described substrate surface, described dielectric layer covers described alternative gate structure; Dielectric layer described in cmp, makes dielectric layer surface flush with described alternative gate body structure surface; Remove described alternative gate structure, form groove; Adopt filler to fill described groove, form metal gates.Wherein, before cmp to dielectric layer surface flushes with described alternative gate body structure surface, also comprise and ion doping is carried out to described alternative gate structure, make described alternative gate structure be converted to hydrophilic material by hydrophobic material.Replacement gate after doping and the dielectric layer be adjacent are hydrophilic material, decrease the difference of the grinding effect that the difference because of material causes.Namely the distribution of described lapping liquid in described replacement gate and dielectric layer surface and action effect even, improve the reliability of metal gates.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of formation method of metal gates.
Background technology
Along with the reduction of technology node, traditional gate dielectric layer is constantly thinning, and transistor leakage amount increases thereupon, causes the problems such as semiconductor device power wastage.For solving the problem, prior art provides a kind of solution metal gates being substituted polysilicon gate.Wherein, " post tensioned unbonded prestressed concrete (gate last) " technique is the main technique forming metal gates.
The Chinese patent application document that patent publication No. is CN101438389A provides a kind of method using " post tensioned unbonded prestressed concrete " technique to form metal gates, comprise: substrate is provided, described substrate is formed with alternative gate structure and is positioned at the dielectric layer described substrate covering described alternative gate structure; Using described alternative gate structure as stop-layer, CMP (Chemical Mechanical Polishing) process is carried out to described dielectric layer; Groove is formed after removing described alternative gate structure; Finally to described trench fill medium and metal, to form gate dielectric layer and metal gate electrode layer.
Find in practical application, the reliability of the semiconductor device formed by technique scheme is lower.
Summary of the invention
The problem that the present invention solves is to provide a kind of formation method of metal gates, with the problem that the reliability solving the semiconductor device adopting prior art to be formed is lower.
For solving the problem, the invention provides a kind of formation method of metal gates, comprising:
There is provided substrate, described substrate surface is formed with alternative gate structure;
Form dielectric layer at described substrate surface, described dielectric layer covers described alternative gate structure;
Dielectric layer described in cmp, makes dielectric layer surface flush with described alternative gate body structure surface;
Remove described alternative gate structure, form groove;
Adopt filler to fill described groove, form metal gates;
Wherein, before cmp to dielectric layer surface flushes with described alternative gate body structure surface, also comprise and ion doping is carried out to described alternative gate structure, make described alternative gate structure be converted to hydrophilic material by hydrophobic material.
Optionally, described cmp comprises: adopt the first cmp to remove the described dielectric layer of part, and retains dielectric layer in described alternative gate body structure surface residue; Then ion doping is carried out to described alternative gate structure; Adopt the second cmp, until dielectric layer surface flushes with alternative gate body structure surface;
Optionally, described in the surface distance of described reservation dielectric layer, the thickness range of alternative gate structural top is
Optionally, after forming the dielectric layer covering described alternative gate structure, ion doping is carried out to described alternative gate structure; Then carry out dielectric layer described in cmp, dielectric layer surface is flushed with described alternative gate body structure surface.
Optionally, the ion of described ion doping is oxonium ion or fluorine ion.
Optionally, the material of described dielectric layer is one of silica, silicon nitride or combination.
Optionally, the technological parameter of described ion doping comprises: ion doping energy range is 1Kev ~ 10Kev, and described ion concentration is 1E14 ~ 5E16atom/cm
2.
Optionally, the technological parameter of described ion doping comprises: ion doping energy range is 10Kev ~ 200Kev, and described ion concentration is 1E15 ~ 5E17atom/cm
2.
Optionally, described dielectric layer comprises first medium layer and is positioned at the second dielectric layer on described first medium layer surface.
Optionally, described first medium layer is silicon nitride, and described second dielectric layer is silica.
Optionally, described first cmp is surperficial for polish stop layer with described first medium layer.
Optionally, the ion of described ion doping is oxonium ion or fluorine ion.
Optionally, the material of described dielectric layer is one of silica, silicon nitride or combination.
Optionally, after ion doping is carried out to described dielectric layer, also comprise and annealing process is carried out to described dielectric layer.
Optionally, described parameter and annealing comprises: anneal gas is the mist of the mist of nitrogen, helium, inert gas or nitrogen and oxygen, helium and oxygen, annealing region is 400 ~ 600 DEG C, annealing time scope 10 ~ 120s or annealing region are 700 ~ 1000 DEG C, and annealing time scope is 0.25 ~ 2ms.
Optionally, described ion doping is carried out to alternative gate structure, ion doping is carried out to described dielectric layer simultaneously.
Compared with prior art, such scheme has the following advantages:
Before cmp to dielectric layer surface flushes with described alternative gate body structure surface, ion doping is carried out to described alternative gate structure, described alternative gate structure is made to be converted to hydrophilic material by hydrophobic material, namely the replacement gate after doping and the dielectric layer be adjacent are hydrophilic material, decrease the difference of the grinding effect that the difference because of material causes, the distribution of lapping liquid in described replacement gate and dielectric layer surface and action effect even, avoid because of between alternative gate structure and dielectric layer because grinding the depression caused, avoid the formation of unnecessary recessed metal further, improve the reliability of metal gates.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the method for forming metallic grid structural representation of prior art.
Fig. 4 to Figure 12 is the method for forming metallic grid structural representation of one embodiment of the invention.
Embodiment
Form the reliability of metal gates by prior art lower, be mainly manifested in be formed with metal gates transistor between may be short-circuited phenomenon or electric conductivity unstable.Inventor finds that reason is as follows: formed alternative gate structure and cover described alternative gate structure dielectric layer after, need using described alternative gate structure as stop-layer, CMP (Chemical Mechanical Polishing) process is carried out to described dielectric layer, but because alternative gate structural material is mainly polysilicon, and dielectric layer mostly is silica.It is unbalanced that the difference of bi-material acts on when causing cmp.
Be illustrated in figure 1 the structure after cmp, comprise two alternative gate structures 010, and the dielectric layer 020 between described two alternative gate structures 010.Wherein, in order to illustrate conveniently, described alternative gate structure 010 only illustrates replacement gate, the not shown side wall being positioned at described replacement gate both sides.Wherein, described replacement gate is polycrystalline silicon material, and described dielectric layer 020 is silica, and wherein polycrystalline silicon material is hydrophobic material, and silica is hydrophilic material.In chemical mechanical planarization process, compared with the replacement gate of hydrophobic material, the dielectric layer 020 of hydrophilic material is easier to make lapping liquid be attached to its surface, and then improves the etching effect of dielectric layer 020.Etching result shows as in the interface of alternative gate structure 010 with dielectric layer 020, and described dielectric layer 020 is etched more, causes depression as shown in Figure 1.
As shown in Figure 2, remove alternative gate structure, form groove 010 '.Follow-up will at the interior filling metal of described groove 010 ', to form metal gates.
As shown in Figure 3, filling is carried out to described groove 010 ' and form metal gates 012.But because in aforesaid chemical mechanical planarization process, to be formed with the adjacent of described alternative gate structure at dielectric layer 020 and cave in.In the process of filling metal material formation metal gates, described metal material can fill described depression simultaneously.Being full of metal in depression makes the position of former dielectric layer have electric conductivity, so may be short-circuited between the transistor making to be formed with metal gates phenomenon or electric conductivity unstable.
For solving the problem, the invention provides a kind of formation method of metal gates, comprising:
There is provided substrate, described substrate surface is formed with alternative gate structure;
Form dielectric layer at described substrate surface, described dielectric layer covers described alternative gate structure;
Dielectric layer described in cmp, makes dielectric layer surface flush with described alternative gate body structure surface;
Remove described alternative gate structure, form groove;
Adopt filler to fill described groove, form metal gates;
Wherein, before cmp to dielectric layer surface flushes with described alternative gate body structure surface, also comprise and ion doping is carried out to described alternative gate structure, make described alternative gate structure be converted to hydrophilic material by hydrophobic material.
Be described in detail below in conjunction with the formation method of accompanying drawing to the metal gates of one embodiment of the invention.
As shown in Figure 4, provide substrate 110, described substrate 110 surface is formed with oxide layer 120 and is positioned at the sacrifice layer 130 on described oxide layer 120 surface, and described sacrifice layer 130 is polysilicon layer; Follow-uply will etch described sacrifice layer 130 to form replacement gate.
Further, in described substrate 110, be formed with isolation structure 100, for carrying out electrical insulation to the device of follow-up formation.Subsequently, the both sides at described isolation structure 100 are respectively formed a metal gate structure.
As shown in Figure 5, form the photoresist layer 140 of patterning on described sacrifice layer 130 surface, the pattern of described photoresist layer 140 is corresponding with follow-up replacement gate to be formed.
In the lump with reference to figure 5 and Fig. 6, with described photoresist layer 140 for sacrifice layer described in mask etching 130, form replacement gate 150.Expose described oxide layer 120 surface simultaneously.
As shown in Figure 7, remove photoresist layer, and with described replacement gate 150 for mask, ion doping is carried out to described substrate 110, form light dope source/drain region 161 in described replacement gate 150 both sides.Then side wall 170 is formed in described replacement gate 150 both sides.And with described side wall 170 for mask, form heavy doping source/drain region 162 in described side wall 170 both sides.Wherein, described replacement gate 150 forms alternative gate structure with the side wall 170 being positioned at its both sides.
As shown in Figure 8, form dielectric layer 180 on described oxide layer 120 surface, cover described alternative gate structure simultaneously.For the dielectric layer surface that follow-up formation flushes with replacement gate structure, so described dielectric layer 180 should cover described alternative gate structure and exceed described alternative gate body structure surface.The material of described dielectric layer 180 is one of silica, silicon nitride or combination.
As shown in Figure 9, adopt the described dielectric layer 180 of the first cmp removal part, and remain at described alternative gate body structure surface dielectric layer of withing a hook at the end, described in the surface distance of described reservation dielectric layer, the thickness range of alternative gate structural top is about
then, the alternative gate structure that effects on surface is coated with described reservation dielectric layer carries out ion doping.In the present embodiment, described ion doping is carried out to alternative gate structure, ion doping is carried out to described dielectric layer 180 simultaneously.As other embodiments, only ion doping can also be carried out to described alternative gate structure.
Particularly, described Doped ions is oxonium ion or fluorine ion, described oxonium ion and fluorine-ion-doped enter after described alternative gate structure, preferably after annealed technique, described oxonium ion or fluorine ion with the element silicon bonding in described alternative gate structure, can form silicon-oxygen key or silicon-fluorine bond.Compared with former replacement gate, described in be formed with silicon-oxygen key or silicon-fluorine bond alternative gate structure be easier to adhere to the fluid molecule in cmp.Namely the replacement gate of nearly surface is formed with silicon-oxygen key or silicon-fluorine bond, and be converted to hydrophilic material (replacement gate of former do not adulterate described oxonium ion or fluorine ion is hydrophobic material), the oxonium ion in described alternative gate structure or fluorine ion are easy to and the protium bonding (protium as in hydrone) in described liquid.
In subsequent chemical mechanical process of lapping, described replacement gate and the dielectric layer be adjacent are hydrophilic material, decrease the difference of the grinding effect that the difference because of material causes.Namely the distribution of described lapping liquid in described replacement gate and dielectric layer surface and action effect even, avoid because of between alternative gate structure and dielectric layer because grinding the depression caused, avoid when the grinding of subsequent metal electrode further, there is metal residual in depressed area, thus improve the reliability of device.
Particularly, the technological parameter of described ion doping comprises: the implant energy scope of described Doped ions is 1Kev ~ 10Kev, and the doping content of described Doped ions is 1E14 ~ 5E16atom/cm
2.
Further, after ion doping is carried out to described alternative gate structure, also comprise and annealing process is carried out to described alternative gate structure.Wherein, described parameter and annealing comprises: anneal gas is the mist of the mist of nitrogen, helium, inert gas or nitrogen and oxygen, helium and oxygen, annealing region is 400 ~ 600 DEG C, annealing time scope 10 ~ 120s or annealing region are 700 ~ 1000 DEG C, and annealing time scope is 0.25 ~ 2ms.
As described in Figure 10, adopt the second cmp, until dielectric layer 180 surface flushes with described alternative gate body structure surface.
In the second chemical mechanical planarization process, the replacement gate being formed with silicon-oxygen key or silicon-fluorine bond is converted to hydrophilic material, and the oxygen element namely in described alternative gate structure or fluorine element are easy to and the protium bonding in described liquid.The dielectric layer 180 adjacent with described alternative gate structure is all hydrophilic material, decreases the difference of the grinding effect that the difference because of material causes.Namely the distribution of lapping liquid in described replacement gate and dielectric layer 180 surface and action effect even, avoid between described alternative gate structure and dielectric layer because grinding the depression caused, avoid the formation of unnecessary recessed metal further, improve the reliability of metal gates.
In the present embodiment, by first removing the dielectric layer of part, then ion doping being carried out to described replacement gate, also ion doping being carried out to reservation dielectric layer simultaneously; And then carry out the second cmp.As other embodiments, before the first cmp, ion doping can also be carried out to the described alternative gate structure being coated with dielectric layer.But because not yet carrying out any cmp, the thickness of described dielectric layer is thicker, so the implant energy of Doped ions and doping content all need higher.The implant energy scope of described Doped ions is 10Kev ~ 200Kev, and described ion concentration is 1E15 ~ 5E17atom/cm
2.
In above-described embodiment, described dielectric layer 180 is silica material.As other embodiments, described dielectric layer 180 can also be compound medium layer.
As another embodiment, described dielectric layer 180 is the stacking of materials at two layers, includes first medium layer and is positioned at the second dielectric layer on described first medium layer surface.Wherein, described first medium layer can be silicon nitride, and described second dielectric layer can be silica.
Particularly, can be the polish stop layer of the first cmp with described first medium layer (as silicon nitride), carry out cmp to described dielectric layer, namely described first medium layer (as silicon nitride) be as retaining dielectric layer; Then carrying out ion doping to being coated with the alternative gate structure retaining dielectric layer, being converted to hydrophilic material to make described alternative gate structure by hydrophobic material; Then adopt dielectric layer described in the second cmp, flush with the surface of described alternative gate structure to make described dielectric layer surface.
As shown in figure 11, remove described replacement gate and form groove 200.In the present embodiment, described side wall 170 retains, and continues the side wall as subsequent metal grid.As other embodiments, described side wall 170 can also be removed, and in follow-up technique, form the side wall of the new side wall of one deck as metal gates again.
As shown in figure 12, described groove is filled, form metal gates 210.Described metal gates 210 and described side wall 170 form described metal gate structure.As other embodiments, before metal filled, the described oxide layer 120 being positioned at groove can also be removed, and fill the oxide layer of new dielectric material (as hafnium) as metal gates, and then fill metal and form metal gates 210.
Compared with prior art, such scheme has the following advantages:
Before cmp to dielectric layer surface flushes with described alternative gate body structure surface, ion doping is carried out to described alternative gate structure, described alternative gate structure is made to be converted to hydrophilic material by hydrophobic material, namely the replacement gate after doping and the dielectric layer that is adjacent are hydrophilic material, decrease the difference of the grinding effect that the difference because of material causes.Namely the distribution of described lapping liquid in described replacement gate and dielectric layer surface and action effect even, avoid between described alternative gate structure and dielectric layer because grinding the depression caused, avoid the formation of unnecessary recessed metal further, improve the reliability of metal gates.
The foregoing is only specific embodiments of the invention; spirit of the present invention is better understood in order to make those skilled in the art; but protection scope of the present invention not with the specific descriptions of this specific embodiment for limited range; any those skilled in the art without departing from the spirit of the scope of the invention; can make an amendment specific embodiments of the invention, and not depart from protection scope of the present invention.
Claims (15)
1. a formation method for metal gates, is characterized in that, comprising:
There is provided substrate, described substrate surface is formed with alternative gate structure, and described alternative gate structure is hydrophobic material;
Form dielectric layer at described substrate surface, described dielectric layer covers described alternative gate structure; Described dielectric layer is hydrophilic material;
Dielectric layer described in cmp, makes dielectric layer surface flush with described alternative gate body structure surface;
Remove described alternative gate structure, form groove;
Described groove is filled, forms metal gates;
Wherein, before cmp to dielectric layer surface flushes with described alternative gate body structure surface, also comprise and ion doping is carried out to described alternative gate structure, make described alternative gate structure be converted to hydrophilic material by hydrophobic material.
2. the formation method of metal gates according to claim 1, it is characterized in that, described cmp comprises: adopt the first cmp to remove the described dielectric layer of part, and retains dielectric layer in described alternative gate body structure surface residue; Then described ion doping is carried out to described alternative gate structure; Adopt the second cmp, until dielectric layer surface flushes with alternative gate body structure surface.
3. the formation method of metal gates according to claim 2, it is characterized in that, described in the surface distance of described reservation dielectric layer, the thickness range of alternative gate structural top is
4. the formation method of metal gates according to claim 1, is characterized in that, after forming the dielectric layer covering described alternative gate structure, carries out described ion doping to described alternative gate structure; Then carry out dielectric layer described in cmp, dielectric layer surface is flushed with described alternative gate body structure surface.
5. the formation method of metal gates according to claim 2, it is characterized in that, the technological parameter of described ion doping comprises: ion doping energy range is 1Kev ~ 10Kev, and described ion concentration is 1E14 ~ 5E16atom/cm
2.
6. the formation method of metal gates according to claim 4, it is characterized in that, the technological parameter of described ion doping comprises: ion doping energy range is 10Kev ~ 200Kev, and described ion concentration is 1E15 ~ 5E17atom/cm
2.
7. the formation method of metal gates according to claim 2, it is characterized in that, described dielectric layer comprises first medium layer and is positioned at the second dielectric layer on described first medium layer surface.
8. the formation method of metal gates according to claim 7, it is characterized in that, described first medium layer is silicon nitride, and described second dielectric layer is silica.
9. the formation method of metal gates according to claim 7, is characterized in that, described first cmp with described first medium layer surface for polish stop layer.
10. the formation method of metal gates according to any one of claim 1 ~ 9, it is characterized in that, the ion of described ion doping is oxonium ion or fluorine ion.
11. according to any one of claim 1 ~ 9 the formation method of metal gates, it is characterized in that, the material of described dielectric layer is one of silica, silicon nitride or combination.
The formation method of 12. metal gates according to claim 1, is characterized in that, after carrying out ion doping, also comprise and carry out annealing process to described dielectric layer described dielectric layer.
13. according to the formation method of metal gates described in claim 12, it is characterized in that, described parameter and annealing comprises: anneal gas is the mist of nitrogen, nitrogen and oxygen or the mist of helium and oxygen, annealing region is 400 ~ 600 DEG C, annealing time scope 10 ~ 120s or annealing region are 700 ~ 1000 DEG C, and annealing time scope is 0.25 ~ 2ms.
14. according to the formation method of metal gates described in claim 12, it is characterized in that, described parameter and annealing comprises: anneal gas is inert gas, annealing region is 400 ~ 600 DEG C, annealing time scope 10 ~ 120s or annealing region are 700 ~ 1000 DEG C, and annealing time scope is 0.25 ~ 2ms.
15., according to the formation method of metal gates described in claim 1 ~ 9 and 12 ~ 14 any one, is characterized in that, to described dielectric layer carry out ion doping while carrying out ion doping to described alternative gate structure.
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