CN103066942B - Quick-start crystal oscillator circuit with ultra-low power consumption - Google Patents
Quick-start crystal oscillator circuit with ultra-low power consumption Download PDFInfo
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Abstract
The invention discloses a quick-start crystal oscillator circuit with ultra-low power consumption. The crystal oscillator circuit comprises a self-bias class AB amplifier, a signal amplitude detection circuit, a reference current generating circuit, a current mirror circuit, a quartz crystal resonance circuit and a digital logic control circuit. Passive quartz crystals are adopted in the crystal oscillator circuit, and the quick-start crystal oscillator circuit with the ultra-low power consumption is utilized for quickly starting an oscillator to generate square-wave or rectangular-wave clock signals. The output signals of the crystal oscillator circuit can provide accurate reference clocks for a digital circuit or a frequency synthesizer circuit.
Description
Technical field
The present invention relates to a kind of Quick-start crystal oscillator circuit with ultra-low power consumption, for the reference clock source of digital circuit or frequency synthesizer circuit, belong to technical field of integrated circuits.
Background technology
Reference clock source is the heart of digital circuit and frequency synthesizer circuit.In digital circuit, all logical circuits all work under the driving of clock, clock direct or frequency dividing circuit generation by reference to clock of digital circuit.Frequency synthesizer circuit is also clock generation circuit, is input as reference clock source, exports the clock signal into frequency-adjustable.Therefore, reference clock source plays vital effect to digital circuit and frequency synthesizer circuit.
Reference clock source is generally produced by crystal-oscillator circuit.Crystal-oscillator circuit utilizes quartz crystal and electric capacity to form resonant network, forms negative resistance oscillator by amplifier.Quartz crystal has piezoelectric effect, can convert the electrical signal to crystal vibration, otherwise the vibration of crystal can be transformed into the signal of telecommunication.The natural mode shape of quartz crystal and resonance frequency, quartz crystal has stable natural frequency, therefore the reference frequency of oscillator energy stable output.
Along with the development of technology of Internet of things and sensor network technology, adopting battery powered node to obtain applying more and more widely, be subject to the restriction of battery capacity, is exactly power consumption for the most important index of battery powered node chip.The size of chip power-consumption also determines the service time of battery.Special for sensor node, node requirements battery can work time several years, and the operating time of node chip is very short, and be generally fixed time apart sampling should be carried out data, the chip most of the time is all operated in standby mode.In stand-by mode, chip major part circuit is all in closed condition, in order to ensure chip energy timing wake-up, chip must have timer clock, and namely internal reference clock source is in running order, therefore, in stand-by mode, the power consumption of chip internal oscillator determines the stand-by power consumption of overall chip, and for the sensor node being in standby mode for the most of the time, the power consumption of internal oscillator also just determines the service time of battery.In a word, the design of super low-power consumption oscillator has become a significant challenge of low-power chip design.In addition, for radio communication, data communication time is generally very short, and in order to reduce the holding time of communication channel, General Requirements chip has short start-up time, therefore requires that oscillator can starting of oscillation work within the extremely short time.
As shown in Figure 1, pierce circuit is by inverter INV, and quartz crystal Crystal, electric capacity Cp1, Cp2, resistance R and output buffer form for traditional crystal oscillator circuit.Quartz crystal and electric capacity Cp1, Cp2 form resonant network, and the centre frequency of resonant network is the natural mode shape of quartz crystal, and inverter INV and resonant network form negative resistance oscillator, and resistance R is feedback resistance, can prevent quartz crystal blasting and damage.Output buffer provides enough output carrying load abilities for crystal oscillator.The power consumption of this oscillator and start-up time are determined by inverter INV and resistance R, and the driving force of inverter INV is stronger, and resistance R is larger, and the start-up time of oscillator is short, but power consumption is large.Otherwise resistance is less, oscillator power consumption is little, but oscillator may failure of oscillation.Therefore, traditional crystal oscillator can not solve simultaneously low-power consumption and start-up time short problem.
Summary of the invention
The present invention seeks to overcome prior art performance and structural limitation, propose a kind of Quick-start crystal oscillator circuit with ultra-low power consumption, circuit achieves quick startup by amplitude detection and Current Control, has the feature of low-power consumption simultaneously.The present invention may be used for the reference clock source of digital circuit or frequency synthesizer circuit.
The present invention adopts passive quartz crystal, by low-power consumption oscillator circuit fast start-up oscillator, produces square wave or rectangular wave clock signal.The output signal of this crystal-oscillator circuit provides accurate reference clock for digital circuit or frequency synthesizer circuit.
The present invention includes: the class ab ammplifier of automatic biasing, signal amplitude detection circuit, reference current generating circuit, current mirror circuit, Quartz crystal resonant circuit, Digital Logic control circuit, the input of described signal amplitude detection circuit connects the class ab ammplifier of automatic biasing, the output of signal amplitude detection circuit connects reference current generating circuit, the output of reference current generating circuit connects current mirror circuit, the output of current mirror circuit connects the class ab ammplifier of automatic biasing again, the two ends of Quartz crystal resonant circuit connect input and the output of the class ab ammplifier of automatic biasing, the class ab ammplifier output of automatic biasing connects the input of digital logic control circuit by output buffer, the control logic signal output part of Digital Logic control circuit connects reference current generating circuit respectively, current mirror circuit,
The DC point of the class ab ammplifier of described automatic biasing is biased by amplifier oneself, and the operating state of amplifier is AB class, and the gain of amplifier is determined by the electric current by itself;
The input exchange signal of automatic biasing class ab ammplifier is transformed into d. c. voltage signal by described signal amplitude detection circuit, and its output is transformed into direct current by reference current generating circuit;
Described current mirror circuit, provides direct current to the class ab ammplifier of automatic biasing after the mirror image of the direct current ratio produced by reference current generating circuit;
Described Quartz crystal resonant circuit, as frequency-selective network, forms negative resistance oscillator circuits with the class ab ammplifier of automatic biasing, produces the oscillator signal of fixed frequency, and the frequency of oscillation of circuit is determined by the natural frequency of quartz crystal itself;
Described Digital Logic control circuit, the class ab ammplifier according to automatic biasing outputs signal, and produces control logic signal, realizes the coarse regulation of electric current; When circuit just starts, Digital Logic control circuit controls current mirror circuit and produces large electric current, the class ab ammplifier of automatic biasing has large voltage gain, negative resistance oscillator circuits can start fast, after negative resistance oscillator circuits starts, the coarse regulation of Digital Logic control circuit close current, under the class ab ammplifier of automatic biasing is operated in little operating current condition, thus realizes low-power consumption vibration.
Concrete, the class ab ammplifier structure of described automatic biasing comprises: the drain electrode of the 0th NMOS tube is connected with the drain electrode of the first PMOS, is the output of the class ab ammplifier of automatic biasing; The grid of the 0th NMOS tube is connected with the grid of the first PMOS, is the input of the class ab ammplifier of automatic biasing, connects the first resistance, provide self-bias voltage between the output of class ab ammplifier and input; First electric capacity is ac filter electric capacity, and the first electric capacity negative terminal connects the source electrode of the 0th NMOS tube, and the first electric capacity anode connects the source electrode of the first PMOS, and the 0th NMOS tube source electrode connects the output of current mirror circuit, the 0th NMOS tube source ground; The voltage amplification gain of the class ab ammplifier of whole automatic biasing is by the Current Control flowing through the first PMOS source electrode, the output of the class ab ammplifier of automatic biasing connects output buffer, and the sine wave signal that the class ab ammplifier of automatic biasing exports is become square wave or square-wave signal by output buffer.
Described signal amplitude detection circuit structure comprises: the 7th NMOS tube is amplitude detection pipe, 7th NMOS tube grid connects the input of the class ab ammplifier of automatic biasing by the second electric capacity, 7th NMOS tube drain electrode connects current source and the 3rd resistance one end, between the drain electrode that second resistance is connected to the 7th NMOS tube and grid, DC offset voltage is provided to the 7th NMOS tube, the 3rd resistance other end connects the input of the 3rd capacitance cathode and reference current generating circuit, 3rd electric capacity minus earth, 3rd resistance and the 3rd electric capacity form low pass filter, the AC signal that filtering the 7th NMOS tube exports, second electric capacity one end connects the input of the class ab ammplifier of automatic biasing, and the other end connects the grid of the 7th NMOS tube, plays AC signal coupling, current source is connected to power supply, provides DC power supply to signal amplitude detection circuit.
Described reference current generating circuit structure comprises: the output of the positive input termination signal amplitude detection circuit of operational amplifier, operational amplifier output terminal connects the 4th NMOS tube grid, negative input termination the 4th NMOS tube source electrode of operational amplifier, the source electrode of the 4th resistance one termination the 4th NMOS tube, one end of another termination the 5th resistance, the other end of one termination the 5th resistance of the 6th resistance, the 6th resistance other end ground connection; One end of the drain electrode of the 5th NMOS tube and source electrode difference connecting resistance R5 and the other end, the drain electrode of the 6th NMOS tube and source electrode connect one end and the other end of the 6th resistance respectively, and the 5th NMOS tube grid and the 6th NMOS tube grid are connected respectively to two signal output parts of Digital Logic control circuit; Operational amplifier and the 4th NMOS tube form negative feedback, ensure that the voltage of the 3rd electric capacity is equal with the voltage of the 4th resistance, the voltage of the 3rd electric capacity is reference current divided by total resistance of the 4th resistance, the 5th resistance and the 6th resistance, and reference current is exported by the drain electrode of the 4th NMOS tube.
Described current mirror circuit structure comprises: the 3rd PMOS source electrode connects power supply, and grid and drain electrode link together, and the source electrode of the second PMOS connects power supply, and the second PMOS grid and the 3rd PMOS grid link together, and is the input of current mirror circuit; 8th PMOS source electrode connects power supply, and the 8th PMOS drain electrode drains with the second PMOS and is connected, and be the output of current mirror circuit, the 8th PMOS grid connects a signal output part of Digital Logic control circuit; The electric current of the second PMOS and the current in proportion mirror of the 3rd PMOS.
Described Quartz crystal resonant circuit structure comprises: one end of the 4th electric capacity and the 5th electric capacity connects the two ends of quartz crystal respectively, the 4th electric capacity and the 5th electric capacity other end ground connection respectively; Quartz crystal and the 4th electric capacity, the 5th electric capacity form resonant network, determine the resonance frequency of pierce circuit; Together with the input of the two ends of quartz crystal and the class ab ammplifier of automatic biasing is connected to output.
Described Digital Logic control circuit adopts digital gate circuit to realize.
Amplitude and the output dc voltage of described signal amplitude detection circuit input ac voltage are inversely proportional to, and input ac voltage amplitude is larger, and output dc voltage is lower.
Described reference current generating circuit input direct voltage is directly proportional to output direct current, and input direct voltage is higher, exports direct current larger.
The input of described current mirror circuit and output end signal are all direct currents, and output becomes fixed proportion with input direct current.
Advantage of the present invention is: the crystal oscillator consisted of class ab ammplifier and the resonant tank of the automatic biasing of controlled current flow, there is the advantage meeting simultaneously and start fast and vibrate and keep low-power consumption after vibration, may be used for requirement to start fast, reference clock source in low power consumption integrated circuit.
Accompanying drawing explanation
Fig. 1 is conventional crystal oscillating circuit schematic diagram.
Fig. 2 is circuit structure diagram of the present invention.
Fig. 3 is the output waveform of Digital Logic control circuit.
Embodiment
The present invention proposes a kind of Quick-start crystal oscillator circuit with ultra-low power consumption, for requiring quick startup, reference clock source in low power consumption integrated circuit, circuit adopts standard CMOS process to realize.
Below in conjunction with specific embodiment, the present invention is described further.
Quick-start crystal oscillator circuit with ultra-low power consumption of the present invention comprises: the class ab ammplifier 21 of automatic biasing, signal amplitude detection circuit 22, reference current generating circuit 23, current mirror circuit 24, Quartz crystal resonant circuit 25, Digital Logic control circuit 26, the input of described signal amplitude detection circuit 22 connects the class ab ammplifier 21 of automatic biasing, the output of signal amplitude detection circuit 22 connects reference current generating circuit 23, the output of reference current generating circuit 23 connects current mirror circuit 24, the output of current mirror circuit 24 connects digital logic control circuit 26 again, the two ends of Quartz crystal resonant circuit 25 connect input and the output of the class ab ammplifier 21 of automatic biasing, and class ab ammplifier 21 input of automatic biasing connects the input of digital logic control circuit 26 by output buffer, the control logic signal output part of Digital Logic control circuit 26 connects reference current generating circuit 23 respectively, current mirror circuit 24.
As shown in Figure 2, class ab ammplifier 21 structure of described automatic biasing comprises: the drain electrode of the 0th NMOS tube M0 is connected with the drain electrode of the first PMOS M1, is the output of the class ab ammplifier 21 of automatic biasing; The grid of the 0th NMOS tube M0 is connected with the grid of the first PMOS M1, is the input of the class ab ammplifier 21 of automatic biasing, connects the first resistance R1, provide self-bias voltage between the output of class ab ammplifier 21 and input; First electric capacity C1 is ac filter electric capacity, first electric capacity C1 negative terminal connects the source electrode of the 0th NMOS tube M0, first electric capacity C1 anode connects the source electrode of the first PMOS M1, and the 0th NMOS tube M0 source electrode connects the output of current mirror circuit 24, the 0th NMOS tube M0 source ground; The voltage amplification gain of the class ab ammplifier 21 of whole automatic biasing is by the Current Control flowing through the first PMOS M1 source electrode, the output of the class ab ammplifier 21 of automatic biasing connects output buffer BUF, and the sine wave signal that the class ab ammplifier 21 of automatic biasing exports is become square wave or square-wave signal by output buffer BUF.
The AB class of automatic biasing is put greatly device 21 and is formed basic pierce circuit with Quartz crystal resonant circuit 25, and Quartz crystal resonant circuit 25 has frequency-selecting and phase shift effect.Quartz crystal Crystal and electric capacity CP1, CP2 form resonant network.Quartz crystal Crystal has the value of very high Q, the frequency selectivity had and stability.The natural frequency of quartz crystal oscillator is the frequency of oscillation of oscillator.
The class ab ammplifier 21 of automatic biasing has voltage amplification function, negative resistance oscillator is formed with Quartz crystal resonant circuit 25, the size of negative resistance is determined by the voltage amplification gain of the class ab ammplifier 21 of automatic biasing, voltage amplification gain is larger, negative resistance is also larger, when negative resistance is greater than the internal loss of Quartz crystal resonant circuit 25, the frequency of oscillation of oscillator stable output.The DC point of the class ab ammplifier 21 of automatic biasing is biased by amplifier oneself, and the operating state of amplifier is AB class, and the gain of amplifier is determined by the electric current by itself.The drain electrode of NMOS tube M0 is connected with the drain electrode of PMOS M1, for the output of the class ab ammplifier 21 of automatic biasing, the grid of NMOS tube M0 is connected with the grid of PMOS M1, is the input of the class ab ammplifier 21 of automatic biasing, connect input by resistance R1 between output, self-bias voltage is provided.Electric capacity C1 is ac filter electric capacity, and for AC signal, the anode of C1 is equivalent to ground connection.The voltage amplification gain of overall amplifier is by the Current Control flowing through M1 source electrode.When the electric current flowing through amplifier is large, the start-up time of oscillator is short, and output voltage amplitude is large, and meanwhile, the power consumption of oscillator is large.Otherwise if the electric current of amplifier is little, output voltage amplitude is little, and oscillator power consumption is little, but may stop oscillation.The sine wave signal that amplifier exports is become square wave or square-wave signal by output buffer BUF.
Described signal amplitude detection circuit 22 structure comprises: the 7th NMOS tube M7 is amplitude detection pipe, 7th NMOS tube M7 grid connects the input of the class ab ammplifier 21 of automatic biasing by the second electric capacity C2, 7th NMOS tube M7 drain electrode connects current source IB and the 3rd resistance R3 one end, between the drain electrode that second resistance R2 is connected to the 7th NMOS tube M7 and grid, DC offset voltage is provided to the 7th NMOS tube M7, the 3rd resistance R3 other end connects the input of the 3rd electric capacity C3 positive pole and reference current generating circuit 23, 3rd electric capacity C3 minus earth, 3rd resistance R3 and the 3rd electric capacity C3 forms low pass filter, the AC signal that filtering the 7th NMOS tube M7 exports, second electric capacity C2 one end connects the input of the class ab ammplifier 21 of automatic biasing, and the other end connects the grid of the 7th NMOS tube M7, plays AC signal coupling, current source IB is connected to power supply, provides DC power supply to signal amplitude detection circuit 22.
The input exchange signal of automatic biasing class ab ammplifier 22, for detecting the amplitude of oscillator, is transformed into DC level by signal amplitude detection circuit 22, the inversely proportional relation of oscillation amplitude of the direct current that signal amplitude detection circuit 22 exports and oscillator.When the oscillation amplitude that oscillator exports is large, the DC level that signal amplitude detection circuit 22 exports is low, and the oscillation amplitude exported when oscillator is little, and the DC level that signal amplitude detection circuit 22 exports is high.
The direct voltage that signal amplitude detection circuit 22 exports is become direct current by electric resistance changing by reference current generating circuit 23, described reference current generating circuit 23 structure comprises: the output of the positive input termination signal amplitude detection circuit 22 of operational amplifier OPA, operational amplifier OPA exports termination the 4th NMOS tube M4 grid, negative input termination the 4th NMOS tube M4 source electrode of operational amplifier OPA, the source electrode of the 4th resistance R4 mono-termination the 4th NMOS tube M4, one end of another termination the 5th resistance R5, the other end of one termination the 5th resistance R5 of the 6th resistance R6, 6th resistance R6 other end ground connection, one end of the drain electrode of the 5th NMOS tube M5 and source electrode difference connecting resistance R5 and the other end, the drain electrode of the 6th NMOS tube M6 and source electrode connect one end and the other end of the 6th resistance R6 respectively, and the 5th NMOS tube M5 grid and the 6th NMOS tube M6 grid are connected respectively to B, C output of Digital Logic control circuit 26, operational amplifier OPA and the 4th NMOS tube M4 forms negative feedback, ensure that the voltage of the 3rd electric capacity C3 is equal with the voltage of the 4th resistance R4, the voltage of the 3rd electric capacity C3 is reference current divided by total resistance of the 4th resistance R4, the 5th resistance R5 and the 6th resistance R6, and reference current is exported by the drain electrode of the 4th NMOS tube M4.
Current mirror circuit 24, provides direct current to after the mirror image of the direct current ratio produced by reference current generating circuit 23 class ab ammplifier 21 of automatic biasing.Described current mirror circuit 24 structure comprises: the 3rd PMOS M3 source electrode connects power supply, grid and drain electrode link together, the source electrode of the second PMOS M2 connects power supply, and the second PMOS M2 grid and the 3rd PMOS M3 grid link together, and is the input of current mirror circuit 24; 8th PMOS M8 source electrode connects power supply, and the 8th PMOS M8 drain electrode drains with the second PMOS M2 and is connected, and be the output of current mirror circuit 24, the 8th PMOS M8 grid connects the A output of Digital Logic control circuit 26; The electric current of the second PMOS M2 and the current in proportion mirror of the 3rd PMOS M3.
Described Quartz crystal resonant circuit 23 structure comprises: one end of the 4th electric capacity CP1 and the 5th electric capacity CP2 connects the two ends of quartz crystal Crystal respectively, the 4th electric capacity CP1 and the 5th electric capacity CP2 other end ground connection respectively; Quartz crystal Crystal and the 4th electric capacity CP1, the 5th electric capacity CP2 form resonant network, determine the resonance frequency of pierce circuit; Together with the input of the two ends of quartz crystal Crystal and the class ab ammplifier 21 of automatic biasing is connected to output.
The class ab ammplifier 21 of automatic biasing outputs signal, and becomes after square wave or square-wave signal through output buffer BUF, as the clock signal of Digital Logic control circuit 26, produces control logic, realizes the coarse regulation of electric current.
When circuit just starts, oscillator does not work, Digital Logic control circuit 26 does not have clock signal, output terminals A, B, C are low level, PMOS M8 conducting in current mirror circuit 24, class ab ammplifier 21 circuital current of automatic biasing is maximum, and amplifier produces large negative resistance value, and oscillator starts vibration fast; After circuit starts vibration, Digital Logic control circuit 26 output C holds and exports high level, and in current mirror circuit 24, PMOS M8 closes, and class ab ammplifier 21 circuital current of automatic biasing is determined by the electric current of NMOS tube M2 in current mirror circuit 24.Digital Logic control circuit 26 output B, C end exports high level successively, control NMOS tube M5 and the M6 conducting of reference current generating circuit 23, therefore, under same oscillation amplitude condition, reference circuit produces larger reference current, is fed back to the class ab ammplifier 21 of automatic biasing by current mirror circuit 24.On the one hand, the electric current that oscillator output voltage and current mirror circuit 24 feed back is inversely prroportional relationship, and its characteristic is slope is negative curve; On the other hand, class ab ammplifier 21 direct proportionality of oscillator output voltage amplitude and automatic biasing, its characteristic is slope is positive curve, and the intersection point of two curves is the point of safes of oscillator.The output voltage amplitude of oscillator can be adjusted by adjustment reference circuit electric current.When after circuit starting of oscillation, after reference current generating circuit 23NMOS pipe M5 and M6 conducting, the all-in resistance after resistance R4, R5, R6 series connection and R4, the output voltage amplitude of oscillator stabilization point diminishes, and therefore has low power consumption.
In biased class ab ammplifier 21, M1 and M0 adopts NMOS and PMOS in standard CMOS process, and C1 adopts mos capacitance or MIM capacitor.R1 adopts POLY resistance in CMOS technology.Exporting buffering BUF adopts cmos circuit Plays digital units to realize.Electric capacity C1 is ac filter electric capacity, and for AC signal, the anode of C1 is equivalent to ground connection.
In signal amplitude detection circuit 22, M7 is NMOS tube in standard CMOS process, and R2 and R3 is POLY resistance, and C2 and C1 adopts mos capacitance.
In reference current generating circuit 23, operational amplifier OPA adopts double-width grinding, Single-end output, and M4, M5, M6 are NMOS tube in standard CMOS process, and R4, R5, R6 adopt POLY resistance in CMOS technology.
Current mirror circuit 24 is by the PMOS M2 adopted in standard CMOS process, and M3, M8 form.
Quartz crystal resonant circuit 25 is by the outer quartz crystal Crystal of sheet, and electric capacity CP1, CP2 form, and these three devices can not be integrated in CMOS integrated circuit, and quartz crystal adopts encapsulation separately, and CP1 and CP2 is the outer ceramic condenser of sheet.
Digital Logic control circuit 26 adopts CMOS technology Plays digital units to realize, and its input only has a clock signal clk, and class ab ammplifier 21 output of input termination automatic biasing, it has three output terminals A, B, C.A exports the grid of M8 in termination reference current generating circuit 23.B end holds with C the grid meeting M5 and M6 in reference current generating circuit 23 respectively.As shown in Figure 3, before CLK clock arrives, A, B, C tri-outputs are all low level to the work schedule of Digital Logic control circuit, and after pierce circuit starts vibration, A, B, C export high level successively, control the operating current of oscillator.
Claims (10)
1. a Quick-start crystal oscillator circuit with ultra-low power consumption, it is characterized in that: the class ab ammplifier (21) comprising automatic biasing, signal amplitude detection circuit (22), reference current generating circuit (23), current mirror circuit (24), Quartz crystal resonant circuit (25), Digital Logic control circuit (26), the input of described signal amplitude detection circuit (22) connects the class ab ammplifier (21) of automatic biasing, the output of signal amplitude detection circuit (22) connects reference current generating circuit (23), the output of reference current generating circuit (23) connects current mirror circuit (24), the output of current mirror circuit (24) connects the class ab ammplifier (21) of automatic biasing again, the two ends of Quartz crystal resonant circuit (25) connect input and the output of the class ab ammplifier (21) of automatic biasing, class ab ammplifier (21) output of automatic biasing connects the input of digital logic control circuit (26) by output buffer, the control logic signal output part of Digital Logic control circuit (26) connects reference current generating circuit (23) respectively, current mirror circuit (24),
The DC point of the class ab ammplifier (21) of described automatic biasing is biased by amplifier oneself, and the operating state of amplifier is AB class, and the gain of amplifier is determined by the electric current by itself;
The input exchange signal of automatic biasing class ab ammplifier (22) is transformed into d. c. voltage signal by described signal amplitude detection circuit (22), and its output is transformed into direct current by reference current generating circuit (23);
Described current mirror circuit (24), provides direct current to after the mirror image of the direct current ratio produced by reference current generating circuit (23) class ab ammplifier (21) of automatic biasing;
Described Quartz crystal resonant circuit (25), as frequency-selective network, forms negative resistance oscillator circuits with the class ab ammplifier (21) of automatic biasing, produces the oscillator signal of fixed frequency, and the frequency of oscillation of circuit is determined by the natural frequency of quartz crystal itself;
Described Digital Logic control circuit (26), the class ab ammplifier (21) according to automatic biasing outputs signal, and produces control logic signal, realizes the coarse regulation of electric current; When circuit just starts, Digital Logic control circuit (26) controls current mirror circuit (24) and produces large electric current, the class ab ammplifier (21) of automatic biasing has large voltage gain, negative resistance oscillator circuits can start fast, after negative resistance oscillator circuits starts, Digital Logic control circuit (26) close current coarse regulation, under the class ab ammplifier (21) of automatic biasing is operated in little operating current condition, thus realizes low-power consumption vibration.
2. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 1, it is characterized in that, class ab ammplifier (21) structure of described automatic biasing comprises: the drain electrode of the 0th NMOS tube (M0) is connected with the drain electrode of the first PMOS (M1), is the output of the class ab ammplifier (21) of automatic biasing; The grid of the 0th NMOS tube (M0) is connected with the grid of the first PMOS (M1), is the input of the class ab ammplifier (21) of automatic biasing, connects the first resistance (R1), provide self-bias voltage between the output of class ab ammplifier (21) and input; First electric capacity (C1) is ac filter electric capacity, first electric capacity (C1) negative terminal connects the source electrode of the 0th NMOS tube (M0), first electric capacity (C1) anode connects the source electrode of the first PMOS (M1), 0th NMOS tube (M0) source electrode connects the output of current mirror circuit (24), the 0th NMOS tube (M0) source ground; The voltage amplification gain of the class ab ammplifier (21) of whole automatic biasing is by the Current Control flowing through the first PMOS (M1) source electrode, the output of the class ab ammplifier (21) of automatic biasing connects output buffer (BUF), and the sine wave signal that the class ab ammplifier (21) of automatic biasing exports is become square wave or square-wave signal by output buffer (BUF).
3. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 1, it is characterized in that, described signal amplitude detection circuit (22) structure comprises: the 7th NMOS tube (M7) is amplitude detection pipe, 7th NMOS tube (M7) grid connects the input of the class ab ammplifier (21) of automatic biasing by the second electric capacity (C2), 7th NMOS tube (M7) drain electrode connects current source (IB) and the 3rd resistance (R3) one end, between the drain electrode that second resistance (R2) is connected to the 7th NMOS tube (M7) and grid, DC offset voltage is provided to the 7th NMOS tube (M7), 3rd resistance (R3) other end connects the input of the 3rd electric capacity (C3) positive pole and reference current generating circuit (23), 3rd electric capacity (C3) minus earth, 3rd resistance (R3) and the 3rd electric capacity (C3) form low pass filter, the AC signal that filtering the 7th NMOS tube (M7) exports, second electric capacity (C2) one end connects the input of the class ab ammplifier (21) of automatic biasing, and the other end connects the grid of the 7th NMOS tube (M7), plays AC signal coupling, current source (IB) is connected to power supply, provides DC power supply to signal amplitude detection circuit (22).
4. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 3, it is characterized in that, described reference current generating circuit (23) structure comprises: the output of positive input termination signal amplitude detection circuit (22) of operational amplifier (OPA), operational amplifier (OPA) exports termination the 4th NMOS tube (M4) grid, negative input termination the 4th NMOS tube (M4) source electrode of operational amplifier (OPA), the source electrode of the 4th resistance (R4) one termination the 4th NMOS tube (M4), one end of another termination the 5th resistance (R5), the other end of one termination the 5th resistance (R5) of the 6th resistance (R6), 6th resistance (R6) other end ground connection, one end of the drain electrode of the 5th NMOS tube (M5) and source electrode difference connecting resistance R5 and the other end, the drain electrode of the 6th NMOS tube (M6) and source electrode connect one end and the other end of the 6th resistance (R6) respectively, and the 5th NMOS tube (M5) grid and the 6th NMOS tube (M6) grid are connected respectively to two signal output parts of Digital Logic control circuit (26), operational amplifier (OPA) and the 4th NMOS tube (M4) form negative feedback, ensure that the voltage of the 3rd electric capacity (C3) is equal with the voltage of the 4th resistance (R4), the voltage of the 3rd electric capacity (C3) is reference current divided by total resistance of the 4th resistance (R4), the 5th resistance (R5) and the 6th resistance (R6), and reference current is exported by the drain electrode of the 4th NMOS tube (M4).
5. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 1, it is characterized in that, described current mirror circuit (24) structure comprises: the 3rd PMOS (M3) source electrode connects power supply, grid and drain electrode link together, the source electrode of the second PMOS (M2) connects power supply, second PMOS (M2) grid and the 3rd PMOS (M3) grid link together, and are the input of current mirror circuit (24); 8th PMOS (M8) source electrode connects power supply, 8th PMOS (M8) drain electrode drains with the second PMOS (M2) and is connected, for the output of current mirror circuit (24), the 8th PMOS (M8) grid connects a signal output part of Digital Logic control circuit (26); The electric current of the second PMOS (M2) and the current in proportion mirror of the 3rd PMOS (M3).
6. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 1, it is characterized in that, described Quartz crystal resonant circuit (25) comprising: the 4th electric capacity (CP1) connects the two ends of quartz crystal (Crystal) respectively with one end of the 5th electric capacity (CP2), the 4th electric capacity (CP1) and the 5th electric capacity (CP2) other end ground connection respectively; Quartz crystal (Crystal) and the 4th electric capacity (CP1), the 5th electric capacity (CP2) form resonant network, determine the resonance frequency of pierce circuit; Together with the input of the two ends of quartz crystal (Crystal) and the class ab ammplifier (21) of automatic biasing is connected to output.
7. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 1, is characterized in that, described Digital Logic control circuit (26) adopts digital gate circuit to realize.
8. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 3, it is characterized in that, amplitude and the output dc voltage of described signal amplitude detection circuit (22) input ac voltage are inversely proportional to, and input ac voltage amplitude is larger, and output dc voltage is lower.
9. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 4, is characterized in that, described reference current generating circuit (23) input direct voltage is directly proportional to output direct current, and input direct voltage is higher, exports direct current larger.
10. Quick-start crystal oscillator circuit with ultra-low power consumption according to claim 5, is characterized in that, the input of described current mirror circuit (24) and output end signal are all direct currents, and output becomes fixed proportion with input direct current.
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