CN103116379A - Self-calibrating current source system - Google Patents

Abstract

The invention provides a self-calibration current source system, which comprises a current source and further comprises: a self-calibration resistor array disposed in association with the internal resistor array of the current source; a comparator that compares a voltage of the self-calibration resistor array with a voltage of an output terminal resistor of the chip; and the control module receives the comparison result of the comparator and accordingly outputs a control signal to control the self-calibration resistor array and the internal resistor array associated with the self-calibration resistor array. The self-calibration current source system can automatically adjust to enable the resistance of the internal resistor array to be equivalent to that of the output terminal resistor.

Description

Self-calibrating current source system

technical field

The present invention relates to the technology related to the current source, and more specifically, relates to the related design of the reference resistance of the current source.

Background technique

The development of the integrated circuit industry satisfies Moore's Law, that is, the process size decreases at a rate of 30% per generation, the density of integrated circuits increases at a rate of 2 times, and the steady growth of transistor performance is guaranteed. However, shrinking process dimensions have brought greater process fluctuations, which are mainly due to the manufacturing process.

FIG. 1 is a conventional high-precision current source, which is used, for example, in a low-voltage differential signal digital output analog-to-digital conversion (ADC) chip. In the conventional current source shown, V _GB is the output voltage of the internal bandgap circuit of the ADC chip, and R _external 12 is a high-precision resistor, which sets the external of the current source as a reference resistor. In practical applications, not all cases allow setting the external resistor R _external 12 outside the pin of the chip. If R _external 12 cannot be set, the external resistance R _external 12 has to be replaced by the internal resistance of the chip, which causes the output Iout of the current source to be extremely sensitive to process, voltage and temperature (PVT: Process, Voltage, Temperature).

Therefore, for a current source involving a CMOS process, without an external reference resistor, its characteristics will fluctuate with changes in process, temperature, and voltage. In some cases, the analog core modules of high-speed, high-precision analog-to-digital converters that use this current source, such as sample-and-hold circuits, will face serious performance degradation.

Contents of the invention

In view of this, the present invention provides a self-calibration current source system, which can be applied in low-voltage differential signal digital output analog-to-digital conversion chips. The self-calibration current source system includes a current source, and also includes: a self-calibration resistor array, which is connected to The internal resistance array of the current source is set in an associated manner; the comparator compares the voltage of the self-calibration resistance array with the voltage of the output terminal resistance of the chip; the control module receives the comparison result of the comparator , whereby a control signal is output to control the self-calibrating resistor array and the internal resistor array associated with the self-calibrating resistor array.

Preferably, in the self-calibrating current source system of the present invention, the unit resistances in the self-calibration resistance array correspond to the unit resistances in the internal resistance array one-to-one.

Preferably, in the self-calibrating current source system of the present invention, the resistance value of each unit resistor in the internal resistor array is k times the resistance value of the corresponding unit resistor in the self-calibrating resistor array.

Preferably, the self-calibrating current source system of the present invention further includes a first switching device group, which is arranged between the internal resistance array and the control module, and is turned on or off according to the control signal; and a second A switch device group is arranged between the self-calibration resistor array and the control module, and is turned on or off according to the control signal.

Preferably, in the self-calibrating current source system of the present invention, each switching device in the first switching device group is respectively arranged between a unit resistance of the internal resistance array and the control module, and the second Each switching device in the two switching device groups is respectively arranged between a unit resistor of the self-calibrating resistance array and the control module, so that the switching devices in the first switching device group correspond to the switching devices in the second switching device.

Preferably, in the calibration current source system of the present invention, the control signal to each switching device in the first switching device group is the same as the control signal to the switching device corresponding to the switching device in the second switching device group .

Preferably, in the calibration current source system of the present invention, the control module is composed of an up-down counter and control logic.

Preferably, in the calibration current source system of the present invention, the comparator is a double differential clock latch comparator.

In the current source system of the present invention, the existing standard port, that is, the output terminal resistance, is used as a reference resistance, and its voltage is compared with the voltage value of the self-calibrating resistance array of the internal resistance array associated with the current source. , so as to adjust the internal resistance of the current source through the comparison result, thereby controlling and maintaining a current source system that is insensitive to PVT without additionally setting an external resistance at the chip port. the

Description of drawings

Figure 1 is a conventional high-precision current source.

FIG. 2 is a schematic structural diagram of a self-calibrating current source system according to an embodiment of the present invention.

FIG. 3 is a schematic circuit diagram of a specific example of the self-calibrating current source system shown in FIG. 2 .

Detailed ways

Now further illustrate the present invention in conjunction with accompanying drawing. Those skilled in the art can understand that the following is a non-restrictive description of the gist of the present invention in conjunction with specific embodiments, the scope of the present invention is determined by the appended claims, and any modifications and changes that do not depart from the spirit of the present invention should be covered by the claims of the present invention.

The focus of the present invention is to use the existing output terminal resistance of the chip as a reference resistance, and set a self-calibration resistance array inside the current source, so that the internal total resistance of the current source gradually approaches the reference resistance. the

FIG. 2 is a schematic structural diagram of a self-calibrating current source system according to an embodiment of the present invention. As an example, this article uses the application of the current source system in a low-voltage differential signal (LVDS) digital output analog-to-digital conversion (ADC) chip for illustration, but not limited thereto. For the sake of brevity, the "low voltage differential signal (LVDS) digital output analog-to-digital conversion (ADC) chip" is referred to as the LVDS ADC chip below.

As shown in FIG. 2 , a self-calibrating current source system 20 applied to an LVDS ADC chip includes a basic structure of a current source, a self-calibrating resistor array 201 , a voltage comparator 204 and a control module 206 . The basic structure of the current source is basically the same as that of the conventional current source, and it is not the focus of the present invention, so it will not be further described here. The self-calibrating resistor array 201 is associated with the internal resistor array 202 of the current source, so that the control effect of the control module 206 on the self-calibrating resistor array 201 can act on the internal resistor array 202 in association. The voltage 201V of the self-calibration circuit array 201 and the voltage 203V of the output terminal resistor 203 of the LVDS ADC chip are fed to the voltage comparator 204 . The voltage comparator 204 compares the voltages 202V and 203V, and transmits the comparison result to the control module 206 . The control module 206 controls the self-calibration resistance array according to the comparison result, and simultaneously controls the internal resistance array 202 associated with the self-calibration resistance array 201, so that the total resistance value of the internal resistance array gradually approaches the output terminal resistance 203 of the LVDS ADC chip. resistance.

As an example, the control module 206 is electrically connected to the internal resistor array 202 through the first switching device group 501 , and is electrically connected to the self-calibrating resistor array 201 through the second switching device group 502 . Both the first switching device group 501 and the second switching device group 502 receive a control signal from the control module 206 and are turned on or off according to the signal. According to an example of the present invention, the self-calibration resistance array 201 is set in a manner corresponding to the internal resistance array 202, and the corresponding manner makes the control module control any unit resistance in the self-calibration resistance array to control the internal resistance array in the same way. Unit resistance corresponds to the unit resistance. The unit resistance in the self-calibrating resistance array 201 may be one resistance, or a unit formed by connecting multiple resistances in parallel or in series. In the examples herein, the unit resistor is the array of units that make up the resistor array.

FIG. 3 is a schematic circuit diagram of a specific example of the self-calibrating current source system shown in FIG. 2 . In this example, the voltage comparator 204 is implemented as a double differential clocked latch comparator 304, and the control module 206 is composed of an up-down counter and control logic. As shown in the figure, the internal resistor array 202 includes resistors kR1, kR2, kR3, kR4 and kR5 connected in parallel, and the resistors kR2, kR3, kR4 and kR5 are electrically connected to the control module 206 through the first switching device group 501, for example, the resistor kR2 , kR3 , kR4 and kR5 are electrically connected to the control module 206 through first switching devices 5012 , 5013 , 5014 and 5015 such as PMOS transistors, respectively. The self-calibrating resistor array 201 is implemented in this example in the following manner: it is arranged at the ground terminal of the basic structure of the current source in a manner corresponding to the internal resistor array 202, comprising five parallel unit resistors, successively calibration resistors R1, R2, R3, R4 and R5; the resistance value of the resistance kR1 of the internal resistance array 202 is k times of the resistance R1 of the self-calibration resistance array 201, the resistance value of the resistance kR2 is k times of the resistance R2 of the self-calibration resistance array 201, and so on, The resistance kR3 is k times of R3, the resistance kR4 is k times of R4, and the resistance kR5 is k times of R5. The resistors R2, R3, R4 and R5 in the self-calibrating resistor array 201 are electrically connected to the control module 206 through the second switching device group 502. For example, the resistors R2, R3, R4 and R5 in the self-calibrating resistor array 201 are respectively connected through For example, the second switching devices 5022 , 5023 , 5024 and 50255 , which are PMOS transistors, are electrically connected to the control module 206 . The switching device 5012 of the first switching device group 501 and the switching device 5022 of the second switching device group 502 are electrically connected to the first control terminal 00 of the control module 206, and the switching device 5013 of the first switching device group 501 and the second switch The switching devices 5023 of the device group 502 are electrically connected to the second control terminal 01 of the control module 206, and the switching devices 5014 of the first switching device group 501 and the switching devices 5024 of the second switching device group 502 are electrically connected to the control module. The third control terminal 02 of 206, the switching device 5015 of the first switching device group 501 and the switching device 5025 of the second switching device group 502 are electrically connected to the third control terminal 03 of the control module 206, so that the control module 206 can Both the self-calibrating resistor array 201 and the internal resistor array 202 are controlled simultaneously. In this example, resistors kR1, kR2, kR3, kR4, and kR5 are the unit resistors that make up the internal resistor array, and resistors R2, R3, R4, and R5 are the unit resistors that make up the self-calibrating resistor array.

The voltage of the self-calibrating resistor array 201 is I ₀ × _RT , where I ₀ is the LVDS DC output driving current, and R _T is the total resistance of the self-calibrating resistor array 201 . The external output terminal resistor 203 of the LVDS ADC chip is R _L , and its voltage is I ₀ × _RL , where I ₀ is the LVDS DC output driving current, and R _L is the resistance value of the terminal resistor 203 . The voltage 201V of the self-calibration resistor array 201 and the voltage 203V of the termination resistor 203 are fed to the double differential clock latch comparator 304 . The comparison result of the double differential clock latch comparator 304 is fed to the control module 206 .

By way of example but not limitation, after the current source system is powered on, in the initial clock cycle, when the clock is 0, the output of the double differential clock latch comparator 304 is Q and maintains its state; when clock=1, the double differential The clock latch comparator 304 compares the voltage 201V of the self-calibration resistor array 201 and the voltage 203V of the termination resistor 203 , and feeds the comparison result Q to the control module 206 . When Q=1 includes two continuous clock cycles, the counter in the control module 206 adds 1; when Q=0 keeps two continuous clock cycles, the counter decreases by 1; When the clock cycle Q=0, the output terminals 00, 01, 02 and 03 of the control module 206 remain unchanged. In case the internal logic circuit of the control module 206 finds that the output terminals 00, 01, 02 and 03 remain unchanged, it flags a control signal to lock the state of the switch and disable the self-calibrating resistor array 201 to save power.

Under the control of the output terminals 00, 01, 02 and 03 of the control module 206, for example, each switching device of a PMOS switch is turned on, and the total resistance value formed by the internal resistance arrays kR1, kR2, kR3, kR4 and kR5 gradually approaches the external Resistor R _L . In the present invention, the higher the comparison accuracy of the resistor _RT and the resistor _RL , that is, the higher the accuracy of the double differential clock latch comparator 304, the more the number of resistors in the resistor array and the more output terminals of the control module 206.

As mentioned above, due to the association between the self-calibration resistor array and the internal resistor array, the comparison result of the self-calibration resistor array and the terminal resistor _RL can be applied to the internal resistor array through the control module 206 . While the internal resistance array is being adjusted, the self-calibration loop is simultaneously affected by the control module 206, and the controlled self-calibration loop will be further compared with the terminal resistance _RL , thereby adjusting the internal resistance array according to the comparison result until The resistance value of the internal resistance array is equivalent to the terminal resistance _RL .

Although the present invention has been described in conjunction with specific examples, those skilled in the art can understand that the components in the examples are not limited to the components described here, as long as the corresponding functions can be achieved. For example, the first switching device group and the second switching device group may use other devices capable of achieving on-off functions.

Claims (8)

1. A self-calibrating current source system, comprising a current source, is characterized in that, the self-calibrating current source system also includes: a self-calibrating resistor array arranged in association with an internal resistor array of said current source; a comparator that compares the voltage of the self-calibrating resistor array to the voltage of the chip's output termination resistors; and The control module receives the comparison result of the comparator and outputs a control signal to control the self-calibration resistor array and the internal resistor array associated with the self-calibration resistor array. 2. The self-calibrating current source system according to claim 1, wherein the unit resistances in the self-calibration resistor array correspond to the unit resistances in the internal resistance array one by one. 3. The self-calibrating current source system as claimed in claim 2, wherein the resistance value of each unit resistance in the internal resistance array is k times of the resistance value of the unit resistance in its corresponding self-calibration resistance array . 4. self-calibration current source system as claimed in claim 2, is characterized in that, described self-calibration current source system also comprises: a first switching device group, which is arranged between the internal resistance array and the control module, and is turned on or off according to the control signal; and The second switch device group is arranged between the self-calibration resistor array and the control module, and is turned on or off according to the control signal. 5. The self-calibrating current source system according to claim 4, wherein each switching device in the first switching device group is respectively arranged between a unit resistance of the internal resistance array and the control module , each switching device in the second switching device group is respectively arranged between a unit resistance of the self-calibrating resistance array and the control module, so that the switching devices in the first switching device group and the switching devices in the second switching device One to one correspondence. 6. The self-calibrating current source system as claimed in claim 5, wherein the control signal to each switching device in the first switching device group is the same as that to the switch corresponding to the switching device in the second switching device group The control signals of the devices are the same. 7. The self-calibrating current source system according to claim 1, wherein the control module is composed of an up-down counter and control logic. 8. The self-calibrating current source system of claim 1, wherein the comparator is a double differential clock-latch comparator.

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