CN103137517B - For processing the reaction unit of wafer, electrostatic chuck and wafer temperature control method - Google Patents
For processing the reaction unit of wafer, electrostatic chuck and wafer temperature control method Download PDFInfo
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- CN103137517B CN103137517B CN201110379158.0A CN201110379158A CN103137517B CN 103137517 B CN103137517 B CN 103137517B CN 201110379158 A CN201110379158 A CN 201110379158A CN 103137517 B CN103137517 B CN 103137517B
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000012545 processing Methods 0.000 title claims abstract description 8
- 239000004065 semiconductor Substances 0.000 claims abstract description 140
- 238000010438 heat treatment Methods 0.000 claims abstract description 28
- 238000001816 cooling Methods 0.000 claims abstract description 23
- 239000012530 fluid Substances 0.000 claims abstract description 14
- 230000004888 barrier function Effects 0.000 claims abstract description 13
- 238000001514 detection method Methods 0.000 claims description 12
- 230000001413 cellular effect Effects 0.000 claims description 5
- 239000011159 matrix material Substances 0.000 claims description 5
- 239000002887 superconductor Substances 0.000 claims description 4
- 229910001245 Sb alloy Inorganic materials 0.000 claims description 3
- 229910017629 Sb2Te3 Inorganic materials 0.000 claims description 3
- 230000001276 controlling effect Effects 0.000 abstract description 9
- 230000001105 regulatory effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000005259 measurement Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000003507 refrigerant Substances 0.000 description 1
- 238000005057 refrigeration Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000005619 thermoelectricity Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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Abstract
The invention discloses a kind of for processing the reaction unit of wafer, electrostatic chuck and wafer temperature control method, relate to semiconductor process technique field.This electrostatic chuck includes the insulating barrier for supporting wafer；With the semiconductor temperature-control module array being positioned in insulating barrier.In semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.In semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.Coordinate with fluid cooling system, the temperature being attracted to the wafer above ESC is regulated by the refrigerating/heating switch and output controlling each semiconductor temperature-control module in semiconductor temperature-control module array, it is thus possible to preferably adjust the discordance of temperature, wafer temperature concordance can be greatly improved, particularly improve non-radial temperature discordance.
Description
Technical field
The present invention relates to semiconductor process technique field, particularly to a kind of for processing the reaction unit of wafer, electrostatic chuck (ElectroStaticChuck, ESC) and wafer temperature control method.
Background technology
Wafer (Wafer) (such as, Silicon Wafer) is used to manufacture the base semiconductor material of chip, is also most important material in semiconductor industry.The final mass of chip made on wafer has direct relation with the quality of the wafer used when starting from.If it is defective in original wafer, then on final chip, also to there will certainly be defect.For can be used for the wafer of manufacture semiconductor device, need to meet strict material and desired physical considerations.
Cost is the key factor in semiconductor industry.Based on cost consideration, on the one hand modern semiconductor technology reduces the physical size of the device manufactured on wafer, on the other hand expand the size of wafer.Above-mentioned two direction can produce more chip with similar cost.Along with wafer size also from 5 inches (Inch), 8 inches, develop into present 12 inch, 18 inches, bigger size even of future generation, various new problems the most constantly occur.
It is a major issue in wafer related process that concordance controls (UniformityControl).Along with wafer size becomes big, concordance controls to become more crucial, and will become the significant challenge of technological development.
ESC cooling system (Coolantsystem) is the important means controlled for wafer temperature concordance.Existing ESC cooling system is that ring-type (Ringtype) carries (Multi-Zone) to design more.This being designed to arranges different temperature for different cooling zones, to adjust temperature consistency in wafer.This design can preferably adjust radially (radial) temperature discordance.But, for non-radial temperature discordance distribution, existing ESC design can not carry out consistency adjustment well.Fig. 1 shows the existing ESC design adjustment result for temperature discordance.As it is shown in figure 1, this ESC design can adjust radial temperature profile discordance, but can not adjust well for non-radial part, temperature range (Range) even becomes much larger.Additionally, the temperature control precision of existing cooling system is inadequate.
Summary of the invention
In view of problem above proposes the present invention.
It is an object of the present invention to provide the technical scheme of a kind of electrostatic chuck for attracting wafer.
According to the first aspect of the invention, it is provided that a kind of electrostatic chuck, including: for supporting the insulating barrier of wafer；With the semiconductor temperature-control module array being positioned in insulating barrier.
Preferably, in semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.
Preferably, this electrostatic chuck also includes: program control selector, electrically connects with semiconductor temperature-control module array, for controlling refrigerating/heating switch and/or the output of each semiconductor temperature-control module in semiconductor temperature-control module array.
Preferably, this electrostatic chuck also includes: hygrosensor, for detecting the temperature of the diverse location of the wafer being adsorbed on electrostatic chuck；Program control selector is connected with hygrosensor, for controlling refrigerating/heating switch and/or the output of each semiconductor temperature-control module in semiconductor temperature-control module array according to the temperature of hygrosensor detection.
Preferably, hygrosensor is distributed on electrostatic chuck with predetermined pattern.
Preferably, semiconductor temperature-control module array is cellular, matrix arrangement, or linear array.
Preferably, this electrostatic chuck also includes: the fluid cooling system being positioned on electrostatic chuck.
According to a further aspect in the invention, it is provided that a kind of reaction unit for processing wafer, including: chamber, for supporting the above-mentioned electrostatic chuck of wafer in chamber.
According to another aspect of the invention, a kind of wafer temperature control method is provided, comprise determining that the output parameter of each semiconductor temperature-control module of semiconductor temperature-control module array in electrostatic chuck, semiconductor temperature-control module array be positioned at electrostatic chuck in the insulating barrier supporting wafer, output parameter include refrigerating/heating switch and/or output；Each semiconductor temperature-control module in quasiconductor temperature control module array is controlled to control the temperature of wafer by the output parameter according to each semiconductor temperature-control module.
Preferably, in semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.
Preferably, the method also includes: the temperature of the diverse location of the wafer that detection is adsorbed on electrostatic chuck；The temperature of the diverse location according to wafer determines temperature-compensating figure；Determine that in electrostatic chuck, the output parameter of each semiconductor temperature-control module of semiconductor temperature-control module array includes: determine the output parameter of each semiconductor temperature-control module in the semiconductor temperature-control module array that electrostatic chuck includes according to temperature-compensating figure.
Preferably, the temperature of the diverse location of the wafer that detection is adsorbed on electrostatic chuck includes: the temperature on the predetermined pattern position of the wafer that detection is adsorbed on electrostatic chuck.
Preferably, semiconductor temperature-control module array is cellular, matrix arrangement, or linear array.
Preferably, the method also includes: combines semiconductor temperature-control module array by the fluid cooling system being positioned on electrostatic chuck and controls the temperature of wafer.
An advantage of the invention that, the temperature of wafer can be more finely controlled by controlling the semiconductor temperature-control module array on electrostatic chuck.
It is another advantage of the present invention that by the independent semiconductor temperature-control module array controlled on electrostatic chuck, it is possible to improve the non-radial discordance of wafer temperature.
By detailed description to the exemplary embodiment of the present invention referring to the drawings, the further feature of the present invention and advantage thereof will be made apparent from.
Accompanying drawing explanation
The accompanying drawing of the part constituting description describes embodiments of the invention, and together with the description for explaining the principle of the present invention.
Referring to the drawings, according to detailed description below, the present invention can be more clearly understood from, wherein:
Fig. 1 illustrates that in prior art, wafer temperature based on ring-type many bands cooling system compensates diagram.
Fig. 2 A illustrates the structure chart of an embodiment of the reaction unit for processing wafer according to the present invention.
Fig. 2 B illustrates according to the top view of semiconductor temperature-control module array in ESC in one embodiment of the invention.
Fig. 2 C illustrates according to the circuit diagram of semiconductor temperature-control module in one embodiment of the invention.
Fig. 3 A illustrates the structure chart of an embodiment according to ESC of the present invention.
Fig. 3 B illustrates in Fig. 3 A embodiment program control selector circuit schematic diagram in ESC.
Fig. 4 illustrates the flow chart of an embodiment of the wafer temperature control method according to the present invention.
Fig. 5 illustrates the flow chart of another embodiment of the wafer temperature control method according to the present invention.
Fig. 6 illustrates the flow chart of another embodiment of the wafer temperature control method according to the present invention.
Fig. 7 illustrates the flow chart of the further embodiment of the wafer temperature control method according to the present invention.
Fig. 8 illustrates the schematic diagram of the application examples of the wafer temperature control according to the present invention.
Detailed description of the invention
The various exemplary embodiments of the present invention are described in detail now with reference to accompanying drawing.It should also be noted that unless specifically stated otherwise, the parts illustrated the most in these embodiments and positioned opposite, the numerical expression of step and numerical value do not limit the scope of the invention.
Simultaneously, it should be appreciated that for the ease of describing, the size of the various piece shown in accompanying drawing is not to draw according to actual proportionate relationship.
Description only actually at least one exemplary embodiment is illustrative below, never as to the present invention and application thereof or any restriction of use.
May be not discussed in detail for technology, method and apparatus known to person of ordinary skill in the relevant, but in the appropriate case, technology, method and apparatus should be considered to authorize a part for description.
In shown here and all examples of discussing, any occurrence should be construed as merely exemplary rather than as limiting.Therefore, other example of exemplary embodiment can have different values.
It should also be noted that similar label and letter represent similar terms in following accompanying drawing, therefore, the most a certain Xiang Yi accompanying drawing is defined, then need not it is further discussed in accompanying drawing subsequently.
The basic conception of the embodiment of the present invention is to provide the ESC being embedded with semiconductor temperature-control module array, is controlled the temperature of wafer by semiconductor temperature-control module array and fluid cooling system (Fluidcoolantsystem).
Fig. 2 A illustrates the structure chart of an embodiment of the reaction unit for processing wafer according to the present invention.As in figure 2 it is shown, reaction unit includes chamber 200 in this embodiment, for supporting the electrostatic chuck 21 of wafer 25 in chamber 200.Electrostatic chuck 21 has battery lead plate or the conductive gate 23 internally applying the DC voltage from ESC power supply, utilizes the Coulomb force produced by the DC voltage of this applying or Johnsen-Rahbek power adsorb and keep wafer 25.Electrostatic chuck 21 includes the insulating barrier for supporting wafer and semiconductor temperature-control (Thermoelectricity, the TE) module array 22 being positioned in insulating barrier.In semiconductor temperature-control module array 22, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.Wherein, semiconductor temperature-control module can be semiconductor refrigerating/heating module.Semiconductor refrigerating/heating module is for example with based on Bi2Te3-Sb2Te3, Bi2Te3-Sb2Te3-Sb2Se3, p-type Ag (1-x) Cu (x) TiTe, N-type Bi-Sb alloy (alloy), the superconductor (superconductor) of YBaCuO.The control of wafer temperature can be independently realized by semiconductor temperature-control module array 22.The temperature being attracted to the wafer 21 above ESC is regulated by the refrigerating/heating switch and output controlling each semiconductor temperature-control module in semiconductor temperature-control module array 22, it is thus possible to preferably adjust the discordance of temperature, wafer temperature concordance can be greatly improved, particularly improve non-radial temperature discordance.
Each semiconductor temperature-control module that it will be understood to those skilled in the art that in ESC in semiconductor temperature-control module array can independently control, therefore, it is possible to preferably control wafer all directions, the temperature of each position, the concordance of wafer temperature is better achieved.
ESC semiconductor-on-insulator temperature control module array 22 can be there to be various arrangement mode, the most cellular, matrix arrangement, or linear array.Fig. 2 B illustrates according to the top view of semiconductor temperature-control module array in ESC in one embodiment of the invention, and in this embodiment, the semiconductor temperature-control module array 22 on ESC21 is in honeycomb arrangement.
Fig. 2 C illustrates according to the circuit diagram of semiconductor temperature-control module in one embodiment of the invention.As shown in Figure 2 C, semiconductor temperature-control module includes N-type semiconductor 221, P-type semiconductor 222, flow guide bar 223 and 224, provides electric energy by power supply 225 for semiconductor temperature-control module.When one block of N-type semiconductor material and one block of P-type semiconductor material are coupled to galvanic couple pair, after connecting DC current in this circuit, just can produce the transfer of energy, the joint that electric current is flowed to p-type element by N-type element absorbs heat, become cold end, flowed to the joint release heat of N-type element by p-type element, become hot junction.Flow guide bar 223 shown in Fig. 2 C is cold end, can absorb heat, and flow guide bar 224 is hot junction, can be with heat release.If changing the cathode and anode directions of power supply 225, flow guide bar 223 will become hot junction, and flow guide bar 224 will become cold end.So, for each semiconductor temperature-control module, can not only individually control, and can freeze as required or heat, it is thus possible to preferably adjust the discordance of temperature, it is greatly improved wafer temperature concordance, and improves non-radial temperature discordance.
In one embodiment, electrostatic chuck 21 also has fluid cooling system.Fluid cooling system is positioned at the lower section of semiconductor temperature-control module array 22, including the ring-type many bands cryogen chamber 24 extended the most in a circumferential direction, from ESC cooler (not shown) through cold-producing medium pipe arrangement to the cold-producing medium of circulation supply set point of temperature this cryogen chamber 24 (such as, cooling water, liquid helium (He) etc.), utilize the temperature of this cold-producing medium to control the treatment temperature of the adsorbed wafer 21 being maintained at above ESC.Semiconductor temperature-control module array and fluid cooling system coordinate, it is possible to preferably adjust the temperature of wafer, are greatly improved wafer temperature concordance, improve non-radial temperature discordance.
Except coordinating with traditional fluid cooling system, semiconductor temperature-control module array can also coordinate with other cooling system.
Fig. 3 A illustrates the structure chart of an embodiment according to ESC of the present invention.As it is shown on figure 3, ESC21 also includes the program control selector 36 electrically connected with semiconductor temperature-control module array 22, program control selector 36 can independently control refrigerating/heating switch and/or the output of each semiconductor temperature-control module in semiconductor temperature-control module array 22.ESC21 also includes the multiple hygrosensors 37 being located therein, the temperature of the diverse location of the wafer that hygrosensor 37 detection is adsorbed on electrostatic chuck.Program control selector 36 is connected with hygrosensor 37, temperature and the preferred temperature of input according to hygrosensor 37 detection control the refrigerating/heating of each semiconductor temperature-control module in semiconductor temperature-control module array 22 and switch and/or output, thus preferably adjust wafer temperature concordance.In one embodiment, hygrosensor is infrared (Infra-red, IR) temperature monitoring chip, there is radio frequency (RF) function, it is positioned at the surface of ESC-TE, is connected to semiconductor temperature-control array by radio-frequency apparatus and processor, carry out information mutual.Hygrosensor can corresponding with semiconductor temperature-control module be placed.In one embodiment, hygrosensor is distributed on electrostatic chuck with predetermined pattern.Such as, the distribution of hygrosensor keeps consistent with semiconductor temperature-control module array, it is achieved detection and the control to each zonule.In one embodiment, hygrosensor is positioned at inside electrostatic chuck, at profile height 1/2 about.
In above-described embodiment, program control selector obtains temperature according to hygrosensor and controls the output of each semiconductor temperature-control module in semiconductor temperature-control module array, can realize wafer temperature control more preferably, more accurately.
Fig. 3 B illustrates in Fig. 3 A embodiment the circuit diagram of an example of program control selector in ESC.In figure 3b, each semiconductor temperature-control module in program control selector 36 and semiconductor temperature-control module array 22 connects respectively, for controlling refrigerating/heating switch and the output of each semiconductor temperature-control module.Power supply 38 provides electric power for program control selector 36.
Fig. 4 illustrates the flow chart of an embodiment of the wafer temperature control method according to the present invention.
As shown in Figure 4, step 402, determine the output parameter of each semiconductor temperature-control module of semiconductor temperature-control module array in electrostatic chuck, semiconductor temperature-control module array be positioned at electrostatic chuck in the insulating barrier supporting wafer, output parameter include refrigerating/heating switch and/or output.In semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.
Step 404, is controlled to control the temperature of wafer each semiconductor temperature-control module in quasiconductor temperature control module array according to the output parameter of each semiconductor temperature-control module.
Fig. 5 illustrates the flow chart of another embodiment of the wafer temperature control method according to the present invention.
As it is shown in figure 5, step 502, the temperature of difference (crucial) position of the wafer that detection is adsorbed on electrostatic chuck.Temperature according to wafer diverse location can obtain the temperature profile of whole wafer.
Step 504, according to the temperature computation temperature-compensating figure of the diverse location of wafer, is i.e. used for compensating the temperature chart of wafer temperature discordance.
Step 506, determines the output of fluid cooling system according to temperature-compensating figure.
Step 508, determines the output of each semiconductor temperature-control module in semiconductor temperature-control module array according to the output of temperature-compensating figure and cooling system.
Step 510, is controlled each semiconductor temperature-control module in quasiconductor temperature control module array so that the temperature of wafer controlling to be adsorbed on electrostatic chuck reaches predetermined Temperature Distribution.
Fig. 6 illustrates the flow chart of another embodiment of the wafer temperature control method according to the present invention.
As shown in Figure 6, step 602, the temperature of difference (crucial) position of the wafer that detection is adsorbed on electrostatic chuck.Temperature according to wafer diverse location can obtain the temperature profile of whole wafer.
Step 604, according to the temperature computation temperature-compensating figure of the diverse location of wafer, is i.e. used for compensating the temperature chart of wafer temperature discordance.
Step 606, determines each semiconductor temperature-control modular refrigeration in semiconductor temperature-control module array/heat switch and the output of refrigerating/heating according to temperature-compensating figure.It is to say, part semiconductor temperature control module is for freezing to the correspondence position of wafer, and part semiconductor temperature control module is for heating the correspondence position of wafer.
Step 608, is controlled each semiconductor temperature-control module in quasiconductor temperature control module array so that the temperature of wafer controlling to be adsorbed on electrostatic chuck reaches predetermined Temperature Distribution.
Fig. 7 illustrates the flow chart of the further embodiment of the wafer temperature control method according to the present invention.
As it is shown in fig. 7, step 702, collect physics Parameter Map.Choose care (or important) figure and carry out the CD measurement of the holocrystalline all DIE of circle (unit wafer), obtained the CD scattergram of holocrystalline circle according to CD measurement by software mapping.CD measurement equipment can be measurement platform, such as CDSEM or OCD.
Step 704, calculates temperature-compensating figure according to physical parameter figure.Prepare the working curve of cooling system, set up ESC temperature and the relation of CD in (such as etching) committed step；Based on physical parameter figure, calculate and arrange the deviation of value, calculated the temperature value needing to adjust by working curve, it is thus achieved that temperature-compensating figure.
Step 706, determines the output of each semiconductor temperature-control module in cooling system and semiconductor temperature-control module array according to temperature-compensating figure.
Step 708, controls the output of each semiconductor temperature-control module in cooling system and semiconductor temperature-control module array.
Fig. 8 illustrates the operating diagram that the wafer temperature in Fig. 7 embodiment controls.Such as, in dry etching, along with lasting plasma (plasma) 87 bombardment, the temperature of wafer 84 can constantly raise.ESC is while clamping wafer, the temperature of each position of wafer monitored by the hygrosensor 86 being correspondingly arranged with semiconductor temperature-control module 82, discharged by the refrigerant fluid of fluid cooling system 83 internal flow and control wafer 84 temperature, providing extra refrigerating/heating to originate by each semiconductor temperature-control module in semiconductor temperature-control module array 82.Controlling fluid cooling system 83 by working curve 85, program control selector 81 determines temperature-compensating figure according to working curve 85 and temperature parameter figure, controls the output of each semiconductor temperature-control module in semiconductor temperature-control module array 82.In practical operation can the suitably overall temperature reducing ESC, by semiconductor temperature-control module in semiconductor temperature-control module array, the temperature of wafer is controlled to setting value.
So far, electrostatic chuck according to the present invention and wafer temperature control method are described in detail.In order to avoid covering the design of the present invention, details more known in the field are not described.Those skilled in the art are as described above, complete it can be appreciated how implement technical scheme disclosed herein.
Although being described in detail some specific embodiments of the present invention by example, but it should be appreciated by those skilled in the art, above example is merely to illustrate rather than in order to limit the scope of the present invention.It should be appreciated by those skilled in the art, can without departing from the scope and spirit of the present invention above example be modified.The scope of the present invention be defined by the appended claims.
Claims (14)
1. the electrostatic chuck (ESC) being used for attracting wafer, it is characterised in that including:
For supporting the insulating barrier of wafer；With
, wherein, in described semiconductor temperature-control module array, between each semiconductor temperature-control module and wafer, there is not described insulating barrier in the semiconductor temperature-control module array being positioned in described insulating barrier；
Described ESC also includes:
Hygrosensor, for detecting the temperature of the diverse location of the wafer being adsorbed on described electrostatic chuck；
Program control selector, determines temperature-compensating figure for the temperature detected according to described hygrosensor；Determining the output parameter of each semiconductor temperature-control module in described semiconductor temperature-control module array according to described temperature-compensating figure, described output parameter includes refrigerating/heating switch and/or output；Each semiconductor temperature-control module in described semiconductor temperature-control module array is controlled to control the temperature of described wafer by the output parameter according to each semiconductor temperature-control module described.
Electrostatic chuck the most according to claim 1, it is characterised in that in described semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.
Electrostatic chuck the most according to claim 1, it is characterised in that described hygrosensor is infrared temperature sensor, has radio frequency chip.
Electrostatic chuck the most according to claim 1, it is characterized in that, described semiconductor temperature-control module is semiconductor refrigerating/heating module, described semiconductor refrigerating/heating module uses based on Bi2Te3-Sb2Te3, Bi2Te3-Sb2Te3-Sb2Se3, p-type Ag (1-x) Cu (x) TiTe, N-type Bi-Sb alloy, the superconductor of YBaCuO.
Electrostatic chuck the most according to claim 1, it is characterised in that described semiconductor temperature-control module array is cellular, matrix arrangement, or linear array.
Electrostatic chuck the most according to claim 1, it is characterised in that also include:
It is positioned at the fluid cooling system below described semiconductor temperature-control module array.
7. the reaction unit being used for processing wafer, it is characterised in that including:
Chamber,
For supporting the electrostatic chuck as described in any one in claim 1 to 6 of wafer in described chamber.
8. a wafer temperature control method, it is characterised in that including:
Determine the output parameter of each semiconductor temperature-control module of semiconductor temperature-control module array in electrostatic chuck, described semiconductor temperature-control module array be positioned at described electrostatic chuck in the insulating barrier supporting wafer, described output parameter includes refrigerating/heating switch and/or output, wherein, there is not described insulating barrier between each semiconductor temperature-control module and wafer in described semiconductor temperature-control module array；
Each semiconductor temperature-control module in described semiconductor temperature-control module array is controlled to control the temperature of described wafer by the output parameter according to each semiconductor temperature-control module described.
Method the most according to claim 8, it is characterised in that in described semiconductor temperature-control module array, refrigerating/heating switch and/or the output of each semiconductor temperature-control module can independently control.
Method the most according to claim 8, it is characterised in that also include:
The temperature of the diverse location of the wafer that detection is adsorbed on described electrostatic chuck；
The temperature of the diverse location according to described wafer determines temperature-compensating figure；
Described determine that in electrostatic chuck, the output parameter of each semiconductor temperature-control module of semiconductor temperature-control module array includes:
The output parameter of each semiconductor temperature-control module in the semiconductor temperature-control module array that electrostatic chuck includes is determined according to described temperature-compensating figure.
11. methods according to claim 10, it is characterised in that the temperature of the diverse location that described detection is adsorbed in the wafer on described electrostatic chuck includes:
Temperature on the predetermined pattern position of the wafer that detection is adsorbed on described electrostatic chuck.
12. methods according to claim 8, it is characterized in that, described semiconductor temperature-control module is semiconductor refrigerating/heating module, described semiconductor refrigerating/heating module uses based on Bi2Te3-Sb2Te3, Bi2Te3-Sb2Te3-Sb2Se3, p-type Ag (1-x) Cu (x) TiTe, N-type Bi-Sb alloy, the superconductor of YBaCuO.
13. methods according to claim 8, it is characterised in that described semiconductor temperature-control module array is cellular, matrix arrangement, or linear array.
14. methods according to claim 8, it is characterised in that also include:
The temperature of the described semiconductor temperature-control module array described wafer of control is combined by being positioned at the fluid cooling system below described semiconductor temperature-control module array.
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| CN201110379158.0A CN103137517B (en) | 2011-11-25 | 2011-11-25 | For processing the reaction unit of wafer, electrostatic chuck and wafer temperature control method |
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| CN201110379158.0A CN103137517B (en) | 2011-11-25 | 2011-11-25 | For processing the reaction unit of wafer, electrostatic chuck and wafer temperature control method |
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| CN105161485B (en) * | 2015-07-28 | 2017-12-26 | 昆明物理研究所 | Integrative packaging shell and semiconductor thermostat and preparation method thereof |
| CN106726502A (en) * | 2017-01-23 | 2017-05-31 | 首都医科大学 | A kind of acupuncture disposably electricity refrigeration acupuncture needle |
| CN108281343A (en) * | 2018-01-22 | 2018-07-13 | 德淮半导体有限公司 | Temperature of electrostatic chuck control system |
| CN110600419A (en) * | 2019-09-20 | 2019-12-20 | 上海华力微电子有限公司 | Electrostatic chuck and using method thereof |
| CN111490000A (en) * | 2020-04-17 | 2020-08-04 | 北京北方华创微电子装备有限公司 | Electrostatic chuck and semiconductor processing equipment |
| CN114551202B (en) * | 2020-11-25 | 2025-01-03 | 中国科学院微电子研究所 | Electrostatic chuck, processing chamber and semiconductor processing equipment |
| CN115106134A (en) * | 2021-08-20 | 2022-09-27 | 上海芃威医疗科技有限公司 | High-low temperature alternating damp-heat test box for aging test |
| CN114695241A (en) * | 2022-03-23 | 2022-07-01 | 浙江中科尚弘离子装备工程有限公司 | High-precision temperature control intelligent high-temperature electrostatic chuck |
| CN118763032A (en) * | 2024-09-09 | 2024-10-11 | 无锡尚积半导体科技有限公司 | A temperature compensation method and device for etching stage |
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| CN101465312A (en) * | 2007-12-18 | 2009-06-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Cartridge unit for fixing wafer and capable of controlling temperature with region |
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