[go: up one dir, main page]

CN103297196B - A kind of cyclic redundancy check method of non-whole byte data - Google Patents

A kind of cyclic redundancy check method of non-whole byte data Download PDF

Info

Publication number
CN103297196B
CN103297196B CN201310246949.5A CN201310246949A CN103297196B CN 103297196 B CN103297196 B CN 103297196B CN 201310246949 A CN201310246949 A CN 201310246949A CN 103297196 B CN103297196 B CN 103297196B
Authority
CN
China
Prior art keywords
crc16
byte
formula
reg
crc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310246949.5A
Other languages
Chinese (zh)
Other versions
CN103297196A (en
Inventor
杨尚胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHENGDU GUOXING COMMUNICATION Co Ltd
Original Assignee
CHENGDU GUOXING COMMUNICATION Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHENGDU GUOXING COMMUNICATION Co Ltd filed Critical CHENGDU GUOXING COMMUNICATION Co Ltd
Priority to CN201310246949.5A priority Critical patent/CN103297196B/en
Publication of CN103297196A publication Critical patent/CN103297196A/en
Application granted granted Critical
Publication of CN103297196B publication Critical patent/CN103297196B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention discloses the cyclic redundancy check method of a kind of non-whole byte data, it comprises the following steps: table look at Crc16_Table [S0] obtain the first byte S0CRC16 value;By the high n position C of the CRC16 value of a upper byteHAnd BnPhase XOR, XOR result is tabled look-up as subscript and is obtained Crc16_Table [(CH+Bn)];By behind low (16 n) lt n position of the CRC16 of a upper byte with table look-up value Crc16_Table [(CH+Bn)] phase XOR, wherein the value relation of n is: the n=8 when calculating whole byte CRC16, the bit number on n treating excess syndrome border when calculating not enough byte CRC16.The present invention can be to use under the conditions of non-integer byte is unsatisfactory for the use calculated by byte mode in transmission information, substantially increase computational efficiency, shorten the calculating time, release substantial amounts of cpu resource, reduce cpu performance and the requirement of operation clock, reduce CPU power consumption.

Description

A kind of cyclic redundancy check method of non-whole byte data
Technical field
The present invention relates to the cyclic redundancy check (CRC) algorithm of a kind of non-whole byte data.
Background technology
In various data communication, being the most all transmitted after packet, after grouped data, additional data Frame Check Sequence (Frame Check Sequence is called for short FCS) carries out Error Control, to ensure the correctness of the transmission of data.In the realization of Frame Check Sequence, CRC (Cyclic Redundancy Code, it is called for short CRC) obtain a wide range of applications with its high efficiency, high-performance, it is a kind of method improving data communication reliability commonly used in current data transmission procedure.
Data are during sending, and transmitting terminal will need the data transmitted to carry out CRC check yardage calculation, and send together after being attached to check code transmit data.Receiving terminal needs to carry out check code calculating by the same computational methods data to receiving, and is then compared with the CRC code received by calculated CRC code, if unanimously the transmission of explanation data is errorless, if the transmission of inconsistent explanation data is wrong.
The computational efficiency of CRC and time delay are the most all the keys of CRC coding techniques, directly determine whether it can apply in reality.At present, the computational methods of CRC, there is step-by-step calculate and calculate two kinds of distinct modes by byte, computational efficiency is calculated high by byte mode, during calculating, cycle-index is 1/8 that a mode calculates, and calculate the shortest and controlled, byte mode is by calculating of having tabled look-up, the shortest and fixing, calculate more than position mode and be more suitable for real-time embedded system by conditional judgment executive mode, although byte mode superiority is obvious, but its actual application has stringent condition requirement: transmission information is necessary for integer byte, transmission information is the CRC transmitting information sequence with regard to only using position mode to calculate that non-integer byte is unsatisfactory for the use condition of byte mode, extremely inefficient, the real-time response performance of serious limit product.
Summary of the invention
It is an object of the invention to overcome the deficiencies in the prior art, thering is provided a kind of can be to use under the conditions of non-integer byte is unsatisfactory for the use calculated by byte mode in transmission information, substantially increase computational efficiency, shorten the calculating time, release substantial amounts of cpu resource, reduce cpu performance and the requirement of operation clock, reduce the cyclic redundancy check (CRC) algorithm of a kind of non-whole byte data of CPU power consumption.
It is an object of the invention to be achieved through the following technical solutions: the cyclic redundancy check (CRC) algorithm of a kind of non-whole byte data, CRC mathematics essence is to be to CRC generator polynomial complementation, the generator polynomial of CRC16 to transmission message polynomial:
G(x)=x16+x12+x5+ 1, its computational methods are: add to after S (x) by 16 0, namely
S(x)=r16× S (x), wherein r=2 is the base of binary polynomial operation, and then generator polynomial G (x) is done division arithmetic by S (x), i.e. carries out logic xor operation, finally obtains the complementing part of division, be CRC16, referred to as Creg, and business's part is called for short M (x), it comprises the following steps:
S1: assume SmCorresponding CRC16 value is Creg, by defining, then:
CRC S m = ( R 2 * S m ) Mod ( G ( x ) ) = G reg = Crc 16 _ Table [ S m ] (formula 1)
R2*Sm=M(x)*G(x)+Creg(formula 2)
S2: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm, calculate S'mCRC16, it comprises the following steps:
S201: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm,
S'm=rn*Sm+Bn(formula 3)
BnRepresenting n position binary polynomial, wherein high-order front, low level is rear.
S202: to S'mCarry out increasing by 16 0 operations and ensure that remainder is exactly directly the CRC16 result of data stream:
R2*S'm=R2*(rn*Sm+Bn)=rn*(R2*Sm)+R2*Bn(formula 4)
Formula 2 is substituted and obtains into formula 4:
R2*S'm=rn*(M(x)*G(x)+Creg)+R2*Bn
=(rn*M(x)*G(x))+rn*Creg+R2*Bn(formula 5)
Make CHRepresent CregHigh n position, CLRepresent CregLow (16-n) position,
Creg=r(16-n)*CH+CL(formula 6)
Formula 6 substitutes into formula 5 obtain:
R2*S'm=(rn*M(x)*G(x))+R2*CH+rn*CL+R2*Bn(formula 7)
=(rn*M(x)*G(x))+R2*(CH+Bn)+rn*CL
Defined by CRC and know: (rn* M (x) * G (x)) Mod (G (x)) ≡ 0 (formula 8)
( R 2 * ( C H + B n ) ) Mod ( G ( x ) ) = CRC C H + B n = Crc 16 _ Table [ C H + B n ]
( r n * C L ) Mod ( G ( x ) ) = r n * C L
Obtained by logic or the associativity of operation, formula 7 and formula 8:
(R2*S'm)Mod(G(x))=Crc16_Table[CH+Bn]+rn*CL(formula 9)
That is:
CRC S m ′ = Crc 16 _ Table [ ( C H + B n ) ] + r n * C L . (formula 10)
S3: from formula 10, the CRC16 calculating current data completes in two steps, comprises the following steps that;
S301: by the high n position C of the CRC16 value of a upper byteHAnd BnPhase XOR, XOR result is tabled look-up as subscript and is obtained Crc16_Table [(CH+Bn)];
S302: by behind low (16-n) lt n position of the CRC16 of a upper byte with table look-up value Crc16_Table [(CH+Bn)] phase XOR.
S4: calculate the CRC16 of random length byte, it comprises the following steps:
S401: the first byte S of the stream that fetches data0Table look-up Crc16_Table [S as subscript0] obtain S0Current CRC16 value;
S402: CRC16 calculating can be completed by the part that byte processes according to byte by all in order;
S403: take the actual bit number that n is remaining data and substitute into formula 10, completes to remain the calculating of not enough byte sections CRC16;
S404: combine the current CRC16 value that S401, S402 and S403 obtain, the CRC result calculated according to byte and not enough byte sections CRC result and obtain the CRC16 result of whole data.
The invention has the beneficial effects as follows:
The present invention can be to use under the conditions of non-integer byte is unsatisfactory for the use calculated by byte mode in transmission information, not only CRC result is correct, and substantially increase computational efficiency, shorten the calculating time, actual test shows: the calculating time brings up to 9us from 70us, improves real-time response performance, releases substantial amounts of cpu resource, reduce cpu performance and the requirement of operation clock, reduce CPU power consumption.
Detailed description of the invention
Technical scheme being detailed further below: the cyclic redundancy check (CRC) algorithm of a kind of non-whole byte data, CRC mathematics essence is to be to CRC generator polynomial complementation, the generator polynomial of CRC16 to transmission message polynomial:
G(x)=x16+x12+x5+ 1, its computational methods are: add to after S (x) by 16 0, namely
S(x)=r16× S (x), wherein r=2 is the base of binary polynomial operation, and then generator polynomial G (x) is done division arithmetic by S (x), i.e. carries out logic xor operation, finally obtains the complementing part of division, be CRC16, referred to as Creg, and business's part is called for short M (x), it comprises the following steps:
S1: assume SmCorresponding CRC16 value is Creg, by defining, then:
CRC S m = ( R 2 * S m ) Mod ( G ( x ) ) = G reg = Crc 16 _ Table [ S m ] (formula 1)
R2*Sm=M(x)*G(x)+Creg(formula 2)
S2: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm, calculate S'mCRC16, it comprises the following steps:
S201: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm,
S'm=rn*Sm+Bn(formula 3)
BnRepresenting n position binary polynomial, wherein high-order front, low level is rear.
S202: to S'mCarry out increasing by 16 0 operations and ensure that remainder is exactly directly the CRC16 result of data stream:
R2*S'm=R2*(rn*Sm+Bn)=rn*(R2*Sm)+R2*Bn(formula 4)
Formula 2 is substituted and obtains into formula 4:
R2*S'm=rn*(M(x)*G(x)+Creg)+R2*Bn
=(rn*M(x)*G(x))+rn*Creg+R2*Bn(formula 5)
Make CHRepresent CregHigh n position, CLRepresent CregLow (16-n) position,
Creg=r(16-n)*CH+CL(formula 6)
Formula 6 substitutes into formula 5 obtain:
R2*S'm=(rn*M(x)*G(x))+R2*CH+rn*CL+R2*Bn(formula 7)
=(rn*M(x)*G(x))+R2*(CH+Bn)+rn*CL
Defined by CRC and know: (rn* M (x) * G (x)) Mod (G (x)) ≡ 0 (formula 8)
( R 2 * ( C H + B n ) ) Mod ( G ( x ) ) = CRC C H + B n = Crc 16 _ Table [ C H + B n ]
( r n * C L ) Mod ( G ( x ) ) = r n * C L
Obtained by logic or the associativity of operation, formula 7 and formula 8:
(R2*S'm)Mod(G(x))=Crc16_Table[CH+Bn]+rn*CL(formula 9)
That is:
CRC S m ′ = Crc 16 _ Table [ ( C H + B n ) ] + r n * C L . (formula 10)
S3: from formula 10, the CRC16 calculating current data completes in two steps, concretely comprises the following steps;
S301: by the high n position C of the CRC16 value of a upper byteHAnd BnPhase XOR, XOR result is tabled look-up as subscript and is obtained Crc16_Table [(CH+Bn)];
S302: by behind low (16-n) lt n position of the CRC16 of a upper byte with table look-up value Crc16_Table [(CH+Bn)] phase XOR.
S4: calculate the CRC16 of random length byte, it comprises the following steps:
S401: the first byte S of the stream that fetches data0Table look-up Crc16_Table [S as subscript0] obtain S0Current CRC16 value;
S402: CRC16 calculating can be completed by the part that byte processes according to byte by all in order;
S403: take the actual bit number that n is remaining data and substitute into formula 10, completes to remain the calculating of not enough byte sections CRC16;
S404: combine the current CRC16 value that S401, S402 and S403 obtain, the CRC result calculated according to byte and not enough byte sections CRC result and obtain the CRC16 result of whole data.

Claims (1)

1. the cyclic redundancy check method of a non-whole byte data, it is characterised in that: CRC mathematics essence is many to transmission information CRC generator polynomial complementation, the generator polynomial of CRC16 are by item formula: G (x)=x16+x12+x5+ 1, its computational methods are: 16 0 are added to after S (x), namely S (x)=r16× S (x), wherein r=2 is the base of binary polynomial operation, Then generator polynomial G (x) is done division arithmetic by S (x), i.e. carries out logic xor operation, finally obtains the complementing part of division, It is CRC16, referred to as Creg, and business's part is called for short M (x), said method comprising the steps of:
S401: the first byte S of the stream that fetches data0Table look-up Crc16_Table [S as subscript0] obtain S0Current CRC16 value;
S402: in order by all calculating that can complete CRC16 by the part that byte processes according to byte;
S403: take actual bit number that n is remaining data and substitute into formula 10: Complete to remain the calculating of not enough byte sections CRC16;
S404: combine current CRC16 value, the CRC result calculated according to byte and deficiency that S401, S402 and S403 obtain Byte sections CRC result obtains the CRC16 result of whole data;
Wherein, the calculating of CRC16 described in step S402 and step S403 completes in two steps, comprises the following steps that;
S301: by the high n position C of the CRC16 value of a upper byteHAnd BnPhase XOR, XOR result is tabled look-up as subscript and is obtained Crc16_Table[(CH+Bn)];
S302: by behind low (16-n) lt n position of the CRC16 of a upper byte with table look-up value Crc16_Table [(CH+Bn)] phase XOR;
Wherein the concrete derivation of step S301 and step S302 is as follows:
S1: assume SmCorresponding CRC16 value is Creg, by defining, then:
R2*Sm=M (x) * G (x)+CregFormula 2
S2: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm, calculate S'm's CRC16, it comprises the following steps:
S201: at SmRear increase n position, less than a byte information position, forms a new binary polynomial S'm,
S'm=rn*Sm+BnFormula 3
BnRepresenting n position binary polynomial, wherein high-order front, low level is rear;
S202: to S'mCarry out increasing by 16 0 operations and ensure that remainder is exactly directly the CRC16 result of data stream:
R2*S'm=R2*(rn*Sm+Bn)=rn*(R2*Sm)+R2*BnFormula 4
Formula 2 is substituted and obtains into formula 4:
R2*S'm=rn*(M(x)*G(x)+Creg)+R2*Bn=(rn*M(x)*G(x))+rn*Creg+R2*Bn Formula 5
Make CHRepresent CregHigh n position, CLRepresent CregLow (16-n) position,
Creg=r(16-n)*CH+CLFormula 6
Formula 6 substitutes into formula 5 obtain:
R2*S'm=(rn*M(x)*G(x))+R2*CH+rn*CL+R2*BnFormula 7
=(rn*M(x)*G(x))+R2*(CH+Bn)+rn*CL
Defined by CRC and know: (rn* M (x) * G (x)) Mod (G (x)) ≡ 0 formula 8
( R 2 * ( C H + B n ) ) M o d ( G ( x ) ) = CRC C H + B n = C r c 16 _ T a b l e [ C H + B n ]
(rn*CL) Mod (G (x))=rn*CL
Obtained by the associativity of logic xor operation, formula 7 and formula 8:
(R2*S'm) Mod (G (x))=Crc16_Table [CH+Bn]+rn*CLFormula 9
That is:
CN201310246949.5A 2013-06-20 2013-06-20 A kind of cyclic redundancy check method of non-whole byte data Active CN103297196B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310246949.5A CN103297196B (en) 2013-06-20 2013-06-20 A kind of cyclic redundancy check method of non-whole byte data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310246949.5A CN103297196B (en) 2013-06-20 2013-06-20 A kind of cyclic redundancy check method of non-whole byte data

Publications (2)

Publication Number Publication Date
CN103297196A CN103297196A (en) 2013-09-11
CN103297196B true CN103297196B (en) 2016-09-28

Family

ID=49097563

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310246949.5A Active CN103297196B (en) 2013-06-20 2013-06-20 A kind of cyclic redundancy check method of non-whole byte data

Country Status (1)

Country Link
CN (1) CN103297196B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788878B (en) * 2015-11-24 2019-11-15 中国航空工业第六一八研究所 A Parallel CRC Error Correction Method with Single Bit Error Correction Function
CN106788909B (en) * 2017-03-31 2019-11-01 重庆邮电大学 CRC calculation method and device based on GMR satellite communication protocols
CN110445583B (en) * 2019-08-12 2022-05-17 珠海市伟高变频科技有限公司 Data transmission verification method, data transmission verification system and computer-readable storage medium
CN111181628B (en) * 2020-01-09 2022-02-08 成都国星通信有限公司 Method, terminal and storage medium for transmitting voice data through Beidou short message
CN116107800B (en) * 2023-04-12 2023-08-15 浙江恒业电子股份有限公司 Verification code generation method, data recovery method, medium and electronic equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101527615A (en) * 2009-04-07 2009-09-09 华为技术有限公司 Implementation method of cyclic redundancy check (CRC) codes and device
CN102546089A (en) * 2011-01-04 2012-07-04 中兴通讯股份有限公司 Method and device for implementing cycle redundancy check (CRC) code

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101527615A (en) * 2009-04-07 2009-09-09 华为技术有限公司 Implementation method of cyclic redundancy check (CRC) codes and device
CN102546089A (en) * 2011-01-04 2012-07-04 中兴通讯股份有限公司 Method and device for implementing cycle redundancy check (CRC) code

Also Published As

Publication number Publication date
CN103297196A (en) 2013-09-11

Similar Documents

Publication Publication Date Title
CN103297196B (en) A kind of cyclic redundancy check method of non-whole byte data
CN109347598B (en) Check code processing method, electronic device and storage medium
WO2019158031A1 (en) Encoding method, decoding method, encoding device, and decoding device
CN102377521B (en) Systems and methods for performing forward error correction
WO2015006947A1 (en) Low bit-rate coding method and device
US12401449B2 (en) Data transmission method, apparatus, device, system, and readable storage medium
CN105119694A (en) Method and system for calculating CRC value in high speed network
EP3713105A1 (en) Channel state information encoding method and apparatus, storage medium and processor
WO2010135942A1 (en) Method and device for fast cyclic redundancy check coding
CN103312458A (en) Hybrid coding method
CN104639294A (en) Improved CRC (Cyclic redundancy check) implementation method
CN106788878A (en) A kind of Parallel CRC error correction method with monobit errro correction function
US12015486B2 (en) Data retransmission decoding method, apparatus and system, and communication device
WO2022111575A1 (en) Data transmission method and apparatus
CN111183748B (en) Error code resisting method based on cyclic redundancy check and erasure correction coding
WO2018133415A1 (en) Method and device for coding and decoding data of physical coding sublayer and storage medium
CN111600613A (en) A verification method, device, decoder, receiver and computer storage medium
CN103117752B (en) CCSDS system high-speed walks abreast RS encoder and coding method
CN103368685B (en) Dissociation rate matching method and device
CN103944589A (en) BCH encoding and decoding method and device
CN105356966A (en) Cyclic redundancy check (CRC) implementation method and device, and network equipment
CN102136888B (en) Sub-block de-interleaving input data processing method and device
CN112491500B (en) Method, apparatus, transmitting device and receiving device for transmitting data
CN110896342A (en) URLLC single transmission method and device, storage medium and terminal
CN113708857B (en) Far-end interference detection method, device and storage medium

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant