CN103308007B - The IC pin coplanarity measuring system of higher order reflection and grating image and method - Google Patents

Abstract

The invention discloses a multi-stage reflection and grating imaging IC pin coplanarity measurement system and method, which mainly includes an IC chip self-weight oblique sliding feeding mechanism, an external trigger synchronous control circuit, and an IC chip pin imaging optical path system , Image acquisition card and PC-based intelligent visual inspection system. The IC chip pin imaging optical system is composed of two sets of independent quasi-parallel blue LED light sources, two gratings, multiple organically combined reflectors and isosceles prisms. The detection grating fringe image of IC chip pins can be obtained through the imaging optical system. The image acquisition and analysis software system analyzes the IC chip pin image with grating stripes, evaluates the equal length of the pins in the image and the distortion characteristics of the grating stripes, and according to the corresponding f function between the coplanarity error and the bending degree of the grating stripes Mapping relationship, calculate the corresponding coplanarity error. The invention can realize the imaging of two rows of pins of the IC chip at the same time, can complete the precise detection of the pins of the IC chip only by one imaging, and has compact structure and high cost performance.

Description

IC pin coplanarity measurement system and method based on multi-stage reflection and grating imaging

Technical field:

The patent of the invention belongs to the field of electronic integrated circuit packaging, and specifically relates to a new method and a new system for measuring the coplanarity of IC chip pins in electronic packaging. It is suitable for real-time online measurement of pin coplanarity of large-scale integrated circuits such as DIP (DualIn-linePackage, dual in-line package), SOP (SmallOut-LinePackage, small outline package), PFP (PlasticFlatPackage, flat package).

Background technique:

With the development of surface mount technology, SMD components have achieved rapid development. In the surface mount (SMT) production process of circuit boards, in order to ensure the quality of mounting, there are certain requirements for the size and shape accuracy of the IC chip pins, especially the vertical distance from the vertex of the IC chip pins to the pad. The distance (coplanarity) has certain accuracy requirements. If this coplanarity is too poor, some pins of the device cannot be in close contact with the PCB pads, and it is easy to cause the melted solder during soldering to not touch the bottom of the pins, and the solder cannot connect these pins to the PCB pads. The pads are connected together to form a good solder joint, which may lead to defects such as virtual soldering, missing soldering, and virtual connection, which will eventually affect the reliability of the product. Therefore, general IC chip manufacturers have strict tolerance requirements on the coplanarity of the chips on the pins.

Because the pins of the IC chip are very small, the traditional method of manually testing the coplanarity of the pins will cause eye fatigue, and the test results are easily affected by the subjective factors of the testers. Therefore, manual detection has low detection accuracy and slow detection speed. Industrial product inspection based on machine vision can overcome the above difficulties, so it is widely used in the automatic monitoring of the surface quality of IC chips.

The existing ray projection method is to place the pins of the IC chip upwards on a horizontal smooth plane, observe the vertical distance between the highest pin and the lowest pin in the horizontal direction through the human eye, and the difference is the coplanarity. The light projection method has a simple structure and is easy to operate. However, the measurer's vision will affect the measurement process, and the subjective factors are large, so the accuracy of the measurement cannot be guaranteed.

Chinese patent CN100354601C uses a measuring method similar to a three-coordinate measuring instrument to measure the coplanarity of IC pins. This method requires a thin, light, smooth, uniform-thick plate on both sides to capture the three highest pins of the device to establish a reference plane. The distance from each pin to the reference plane is measured by a three-coordinate measuring machine, so as to obtain the coplanarity. However, this contact measurement method can only be applied to manual random inspection, the detection speed is slow, the detection accuracy is low, and it may cause secondary damage to the device.

Chinese patent CN101424511B adopts optical image acquisition and image recognition technology. However, this system uses a variety of expensive optical lenses, the mechanical mechanism is complicated, and the equipment cost is relatively high. Each imaging can only complete the image acquisition of a single row of pins, and the imaging must meet the following conditions: the switching of optical signals is required; the IC chip needs to stop moving; the linear motor needs to go back and forth once. The above conditions all consume precious time, resulting in slow imaging speed, which is difficult to meet the requirements of high-speed online detection.

Chinese patent CN102052907A proposes a three-dimensional measurement system for BGA coplanarity based on the principle of projected Moiré fringes. The system uses two cameras for simultaneous imaging, similar to the binocular machine vision approach. This method of pin coplanarity measurement based on Moiré fringes uses two cameras to image separately to obtain plane information and depth information. The system needs to be equipped with an additional auxiliary software to control the LCD to generate a virtual grating; a reference plane needs to be set artificially; a high-precision motion platform is needed to realize mechanical positioning. This method can realize large-area, high-precision real-time measurement. However, this method adopts the imaging structure of two cameras, which makes the measurement device bulky, the system structure is complex, the detection algorithm has a large amount of computation, and the equipment cost is high.

US Patent No. 7012628B2 adopts a machine vision system to perform quality inspection on the coplanarity of IC chip pins on the production line. The system requires multiple imaging of the left pin and the right pin respectively, and both need to be imaged from different angles, and the multi-frame images collected are analyzed, and finally the precise measurement of the coplanarity is realized. However, during the imaging process, the IC chip is required to keep still and imaged multiple times, resulting in a slow detection speed.

Japanese patent JP, 2003-207326, A is based on the principle of machine vision to realize the coplanarity measurement of IC pins. The method uses two cameras to collect images of the side views of the two rows of pins of the IC chip respectively. This method requires that all pins be placed on the same support plane, and a reference line is artificially set before measurement. Through the visual method, measure the distance from the end of all pins to the reference line, and compare with the calibration value, so as to realize the rapid measurement of coplanarity. However, this method uses a dual-camera structure, which is complex in structure.

The high-speed online measurement technology for the coplanarity of IC chip pins has been monopolized by a few countries such as Japan and Germany. As a result, such equipment is expensive and difficult to be widely used in production lines. In order to meet the needs of domestic and foreign manufacturers for economical coplanarity measuring equipment, the present invention is dedicated to designing an online real-time visual IC pin coplanarity measuring system with high precision and single-camera imaging.

Invention content:

The purpose of the invention is to realize the on-line coplanarity measurement of IC chip pins, and overcome the shortcomings and deficiencies of existing coplanarity measurement devices such as complex structure, bulky volume, high equipment manufacturing cost, slow detection speed and low detection accuracy. Inspired by the principle of ray projection and grating imaging, a coplanarity online intelligent visual measurement device composed of several independent mirrors, isosceles prisms, gratings and image acquisition units is proposed to meet the needs of mass production .

For realizing the purpose of the present invention, the present invention adopts following technical scheme:

A multi-stage reflection and grating imaging IC chip pin coplanarity measurement system, mainly including IC chip self-weight oblique sliding feeding mechanism, external trigger synchronous control circuit, IC chip pin imaging optical system, image acquisition card, camera , PC-based intelligent visual inspection system, photoelectric sensor,

The IC chip pin imaging optical path system includes left and right optical paths that are left and right symmetrical. The left optical path includes a left blue LED light source, a left transmission grating, a left first reflector, and a left second reflector. mirror, the third reflector on the left side, and the left half of the isosceles triangular prism with two base angles of 45 degrees. After being reflected by a reflector, the light irradiates obliquely on the lower surface of the IC chip pin; the second reflector on the left is arranged at an angle of 45 degrees, so that the diffusely reflected light from the IC chip pin is reflected and then shoots vertically upward again. The third reflector on the left is arranged at 45 degrees. After the light reflected by the third reflector on the left is emitted horizontally from left to right, it shines on the left side of the isosceles prism, and then reflects vertically upward to the camera;

The right optical path includes: the right blue LED light source, the right transmission grating, the first reflector on the right, the second reflector on the right, the third reflector on the right, and an isosceles triangular prism with two base angles of 45 degrees. In the right half, the light from the blue LED light source on the right side passes through the transmission grating on the right side in parallel from right to left, and after being reflected by the first reflector on the right side, the light irradiates obliquely on the lower surface of the IC chip pin; The second reflector is arranged at an angle of 45 degrees, so that after the diffuse reflection light from the IC chip pin is reflected, it shoots vertically upward again to the third reflector on the right arranged at 45 degrees, and the light reflected by the third reflector on the right is After shooting horizontally from right to left, it shines on the right side of the isosceles prism, and then reflects vertically upward to the camera;

The camera includes a CCD camera and an optical lens, and is installed vertically directly above the symmetrical center line of the isosceles prism. The central axis of the camera is perpendicular to the sliding guide rail of the IC chip self-weight oblique sliding feed mechanism and is connected with the IC chip pin imaging optical path system The center plane of the coincidence;

The IC chip self-weight oblique sliding feeding mechanism is located directly below the isosceles prism, and the center line of the sliding guide rail of the IC chip self-weight oblique sliding feeding mechanism is perpendicular to the central plane of the IC chip pin imaging optical path system;

The photoelectric sensor is vertically installed in the sliding guide rail of the IC chip self-weight oblique sliding feeding mechanism, and is located at the left boundary of the camera field of view. The trigger synchronous control circuit sends a position signal. After the signal is processed, it sends an imaging signal to the image acquisition card, the left blue LED light source, and the right blue LED light source. The light source is shining, and the camera takes a photo instantly. It is sent to a PC-based intelligent visual inspection system, and the PC-based intelligent visual inspection system is used to analyze and process the acquired photos to obtain the pin coplanarity of the IC chip.

Further, the first reflector on the left side, the second reflector on the left side, the third reflector on the left side, the isosceles triangular prism with base angles of 45 degrees, the first reflector on the right side, and the second reflector on the right side , The third reflector on the right is all stainless steel, and its reflective surface or imaging surface is processed by an ultra-precision grinding machine.

Further, a light barrier is provided between the left optical path and the right optical path to prevent optical signals from interfering with each other.

Further, the optical lens 111 is a telecentric lens.

A method for measuring coplanarity by an IC chip pin coplanarity measurement system with multi-level reflection and grating imaging, comprising steps:

Step 1. When the IC chip slides to the photoelectric sensor along the sliding guide rail, the external trigger synchronous control circuit 302 triggers the camera and the image acquisition card to capture the 256-level grayscale image of the IC chip pin that slides down, as the original processing data of the IC chip pin ;

Step 2, realizing the coarse positioning of the two rows of pins of the IC chip;

Step 3, intercept the region of interest, and create a sub-image of two rows of pins;

Step 4, carry out median filter respectively to two sub-images, eliminate noise signal;

Step 5. Perform target edge detection on the two sub-images respectively, and obtain edge feature signals of grating stripes and pins;

Step 6, using the average value of the gray level as the segmentation threshold of the image to segment the image to realize the binarization of the image;

Step 7. Precisely locate each pin and establish a sub-image of each pin;

Step 8, analyzing the sub-image of each pin, tracking the change of the grating stripe, and calculating the pixel distance of the maximum distortion of the grating stripe on each pin;

Step 9. According to the imaging accuracy designed by the vision system, calculate the physical distance of the maximum distortion of the grating stripes;

Step 10. Calculate the coplanarity error e ⁱ of each pin according to the functional relationship between the coplanarity error and the degree of distortion of the grating stripes, and count the calculated pin numbers. The corresponding function mapping relationship is expressed as:

$\begin{array}{c}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;</span>}\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; \&pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; \&gamma;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\end{array}<span\; class="notranslate">\; ,</span>$

f(ΔH)=max{f ₁ (ΔH),f ₂ (ΔH),...,f _N (ΔH)}-min{f ₁ (ΔH),f ₂ (ΔH),... ..., f _N (ΔH)}, where: f _i is the height deviation of the i-th pin of the IC chip, f _i is positive when the pin is shifted downward, and f _i is negative when the pin is shifted upward, K is the adjustment coefficient between the theoretical calculation value and the actual value, is the expected distance between the lower surface of the IC chip pin and the lower surface of the IC chip pin, ΔH is the height deviation, X _i is the bending degree of the grating stripe on the i-th pin of the IC chip, and d _i is the first i-th pin of the IC chip The maximum bending distance of the grating stripes on the i pins, α is the angle between the projected light on the lower surface of the IC chip pin and the vertical direction, and γ is the horizontal projected light reflected by the first reflector on the left or the first reflection on the right The angle of incidence on the mirror, f(ΔH) is the degree of coplanarity, and its value is the difference between the maximum value and the minimum value of the height deviation of the IC chip pins;

Step 11. Determine whether all the sub-images of the pins of the IC chip have been analyzed, and if so, calculate the maximum value of the coplanarity error of each pin e _max =max{e ₁ ,e ₂ ,...e _N } and the minimum value e _min = min{e ₁ , e ₂ ,...e _N }, if not, return to step 8 until all sub-images are analyzed;

Step 12. Determine whether the measured maximum value e _max and minimum value e _min of the coplanarity error are within the preset upper and lower limits of the coplanarity tolerance. If so, it is judged that the coplanarity is qualified; Face is not up to standard.

The invention transforms the measurement of the coplanarity of IC pins into the difference measurement of the line length after imaging by a CCD camera, and distorts and amplifies the extremely fine line difference images of the pins through a grating. By establishing the corresponding f-function relationship between the coplanarity error and the bending degree of the grating stripes, the measurement of the coplanarity of two rows of pins of the IC chip in the same field of view is realized. This method analyzes the bending degree of the grating stripes through an intelligent visual inspection system, and finally calculates the corresponding coplanarity error according to the corresponding function mapping relationship between the coplanarity error and the bending degree of the grating stripes. The corresponding function mapping relationship is expressed as:

$\begin{array}{c}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;</span>}\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; \&pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; \&gamma;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\end{array}<span\; class="notranslate">\; ,</span>$

f(ΔH)=max{f ₁ (ΔH),f ₂ (ΔH),...,f _N (ΔH)}-min{f ₁ (ΔH),f ₂ (ΔH),... ..., f _N (ΔH)}, where: f _i is the height deviation of the i-th pin of the IC, f _i is positive when the pin is shifted downward, and f _i is negative when the pin is shifted upward, K is the adjustment coefficient between the theoretical calculation value and the actual value, is the expected distance between the lower surface of the upper end of the IC pin and the lower surface of the IC pin, ΔH is the height deviation, X _i is the bending degree of the grating stripe on the i-th pin of the IC, d _i is the i-th pin of the IC The maximum bending distance of the grating stripes above, α is the angle between the projected light on the lower surface of the IC chip pin and the vertical direction, and γ is the incidence of the horizontal projected light on the left first reflector or the right first reflector horn. It is considered that the height deviation f _i is proportional to the degree of fringe curvature X _i . The more curved the fringes, the greater the coplanarity error. And the bending degree of the stripes is related to the maximum bending distance and the bending angle. The proportional coefficient K in the functional relationship expression is determined by the method of experimental calibration (that is, according to the design requirements, determine Obtain fringe d _i after imaging, actually measure to obtain projected light angle γ, contact measurement to obtain f _i , substitute into the above function mapping relationship expression to calculate K, and calculate the average value of K through multiple measurements). f(ΔH) is named as the degree of coplanarity, and its value is the difference between the maximum value and the minimum value of the height deviation of the IC chip pins.

In the present invention, the lower plane of the IC chip is used as the positioning plane. In order to make the same type of IC chips obtain grating stripes with basically the same bending degree, the IC chip cannot rotate along the X direction, cannot rotate along the Y direction, and cannot move along the Z direction during imaging.

The present invention must meet the following constraints: for each imaging of the CCD camera, the positions and angles of all lenses remain fixed, so that the light is projected onto the pins of the IC chip of the measured object in a fixed position and direction.

IC chip pin imaging optical path system composed of grating, multi-level mirror and isosceles prism: the light emitted by the light source falls on the pin of IC chip, based on the principle of light projection method, the reflected light from the lower surface of IC chip pin passes through With the multi-stage reflection of the multi-stage mirror, the images of the lower surfaces of the two columns of pins are respectively observed on both sides of the isosceles triangular prism. This is imaged by a CCD camera placed directly above the isosceles prism. That is: through a dedicated imaging optical path, the measurement of the coplanarity of the IC chip pins is converted into the length information in the image. On the basis of the above, a grating is added between the light source and the reflector to obtain a grating fringe image. If the coplanarity of the pins of the IC chip is good and the coplanarity error is small, the trend of the grating stripe curve is basically the same. Distorted and enlarged, it stands out against the grating stripes on adjacent pins.

IC chip self-weight oblique sliding feeding mechanism: The IC sliding mechanical transmission device uses the IC's own gravity as the power source. The entire mechanical device is arranged obliquely, and the IC chip moves linearly along the guide rail from top to bottom along the slope. Therefore, the surface roughness of the sliding guide rail is required to be small, so that the frictional force of the IC chip will be small when sliding. Since there is no additional power source, the entire mechanical structure is compact, and there is no vibration caused by power transmission, which is conducive to imaging. Especially when the depth of field of the lens is small, a clear image can also be obtained.

Photoelectric sensor and its external trigger synchronous control circuit: the IC chip moves linearly from top to bottom on the inclined slide rail. When the IC moves to the camera's set field of view, the photoelectric sensor responds and outputs a position sensing signal to the external trigger synchronization circuit. After the external trigger synchronization circuit processes the signal, it sends a trigger signal to the camera and the light source. Finally, the light source flashes briefly, and the camera snaps an image frame instantly. This strobe camera mode in motion can improve the speed of detection. And it solves the problem that the LED light source is difficult to dissipate heat in a narrow space.

PC-based intelligent visual inspection system: The grating stripes are imaged on the plane of the CCD camera, and the PC-based intelligent visual inspection system analyzes the grating stripe image, analyzes the maximum bending distance of the grating stripes on each pin, and The functional relationship between the error and the bending degree of the grating stripes, and finally obtain the coplanarity of the IC chip pins.

The system and method of the invention have the characteristics of novel detection method, intuitive measurement, fast detection speed, high detection precision, compact device structure and low equipment cost. Compared with the existing technology, it has the following characteristics and effects:

(1) The detection method is novel. The inventive device can transform the measurement of the coplanarity of IC pins into an intelligent measurement based on machine vision, and the coplanarity measurement of the pins is mapped on the image to the judgment of the distortion degree of the grating stripes of the pins.

(2) The detection speed is fast. Since the CCD camera can simultaneously image the optical signals of the pins on both sides of the IC chip each time, it only needs one imaging to complete the detection of the entire IC chip, so the detection speed is fast.

(3) High detection accuracy. Since the grating stripes can amplify the coplanar error of the IC chip pins, the measurement accuracy can be improved.

(4) The structure of the device is compact. The mechanical transmission device of the IC chip uses the self-weight of the IC chip itself as the power source, so no additional power device is needed. Therefore, the entire mechanical structure is compact in design and small in size.

(5) The equipment cost is low. Due to the single-camera imaging optical system. Therefore, the manufacturing cost of the device is low.

Description of drawings

Fig. 1 is a schematic diagram of the multi-stage reflection and grating imaging optical path of the imaging system of the present invention.

Fig. 2 is a schematic diagram of the main frame of the system of the present invention.

Fig. 3 is a schematic diagram of the external trigger synchronous control circuit of the present invention.

Fig. 4 is a schematic diagram of grating fringe imaging in the image acquisition system of the present invention.

Fig. 5 is a flow chart of the coplanarity measurement method of the present invention.

Fig. 6 is a geometric relationship diagram of grating fringe projection imaging of a single IC pin of the present invention.

The figure shows: 100-IC chip pin imaging optical system, 101-left blue LED light source, 102-left transmission grating, 103-left first reflector, 104-light barrier, 105-right second One reflector, 106-right transmission grating, 107-right blue LED light source, 108-right second reflector, 109-right third reflector, 110-CCD camera, 111-optical lens, 112-left Side third reflector, 113-left second reflector, 114-IC chip, 115-Mitsubishi mirror, 201-PC-based intelligent visual measurement system, 202-image acquisition card, 301-photoelectric sensor, 302-external trigger Synchronous control circuit, 303-IC chip self-weight oblique sliding feeding mechanism, 304-good and bad product classification device, 401-grating stripes, 601-vertical projection plane of curved stripes, 602-horizontal projection plane of grating stripes.

detailed description:

In order to better understand the present invention, the present invention will be further described below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

As shown in Figure 2, the system main framework of the present invention comprises: the IC chip pin imaging optical path system 100 that multi-mirror, grating and isosceles prism constitute, IC chip self-weight oblique sliding feeding mechanism 303, image acquisition card 202, An imaging unit composed of a CCD camera 110 and a lens 111 , a PC-based intelligent visual measurement system 201 , an external trigger synchronous control circuit 302 , and a product classification device 304 for superior and inferior products.

As shown in Figure 1, it is a dedicated optical path system proposed by the present invention: an IC chip pin imaging optical path system 100, the left optical path of the IC chip pin imaging optical path system 100 includes: the left optical path includes a left blue LED light source 101, the left side transmission grating 102, the first reflection mirror 103 on the left side, the second reflection mirror 113 on the left side, the third reflection mirror 112 on the left side and the left half of the isosceles triangular prism 115 whose base angles are 45 degrees, the The light from the left blue LED light source 101 passes through the left transmission grating 102 in parallel from left to right, and then is reflected by the first left reflector 103 installed perpendicular to the YZ plane and at an angle (90°-γ) to the XY plane. Finally, the light is obliquely irradiated on the lower surface of the IC chip pin; the second reflector 113 on the left side is arranged at an angle of 45 degrees, so that after the diffuse reflection light from the IC chip pin is reflected, it shoots vertically upward again and is arranged at 45 degrees. The third reflection mirror 112 on the left side, after the light reflected by the third reflection mirror 112 is horizontally emitted from left to right, it is irradiated on the left side of the isosceles triangular prism 115, and the image formed by the optical signal is finally on the left side of the isosceles triangular prism 115 The side can be observed.

The right optical path and the left optical path are independent of each other, do not interfere with each other, and form a symmetrical relationship in position. Its optical path components include: right blue LED light source 107, right transmission grating 106, right first reflector 105, right second reflector 108, right third reflector 109, two base angles of 45 degrees, etc. The right half of the waist triangular prism 115, the light from the right blue LED light source 107 passes through the right transmission grating 106 in parallel from right to left, and is installed perpendicular to the YZ plane and at an angle of (90°-γ) to the XY plane After being reflected by the first reflector 105 on the right side, the light is vertically and evenly irradiated on the lower surface of the IC chip pin; , shoot vertically upward again to the right third reflecting mirror 109 arranged at 45 degrees, after the light reflected by the third right reflecting mirror 109 is horizontally emitted from right to left, it is irradiated on the right side of the isosceles triangular prism 115, and then vertically upward reflected to the camera. The transmission process of the optical signal is exactly the same as that of the left optical path. Finally, the image formed by the right optical signal is observed on the right side of the isosceles prism 115 .

All the above-mentioned optical components are made of stainless steel, and all reflective surfaces or imaging surfaces need to be processed by ultra-precision grinding machines, so as to present a mirror effect and be firmly installed in the narrow imaging space.

The CCD camera 110 and the optical lens 111 are installed vertically directly above the isosceles prism 115, and one imaging can complete the image acquisition of two rows of pins of the IC chip.

The IC chip 114 to be detected is located on the sliding rail of the IC chip's self-weight oblique sliding feed mechanism 303, and the light barrier 104 is below; the IC chip 114 slides obliquely along the sliding rail from top to bottom with its own gravity, and its lower surface serves as a positioning surface and stick to the upper surface of the slide rail. The sliding rail restricts three degrees of freedom of the IC chip 114 , namely: X-direction rotation, Y-direction rotation and Z-direction movement. As shown in FIG. 3 , when the IC chip 114 moves above the photoelectric sensor 301 , the external trigger synchronous control circuit 302 acquires the rising edge of the position signal. After the position signal is correspondingly processed, an external trigger capture signal is sent to the image acquisition card 202, which realizes rapid acquisition of IC chip pin images during motion.

The black stripes of each transmission grating are projected on the lower surface of the IC chip pins. The difference in the height direction of the lower surface of the pin will cause different degrees of distortion of the grating stripes after imaging. As shown in FIG. 4 , the grating stripes 401 corresponding to the portion where the pin height remains constant are straight line segments, while the grating stripes 401 corresponding to the arc transition portion of the pin are curve segments with a smooth transition. For pins with small coplanarity errors, the maximum bending distance of the grating stripes is almost equal; The distance d is smaller than the correct situation, and the grating stripes 401 are bent in a clockwise direction to form a certain positive angle of θ bending; as shown in Figure 4, the eighth pin in the first row is a downward bent pin, and The coplanarity error is also large, the maximum bending distance d is larger than normal, and the grating stripes 401 are bent counterclockwise to form a certain negative angle of θ bending. Calibration is performed before the measurement, and the f-function correspondence relationship between the coplanarity error and the degree of distortion of the grating stripes 401 is established. It can be quantitatively analyzed in the measurement to obtain the coplanarity error of the pins.

As shown in Figure 5, taking two rows of 16 pins as an example, according to the IC chip pin coplanarity measurement method of multi-level reflection and grating imaging proposed by the present invention, the coplanarity of two rows of pins is completed according to the following steps Detection, especially the detection of upturned and downturned pins, includes steps:

Step S501, when the IC chip slides to the photoelectric sensor along the sliding guide rail, the external trigger synchronous control circuit triggers the camera and the image acquisition card to capture the 256-level grayscale image of the IC chip pin that slides down, as the original processing data of the IC chip pin;

Step S502, realizing rough positioning of the two rows of pins of the IC chip;

Step S503, intercepting the region of interest, and establishing sub-images of two rows of pins;

Step S504, respectively performing median filtering on the two sub-images to eliminate noise signals;

Step S505, performing target edge detection on the two sub-images respectively, and obtaining edge feature signals of grating stripes and pins;

Step S506, segmenting the image by using the average value of the gray level as the segmentation threshold of the image to realize the binarization process of the image;

Step S507, accurately positioning each pin, and establishing a sub-image of each pin;

Step S508, analyzing the sub-image of each pin, tracking the changes of the grating stripes, and calculating the pixel distance of the maximum distortion of the grating stripes on each pin;

Step S509, according to the imaging accuracy designed by the vision system, calculate the physical distance of the maximum distortion of the grating stripes;

Step S510: Calculate the coplanarity error e _i of each pin according to the functional relationship between the coplanarity error and the degree of distortion of the grating stripes, and count the calculated pin numbers. The corresponding function mapping relationship is expressed as:

$\begin{array}{c}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&Delta;</span>}\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{\mathrm{<span\; class="notranslate">\; the\; tan</span>}<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; \&pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; \&gamma;</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>\end{array}<span\; class="notranslate">\; ,</span>$

f(ΔH)=max{f ₁ (ΔH),f ₂ (ΔH),...,f _N (ΔH)}-min{f ₁ (ΔH),f ₂ (ΔH),... ...,f _N (ΔH)} Among them: f _i is the height deviation of the i-th pin of the IC, f _i is positive when the pin is shifted downward, and f _i is negative when the pin is shifted upward. K is the adjustment coefficient between the theoretical calculation value and the actual value, is the expected distance between the lower surface of the upper end of the IC pin and the lower surface of the IC pin, ΔH is the height deviation, X _i is the bending degree of the grating stripe on the i-th pin of the IC, d _i is the i-th pin of the IC The maximum bending distance of the grating stripes above, α is the angle between the projected light on the lower surface of the IC chip pin and the vertical direction, and γ is the horizontal projected light on the left first reflector 103 or the right first reflector 105 angle of incidence. It is considered that the height deviation f _i is proportional to the degree of fringe curvature X _i . The more curved the fringes, the greater the coplanarity error. And the bending degree of the stripes is related to the maximum bending distance and the bending angle. The proportional coefficient K in the functional relationship expression is determined by the method of experimental calibration (that is, according to the design requirements, determine Obtain fringe d _i after imaging, actually measure the angle γ of projected light, obtain f _i by contact measurement, substitute the above function mapping relationship expression to calculate K, and calculate the average value of K through multiple measurements), and name f(ΔH) is the coplanarity, and its value is the difference between the maximum value and the minimum value of the height deviation of the pins of the IC chip. The specific derivation process of the function mapping relation formula is shown in FIG. 6 . From the geometric relationship of the grating stripe projection imaging of a single IC pin, we can know the process of the transformation from straight stripes to curved stripes. At the same time, the vertical projection plane 601 of the curved stripes can vividly reflect the bending causes of the stripes. The angle of inclination of the horizontal projection plane 602 of the grating stripes is 90°-γ, and its size will affect the degree of bending of the stripes, where N-N' is the projection light at The normal on the left first reflector 103;

Step S511, determine whether all pin sub-images of the IC chip have been analyzed, and if so, calculate the maximum value of the coplanarity error of each pin e _max =max{e ₁ ,e ₂ ,...e _N } and the minimum value e _min = min{e ₁ , e ₂ ,...e _N }, if not, return to step 8 until all sub-images are analyzed;

Step S512. Determine whether the measured maximum value e _max and minimum value e _min of the coplanarity error are within the preset upper and lower limits of the coplanarity tolerance. If so, it is judged that the coplanarity is qualified; Face is not up to standard.

The qualified coplanarity products and the unqualified coplanarity products distinguished through the above steps are placed separately by the good and bad product classification device 304 to meet the needs of subsequent processing.

The above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, rather than limiting the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. All modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the claims of the present invention.

Claims (7)

1. the IC chip pin coplanarity measuring system of higher order reflection and grating image, mainly comprise IC chip to conduct oneself with dignity oblique slip feeding mechanism (303), external trigger synchronization control circuit (302), IC chip pin imaging optical path system (100), image pick-up card (202), camera, the intelligent visual detection system (201) of Based PC, photoelectric sensor (301), it is characterized in that:

Described IC chip pin imaging optical path system (100) comprises symmetrical left side light path and right side light path, described left side light path comprises left side blue light LED light source (101), left side transmission grating (102), left side the first catoptron (103), left side the second catoptron (113), left side the 3rd catoptron (112) and two base angles are the left-half of the isosceles prism (115) of 45 degree, the light in described left side blue light LED light source (101) from left to right parallel be emitted through left side transmission grating (102) after, after the reflection of left side first catoptron (103), be radiated at the lower surface of IC chip pin Ray obliquity, left side the second catoptron (113) is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange left side the 3rd catoptron (112), left side the 3rd catoptron (112) reflection ray from left to right level injection after, be radiated at the left side of isosceles prism (115), then vertically upward reflex to video camera,

Described right side light path comprises: right side blue light LED light source (107), right side transmission grating (106), right side first catoptron (105), right side second catoptron (108), right side the 3rd catoptron (109), two base angles are the right half part of the isosceles prism (115) of 45 degree, the light on described right side blue light LED light source (107) is parallel is from right to left emitted through right side transmission grating (106), after the reflection of right side first catoptron (105), be radiated at the lower surface of IC chip pin Ray obliquity; Right side the second catoptron (108) is arranged with miter angle, after diffuse light from IC chip pin is reflected, again vertically upward directive with 45 degree arrange right side the 3rd catoptron (109), right side the 3rd catoptron (109) reflection ray from right to left level injection after, be radiated at the right side of isosceles prism (115), then vertically upward reflex to video camera;

Described video camera comprises CCD camera (110) and optical lens (111), be vertically mounted on directly over isosceles prism (115) symmetrical center line, this video camera central axis upright in IC chip conduct oneself with dignity oblique slip feeding mechanism (303) rail plate and overlap with the central plane of IC chip pin imaging optical path system (100);

Described IC chip oblique slip feeding mechanism (303) of conducting oneself with dignity is positioned at the rail plate central axis of the oblique slip feeding mechanism (303) and this IC chip is conducted oneself with dignity immediately below isosceles prism (115) in the central plane of IC chip pin imaging optical path system (100);

Described photoelectric sensor (301) is vertically mounted on IC chip and conducts oneself with dignity in the rail plate of oblique slip feeding mechanism (303), be positioned at the left margin place of camera field of view, when IC chip (114) slip over guide rail pass through IC chip pin imaging optical path system (100) time, photoelectric sensor (301) outwards triggering synchronous control circuit (302) sends position signalling, this signal after treatment, to image pick-up card (202) and left side blue light LED light source (101), right side blue light LED light source (107) sends imaging signal, light source is glittering, simultaneous camera is taken pictures instantaneously, take a picture and be sent to the intelligent visual detection system (201) with Based PC through figure capture card (202), the intelligent visual detection system (201) of described Based PC is for carrying out analyzing and processing to obtain IC chip pin coplane degree by the photo of acquisition.

2. the IC chip pin coplanarity measuring system of higher order reflection according to claim 1 and grating image, it is characterized in that: described left side first catoptron (103), left side second catoptron (113), left side the 3rd catoptron (112) and two base angles are that isosceles prism (115), right side first catoptron (105), right side second catoptron (108), the right side the 3rd catoptron (109) of 45 degree is stainless steel, and its reflecting surface or imaging surface all process through ultra-precision grinding machine.

3. the IC chip pin coplanarity measuring system of higher order reflection according to claim 2 and grating image, is characterized in that: be provided with between described left side light path and right side light path prevent light signal from interfering with each other every tabula rasa (104).

4. the IC chip pin coplanarity measuring system of higher order reflection according to claim 3 and grating image, is characterized in that: described optical lens (111) is telecentric lens.

5. adopt the IC chip pin coplanarity measuring system of the higher order reflection described in any one of claim 1-4 kind and grating image to carry out a method for coplane degree measurement, comprise step:

Step 1, when IC chip slides to photoelectric sensor along rail plate, external trigger synchronization control circuit (302) toggling camera and image pick-up card capture slide and under IC chip pin 256 grades of gray level images, as the original process data of IC chip pin;

Step 2, realize the coarse positioning that IC chip two arranges pin;

Step 3, intercepting area-of-interest, set up the subimage of two row's pins;

Step 4, respectively medium filtering is carried out to two subimages, stress release treatment signal;

Step 5, respectively object edge detection is carried out to two subimages, obtain the edge feature signal of grating fringe and pin;

Step 6, employing average gray, as the segmentation threshold segmentation image of image, realize the binary conversion treatment of image;

Step 7, each pin accurately to be located, set up the subimage of each pin;

Step 8, analyze the subimage of each pin, follow the tracks of the change of grating fringe, calculate the pixel distance of the maximum distortion of grating fringe on each pin;

Step 9, imaging precision according to Design of Vision System, calculate the physical distance of the maximum distortion of grating fringe;

Step 10, the funtcional relationship corresponding with the degreeof tortuosity of grating fringe according to coplane degree error, calculate the coplane degree error e of each pin _i, and add up calculated pin number, respective function mapping relations are expressed as:

$\begin{array}{c}{f}_i\left(\mathrm{\&Delta;}H\right)=k\&CenterDot;\left(X_i\left(H\right)-\stackrel{\&OverBar;}{H}\right)\\ =k\&CenterDot;\left(\frac{d_i}{\tan \left(\mathrm{\&alpha;}\right)}-\stackrel{\&OverBar;}{H}\right)\\ =k\&CenterDot;\left(\frac{d_i}{\tan \left(\frac{\mathrm{\&pi;}}{2}-2\&CenterDot;\mathrm{\&gamma;}\right)}-\stackrel{\&OverBar;}{H}\right)\end{array},$

f(ΔH)＝max{f ₁(ΔH),f ₂(ΔH),......,f _N(ΔH)}-min{f ₁(ΔH),f ₂(ΔH),......,f _N(ΔH)}，

Wherein: f _ifor the height tolerance of IC chip i-th pin, if f when offseting under pin _ifor just, f when pin offsets _ibe negative, K is the regulation coefficient of calculated value and actual value, for the desired distance of the upper end lower surface of IC chip pin and the lower end lower surface of IC chip pin, Δ H is height tolerance, X _ifor the grating fringe degree of crook on IC chip i-th pin, d _ifor the maximum deflection distance of the grating fringe on IC chip i-th pin, α is the throw light of IC chip pin lower surface and the angle of vertical direction, γ is the incident angle of horizontal throw light on left side first catoptron (103) or right side first catoptron (105), f (Δ H) is coplane degree, and its numerical value is the difference of the maxima and minima of the height tolerance of IC chip pin;

Whether all pin subimages of step 11, judgement IC chip are all analyzed complete, if so, then obtain the maximal value e of the coplane degree error of each pin _max=max{e ₁, e ₂... e _nand minimum value e _min=min{e ₁, e ₂... e _n, if not, then return step 8, until all subimages are analyzed complete;

Step 12, judge measured by the maximal value e of coplane degree error _maxwith minimum value e _minwhether within the scope of the coplane degree tolerance bound preset, be if so, then judged as that coplane degree is qualified, otherwise, for coplane degree is defective.

6. the IC chip pin coplanarity measuring method of higher order reflection according to claim 5 and grating image, it is characterized in that: described video camera is when capturing the pin gray level image of IC chip, the lower surface of rail plate is adjacent to as locating surface using IC chip, the rotation of described rail plate restriction IC chip X-direction, the rotation of Y-direction, the movement of Z-direction.

7. the IC chip pin coplanarity measuring method of higher order reflection according to claim 6 and grating image, it is characterized in that: described pin comprises and upwarps pin, normal pins and lower curved pin, after grating image, upwarp the grating fringe distortion along clockwise direction on pin, and in vertical direction with certain positive angle; Grating fringe distortion in the counterclockwise direction on lower curved pin, and in vertical direction with certain negative angle; Grating fringe on normal pins and the angle of vertical direction are zero, and, the grating fringe maximum deflection distance upwarped on pin is less than the grating fringe maximum deflection distance of normal pins, and the grating fringe maximum deflection distance on described lower curved pin is greater than the grating fringe maximum deflection distance of normal pins.