CN103345238B - Voltage output circuit with configurable network - Google Patents

Abstract

A network configurable voltage output circuit belongs to the technical field of electronic circuits. It solves the problem that the existing voltage output circuit cannot realize remote debugging and the configuration content cannot be modified remotely. The data input and output terminals of the network interface of the present invention are connected to the data input and output terminals of the network control circuit, the No. 2 data input and output terminals of the network control circuit are connected to the data input and output terminals of the single-chip circuit, and the No. 2 data input and output terminals of the single-chip circuit are connected to the FPGA The data input and output terminals of the control circuit, the address signal output terminal of the single-chip circuit is connected to the address signal input terminal of the FPGA control circuit, the write signal output terminal of the single-chip circuit is connected to the write signal input terminal of the FPGA control circuit, and the voltage control signal output of the FPGA control circuit is connected to the voltage The signal input end is connected to the voltage control signal input and the voltage signal output end of the voltage output circuit. The invention is applicable to the technical field of electronic circuits.

Description

Network configurable voltage output circuit

technical field

The invention belongs to the technical field of electronic circuits.

Background technique

Generalization is the development trend of modular design, and one of its key technologies is the application of network technology. The emergence of network technology represented by the Internet and its combination with other high-tech has not only brought intelligent Internet products into modern life, but also brought unprecedented development space and opportunities for measurement and instrument technology. Measurement technology and network-enabled devices have emerged. The application of network technology has greatly improved the flexibility of equipment control, but the existing voltage output circuit cannot be remotely debugged and the configuration content cannot be remotely modified.

Contents of the invention

In order to solve the problem that the existing voltage output circuit cannot realize remote debugging and configuration content cannot be modified remotely, the present invention proposes a network configurable voltage output circuit.

The network configurable voltage output circuit of the present invention includes a network interface, a network control circuit, a single-chip microcomputer circuit, an FPGA control circuit, an external memory and a voltage output circuit;

The data input and output terminals of the network interface are connected to the data input and output terminals of the network control circuit, the No. 2 data input and output terminals of the network control circuit are connected to the data input and output terminals of the single-chip circuit, and the No. 2 data input and output terminals of the single-chip circuit are connected to the FPGA control circuit data Input and output terminals, the address signal output terminal of the single-chip circuit is connected to the address signal input terminal of the FPGA control circuit, the write signal output terminal of the single-chip circuit is connected to the write signal input terminal of the FPGA control circuit, and the read signal output terminal of the single-chip circuit is connected to the FPGA control circuit. Read the signal input end, the voltage control signal output of the FPGA control circuit and the voltage signal input end are connected to the voltage control signal input and the voltage signal output end of the voltage output circuit; The control circuit realizes the control of the output voltage of the voltage output circuit, and finally realizes the remote control of the output voltage and the remote modification of the configuration content

Description of drawings

FIG. 1 is a schematic structural diagram of a network configurable voltage output circuit according to the present invention;

FIG. 2 is a schematic diagram of state machine jumps described in Embodiment 3;

FIG. 3 is a schematic structural diagram of the FPGA control circuit described in the second embodiment.

Detailed ways

Specific Embodiments 1. This embodiment is described in conjunction with FIG. 1. The network configurable voltage output circuit described in this embodiment includes a network interface 1, a network control circuit 2, a single-chip microcomputer circuit 3, an FPGA control circuit 4 and a voltage output circuit 6. ;

The data input and output terminals of the network interface 1 are connected to the data input and output terminals of the network control circuit 2, the No. 2 data input and output terminals of the network control circuit 2 are connected to the data input and output terminals of the microcontroller circuit 3, and the No. 2 data input and output terminals of the microcontroller circuit 3 Connect the data input and output ends of the FPGA control circuit 4, the address signal output end of the single-chip microcomputer circuit 3 is connected to the address signal input end of the FPGA control circuit 4, the write signal output end of the single-chip microcomputer circuit 3 is connected to the write signal input end of the FPGA control circuit 4, and the single-chip microcomputer circuit 3 The read signal output end of the FPGA control circuit 4 is connected to the read signal input end of the FPGA control circuit 4, and the voltage control signal output and the voltage signal output end of the FPGA control circuit 4 are connected to the voltage control signal input and the voltage signal input end of the voltage output circuit 6.

The debugging of the circuit described in this embodiment is convenient, and it only needs to be connected with a personal computer through a network cable, and the user can conveniently control and configure the functions of the circuit.

Specific embodiment two, this embodiment is described in conjunction with Fig. 2, and this embodiment is a further description of the network configurable voltage output circuit described in the specific embodiment one, FPGA control circuit 4 is made up of decoding module and DAC control module;

The No. 2 data input and output terminal of the single-chip circuit 3 is connected to the data input and output terminal of the decoding module 4-1, the address signal output terminal of the single-chip circuit 3 is connected to the address signal input terminal of the decoding module 4-1, and the write signal output of the single-chip circuit 3 End connects decoding module (4-1) write signal input end, the reading signal output end of single-chip circuit 3 connects the reading signal input end of decoding module 4-1, the decoding signal output of decoding module 4-1 and coding signal The input end is connected to the decoding signal input and the encoding signal output end of the DAC control module 4-2; the data selection signal output end of the DAC control module 4-2 is connected to the data selection signal input end of the voltage output circuit 6, and the DAC control module 4-2 The serial data output end of the DAC control module 4-2 is connected to the serial data input end of the voltage output circuit 6, the update voltage channel signal output end of the DAC control module 4-2 is connected to the update voltage channel signal input end of the voltage output circuit 6, and the DAC control module 4-2 The loading DAC buffer register signal output end of the voltage output circuit 6 is connected to the loading DAC buffer register signal input end of the voltage output circuit 6, the enable signal output end of the DAC control module 4-2 is connected to the enable signal input end of the voltage output circuit 6, and the DAC control module 4 The specific channel number signal output terminal of -2 is connected to the specific channel number signal input terminal of the voltage output circuit 6, and the channel selection signal output terminal of the DAC control module 4-2 is connected to the voltage output circuit 6 selection channel number signal input terminal.

The FPGA communicates with the microcontroller circuit through the data line DATA, the address line ADDR, and the read and write control lines RD and WR. The single-chip microcomputer circuit is responsible for receiving and sending network data to the address line. The decoding logic stores the data on the data line into the configuration register when the write signal is valid according to the input address signal. Similarly, according to the address and read signal, the configuration The data in the register is passed to the microcontroller circuit.

Specific embodiment three, this embodiment is a further description of the network configurable voltage output circuit described in specific embodiment two, the circuit also includes an external memory 5, and the external data signal input and output terminals of the FPGA control circuit 4 are connected to the external memory 5 read and write signal terminal.

The FPGA control circuit performs functional configuration on the network data extracted by the single-chip circuit through the decoding logic, stores the configuration information in the external memory, and controls the analog voltage output.

Embodiment 4. This embodiment is described in conjunction with FIG. 3. This embodiment is a further description of the network configurable voltage output circuit described in Embodiment 2. The DAC control module 4-2 implements logic control by using state machine jumps , the state machine includes 4 states: idle state, selection state, control state machine and parallel-to-serial state; idle state, DAC control module 4-2 is reset, when detecting start conversion signal Startflag==1&&Start= =1, jump to the data selection state;

Data selection state, the data selection state selects the voltage channel number according to the voltage channel selection signal decoded by the decoding module 4-1, when the selection of the specific channel number is detected, the state machine jumps to the parallel to serial state;

Parallel to serial state, converting parallel data to serial output, when the serial output is detected, the state machine jumps to the control state;

Control state, output voltage channel update signal and load DAC buffer register signal, change the output channel number, when all channels are detected to output the command Start==0, the state machine jumps to the idle state, otherwise jumps to the data selection state.

Embodiment 5. This embodiment is a further description of the network configurable voltage output circuit described in Embodiment 1. The single-chip microcomputer circuit 3 is realized by an AVR single-chip microcomputer circuit ATmega128.

Embodiment 6. This embodiment is a further description of the network configurable voltage output circuit described in Embodiment 1. The network control circuit 2 is implemented using a W5100 chip.

The network control circuit uses W5100 to realize the transmission and extraction of network protocol data, that is, to realize the TCP/IP protocol; the single-chip circuit is responsible for reading the network data from the data buffer of W5100 and sending it to FPGA, and at the same time, it can also send the data to External network.

The communication between the single-chip circuit and W5100 is realized by the SPI interface of the single-chip circuit. After the single-chip circuit is started, each port is initialized first, including the SPI interface, and then the registers of the W5100 chip are configured, including the physical address of the device, the default gateway, and the subnet mask. , used to realize the physical connection of network devices.

The data interaction between the microcontroller circuit and the FPGA uses eight-bit data lines, address lines, and read and write control signal lines, and the bus is decoded by the FPGA control circuit to realize data interaction. In addition to the bus decoding logic, the FPGA control circuit also includes external memory control logic and voltage output control logic.

After the MCU is powered on, the MCU is initialized, and the W5100 chip is initialized by controlling the SPI interface, including physical address, gateway, subnet mask, IP address settings, and Socket settings used. Then by judging the internal interrupt type of the W5100 interrupt register, the single-chip microcomputer performs the corresponding operation.

Claims (5)

1. voltage output circuit with configurable network, this circuit comprises network interface (1), network control circuit (2), single chip circuit (3), FPGA control circuit (4) and voltage follower circuit (6);

The data input/output terminal of data input/output terminal interconnection network control circuit (2) of network interface (1), two number input/output terminals of network control circuit (2) connect the data input/output terminal of single chip circuit (3), two number input/output terminals of single chip circuit (3) connect FPGA control circuit (4) data input/output terminal, the address signal output terminal of single chip circuit (3) connects the address signal input end of FPGA control circuit (4), the write signal output terminal of single chip circuit (3) connects FPGA control circuit (4) write signal input end, the read signal output terminal of single chip circuit (3) connects the read signal input end of FPGA control circuit (4), the voltage control signal of FPGA control circuit (4) exports the voltage control signal being connected voltage follower circuit (6) with voltage signal output end and inputs and voltage signal inputs,

It is characterized in that, FPGA control circuit (4) is made up of decoding module (4-1) and DAC control module (4-2), two number input/output terminals of single chip circuit (3) connect decoding module (4-1) data input/output terminal, the address signal output terminal of single chip circuit (3) connects the address signal input end of decoding module (4-1), the write signal output terminal of single chip circuit (3) connects decoding module (4-1) write signal input end, the read signal output terminal of single chip circuit (3) connects the read signal input end of decoding module (4-1), the decoded signal of decoding module (4-1) exports the decoded signal being connected DAC control module (4-2) with coded signal input end and inputs and coded signal output terminal, the data select signal output terminal of DAC control module (4-2) connects the data select signal input end of voltage follower circuit (6), the serial data output terminal of DAC control module (4-2) connects the serial data input of voltage follower circuit (6), the renewal voltage channel signal output part of DAC control module (4-2) connects the renewal voltage channel signal input part of voltage follower circuit (6), the loading DAC cache register signal output part of DAC control module (4-2) connects the loading DAC cache register signal input part of voltage follower circuit (6), the enable signal output terminal of DAC control module (4-2) connects the enable signal input end of voltage follower circuit (6), the concrete channel number signal output part of DAC control module (4-2) connects the concrete channel number signal input part of voltage follower circuit (6), the selector channel signal output part of DAC control module (4-2) connects voltage follower circuit (6) selector channel signal input part.

2. voltage output circuit with configurable network according to claim 1, it is characterized in that, described voltage follower circuit also comprises external memory storage (5), and the external data signal input/output terminal of FPGA control circuit (4) connects the read-write end of external memory storage (5).

3. voltage output circuit with configurable network according to claim 2, it is characterized in that, DAC control module adopts the redirect of state machine to realize logic control, and described state machine comprises 4 states: idle condition, selection mode, state of a control machine and parallelly turn serial presence;

Idle condition, resets to DAC control module, when beginning switching signal Startflag==1 & & Start==1 being detected, jumps to data selection state;

Data selection state, the voltage channel that data selection state obtains according to decoding module decoding selects signal, selects voltage channel number, and when the concrete channel number of detection has been selected, state machine jumps to walk abreast and turns serial presence;

Walk abreast and turn serial presence, parallel data is converted to Serial output, and after detecting that Serial output completes, state machine jumps to state of a control;

State of a control, output voltage passage update signal and loading DAC cache register signal, change output channel number, after all passages of detection export complete order Strart==0, state machine jumps to idle condition, otherwise jumps to data selection state.

4. voltage output circuit with configurable network according to claim 1, is characterized in that, single chip circuit (3) adopts AVR single chip ATmega128 to realize.

5. voltage output circuit with configurable network according to claim 1, is characterized in that, network control circuit (2) adopts W5100 chip to realize.