CN103346669A

CN103346669A - Boost power factor correction (PFC) converter adopting small-capacity long-service-life energy-storage capacitor

Info

Publication number: CN103346669A
Application number: CN2013103042124A
Authority: CN
Inventors: 姚凯; 阮新波
Original assignee: Nanjing University of Science and Technology
Current assignee: Nanjing University of Science and Technology
Priority date: 2013-07-18
Filing date: 2013-07-18
Publication date: 2013-10-09
Anticipated expiration: 2033-07-18
Also published as: CN103346669B

Abstract

The invention discloses a Boost PFC converter adopting a small-capacity long-life energy storage capacitor, comprising a main power circuit and a control circuit, the energy storage capacitor in the main power circuit is a small-capacity long-life capacitor, and the control circuit Including differential sampling phase shifting circuit, rectification circuit, peak sampling circuit, addition and subtraction circuit, output voltage feedback control circuit, multiplier, PFC chip and switch tube drive circuit. The instantaneous input power and output power are controlled and balanced by the simple harmonic current injection method, which can reduce the capacitance of the energy storage capacitor under the requirement of ensuring the input power factor, so that the converter can use other types of capacitors such as film capacitors or ceramic capacitors. Chip capacitors and other small-capacity and long-life capacitors replace electrolytic capacitors, which overcome the obvious defects of large volume and short service life in the traditional use of electrolytic capacitors as energy storage capacitors, and have the advantages of significantly improving the power density of the power supply and extending the life of the converter.

Description

Boost PFC Converter Using Small Capacity and Long Life Energy Storage Capacitor

技术领域technical field

本发明涉及电能变换装置的交流-直流变换器领域，特别是一种采用小容量长寿命储能电容的Boost PFC变换器。The invention relates to the field of AC-DC converters of electric energy conversion devices, in particular to a Boost PFC converter using small-capacity and long-life energy storage capacitors.

背景技术Background technique

随着电力电子技术的发展，对电源的要求越来越高，在矿山、潜水、抢险、军用装置、城市景观照明及大屏幕显示等场合，除了要求高效率、高输入功率因数、高功率密度外，还必须具有长寿命的优点。这些电源必须具有PFC（功率因数校正）功能。传统的Boost PFC变换器采用电解电容作为储能电容来平衡瞬时输入功率和输出功率，虽然电解电容具有耐压高、容值大的特点，但其体积较大，影响电源功率密度的进一步提高，并且，电解电容寿命只有几千小时，严重影响了电源的长寿命要求，制约着电源技术的发展。With the development of power electronics technology, the requirements for power supply are getting higher and higher. In mines, diving, emergency rescue, military installations, urban landscape lighting and large-screen display, in addition to requiring high efficiency, high input power factor, and high power density In addition, it must also have the advantage of long life. These power supplies must have PFC (Power Factor Correction) functionality. Traditional Boost PFC converters use electrolytic capacitors as energy storage capacitors to balance instantaneous input power and output power. Although electrolytic capacitors have the characteristics of high withstand voltage and large capacitance, their large volume affects the further improvement of power density. Moreover, the life of electrolytic capacitors is only a few thousand hours, which seriously affects the long life requirements of the power supply and restricts the development of power supply technology.

发明内容Contents of the invention

本发明的目的是为了提供一种采用小容量长寿命储能电容的Boost PFC变换器，在保证输入功率因数的要求下，提高电源功率密度、延长电源寿命。The purpose of the present invention is to provide a Boost PFC converter using a small-capacity and long-life energy storage capacitor, which can improve the power density of the power supply and prolong the life of the power supply under the requirement of ensuring the input power factor.

实现本发明目的的技术解决方案为：一种采用小容量长寿命储能电容的Boost PFC变换器，包括主功率电路和控制电路，所述主功率电路包括输入电压源v_in、EMI滤波器、二极管整流电路RB、Boost电感L_b、第一电阻R₁、第二电阻R₂、第三电阻R₃、开关管Q、二极管D_b、小容量储能电容C_B、负载R_Ld，其中输入电压源v_in与EMI滤波器的输入端口连接，EMI滤波器的输出端口与二极管整流电路RB的输入端口连接，二极管整流电路RB的输出负极为参考电位零点，二极管整流电路RB的输出正极与Boost电感L_b的一端连接，Boost电感L_b的另一端分别与开关管Q的漏极及二极管D_b的阳极连接，开关管Q的源极与第三电阻R₃的一端连接，第三电阻R₃的另一端与参考电位零点连接，二极管D_b的阴极分别与储能电容C_B的阳极及负载R_Ld的一端连接，储能电容C_B的阴极及负载R_Ld的另一端均与参考电位零点连接，其中储能电容C_B为小容量长寿命电容，第一电阻R₁与第二电阻R₂串联后接在二极管整流电路RB的输出端正、负极之间；所述储能电容C_B为小容量长寿命电容；所述控制电路包括差分采样移相电路、整流电路、峰值取样电路、加减法电路、输出电压反馈控制电路、乘法器、PFC芯片及开关管驱动电路，所述差分采样移相电路的输出端D与整流电路的输入端连接，整流电路的输出端I分别接入峰值取样电路的输入端和加减法电路的第一输入端，加减法电路的第二输入端与主功率电路中第一电阻R₁和第二电阻R₂的连接点G连接，峰值取样电路的输出端H与加减法电路的第三输入端连接，加减法电路的输出端K与乘法器的一个输入端v_x连接，主功率电路的输出电压V_o经第二十电阻R₂₀和第二十一电阻R₂₁的分压点与输出电压反馈控制电路的输入端L连接，输出电压反馈控制电路的输出端M与乘法器的另一个输入端v_y连接，乘法器的输出端与PFC芯片及开关管驱动电路的输入端连接，PFC芯片及开关管驱动电路的输出端与主功率电路中开关管Q的门极相连。The technical solution to realize the object of the present invention is: a Boost PFC converter that adopts a small-capacity long-life energy storage capacitor, including a main power circuit and a control circuit, and the main power circuit includes an input voltage source v _in , an EMI filter, Diode rectifier circuit RB, Boost inductor L _b , first resistor R ₁ , second resistor R ₂ , third resistor R ₃ , switch tube Q, diode D _b , small-capacity energy storage capacitor C _B , load R _Ld , where the input The voltage source v _in is connected to the input port of the EMI filter, the output port of the EMI filter is connected to the input port of the diode rectification circuit RB, the output cathode of the diode rectification circuit RB is the reference potential zero point, and the output anode of the diode rectification circuit RB is connected to the Boost One end of the inductance L _b is connected, the other end of the Boost inductance L _b is respectively connected to the drain of the switching tube Q and the anode of the diode D _b , the source of the switching tube Q is connected to one end of the third resistor _R3 , and the third resistor R The other end of ₃ is connected to the zero point of the reference potential, the cathode of the diode D _b is respectively connected to the anode of the energy storage capacitor C _B and one end of the load R _Ld , and the cathode of the energy storage capacitor C _B and the other end of the load R _Ld are both connected to the reference potential Zero-point connection, wherein the energy storage capacitor C _B is a small-capacity long-life capacitor, and the first resistor _R1 and the second resistor _R2 are connected in series between the positive and negative electrodes of the output terminal of the diode rectifier circuit RB; the energy storage capacitor C _B It is a small-capacity long-life capacitor; the control circuit includes a differential sampling phase-shifting circuit, a rectifier circuit, a peak sampling circuit, an addition and subtraction circuit, an output voltage feedback control circuit, a multiplier, a PFC chip and a switch tube drive circuit, and the differential The output terminal D of the sampling phase-shifting circuit is connected with the input terminal of the rectification circuit, and the output terminal I of the rectification circuit is respectively connected to the input terminal of the peak sampling circuit and the first input terminal of the addition and subtraction circuit, and the second input terminal of the addition and subtraction circuit terminal is connected to the connection point G of the first resistor _R1 and the second resistor _R2 in the main power circuit, the output terminal H of the peak sampling circuit is connected to the third input terminal of the addition and subtraction circuit, and the output terminal K of the addition and subtraction circuit It is connected to an input terminal _vx of the multiplier, and the output voltage V _o of the main power circuit is connected to the input terminal L of the output voltage feedback control circuit through the voltage dividing point of the 20th resistor _R20 and the 21st resistor _R21 , The output terminal M of the output voltage feedback control circuit is connected to another input terminal _vy of the multiplier, the output terminal of the multiplier is connected to the input terminal of the PFC chip and the switch tube drive circuit, and the output terminal of the PFC chip and the switch tube drive circuit is connected to The gate of the switching tube Q in the main power circuit is connected.

本发明与现有技术相比，其显著优点是：（1）通过简单谐波电流注入法进行控制和平衡瞬时输入功率和输出功率，在保证输入功率因数的要求下，减小储能电容容值；（2）变换器能够用其他种类的电容如薄膜电容或瓷片电容等小容量长寿命的固定电容代替电解电容，电容体积小；（3）能显著提高电源功率密度和延长变换器寿命。Compared with the prior art, the present invention has the following remarkable advantages: (1) Control and balance the instantaneous input power and output power through the simple harmonic current injection method, and reduce the capacity of the energy storage capacitor under the requirement of ensuring the input power factor; (2) The converter can use other types of capacitors, such as film capacitors or ceramic capacitors, to replace electrolytic capacitors with small-capacity and long-life fixed capacitors. .

附图说明Description of drawings

图1是AC/DC变换器的“黑盒子”示意图。Figure 1 is a schematic diagram of the "black box" of an AC/DC converter.

图2是图1中AC/DC变换器在输入功率因数为1时输入电压、输入电流、输入功率和输出功率的波形图。Fig. 2 is a waveform diagram of input voltage, input current, input power and output power of the AC/DC converter in Fig. 1 when the input power factor is 1.

图3是b/a不同取值下的输入电流标幺值波形图。Figure 3 is a waveform diagram of the per unit value of the input current under different values of b/a.

图4是b/a不同取值下的输入功率标幺值波形图。Fig. 4 is a waveform diagram of the per unit value of input power under different values of b/a.

图5是b/a不同取值下的PF值与最大能量差标幺值。Figure 5 shows the PF value and the maximum energy difference per unit value under different values of b/a.

图6是a=1，b=0.916时输入电流在一个工频周期表达式的傅里叶分解图。Figure 6 is a Fourier decomposition diagram of the expression of the input current in a power frequency cycle when a=1 and b=0.916.

图7是本发明采用小容量长寿命储能电容的Boost PFC变换器的电路结构图。Fig. 7 is a circuit structure diagram of a Boost PFC converter using a small-capacity and long-life energy storage capacitor in the present invention.

图8是本发明采用小容量长寿命储能电容的Boost PFC变换器中控制电路的波形图。Fig. 8 is a waveform diagram of a control circuit in a Boost PFC converter using a small-capacity long-life energy storage capacitor according to the present invention.

具体实施方式Detailed ways

下面结合附图及具体实施例，对本发明作进一步详细说明。The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

1、输出电压脉动与储能电容值的关系1. The relationship between output voltage ripple and energy storage capacitor value

将PFC变换器看成一个“黑盒子”，如图1所示，其中C_B为储能电容。Consider the PFC converter as a "black box", as shown in Figure 1, where C _B is the energy storage capacitor.

令输入电压v_in(t)为：Let the input voltage v _in (t) be:

v_in(t)＝V_msinωt (1)v _in (t) = V _m sinωt (1)

其中V_m为输入交流电压幅值，t为时间，ω=2π/T_line，T_line是输入交流电压周期。Where V _m is the amplitude of the input AC voltage, t is the time, ω=2π/T _line , and T _line is the period of the input AC voltage.

若输入功率因数为1，那么输入电流可表示为：If the input power factor is 1, then the input current can be expressed as:

i_in(t)＝I_msinωt (2)i _in (t) = I _m sinωt (2)

其中I_m为输入电流幅值。Among them, I _m is the amplitude of the input current.

由式(1)和(2)可得瞬时输入功率p_in(t)为：From equations (1) and (2), the instantaneous input power p _in (t) can be obtained as:

${p p}_{in in} ((t t)) = = {v v}_{in in} ((t t)) {i i}_{in in} ((t t)) = = \frac{{V V}_{m m} {I I}_{m m} ((11 - - cos cos 22 ωt ωt))}{22} - - - - - - ((33))$

假设变换器的效率为100%，那么平均输入功率P_in等于平均输出功率P_o：Assuming the efficiency of the converter is 100%, then the average input power P _in is equal to the average output power P _o :

${P P}_{in in} = = {P P}_{o o} = = \frac{{V V}_{m m} {I I}_{m m}}{22} - - - - - - ((44))$

图2所示为输入电压、输入电流、输入功率、输出电压的波形，其中V_o是输出电压的平均值，ΔV_o是输出电压纹波的峰峰值。从中可以看出，当p_in>P_o时，储能电容C_B充电；当p_in<P_o时，储能电容C_B放电。储能电容C_B储存的最大能量差ΔE为其每次充入的能量，即：Figure 2 shows the waveforms of input voltage, input current, input power, and output voltage, where V _o is the average value of the output voltage, and ΔV _o is the peak-to-peak value of the output voltage ripple. It can be seen that, when p _in >P _o , the energy storage capacitor C _B is charged; when _pin <P _o , the energy storage capacitor C _B is discharged. The maximum energy difference ΔE stored in the energy storage capacitor C _B is the energy charged each time, that is:

$ΔE ΔE = = {&Integral; &Integral;}_{\frac{11}{88} {T T}_{line line}}^{\frac{33}{88} {T T}_{line line}} [[{p p}_{in in} ((t t)) - - {P P}_{o o}]] dt dt = = \frac{{P P}_{o o}}{22 π π {f f}_{line line}} - - - - - - ((55))$

式中f_line为输入交流电压频率，f_line=1/T_line。Where f _line is the input AC voltage frequency, f _line =1/T _line .

由图2可得最大能量差ΔE为：From Figure 2, the maximum energy difference ΔE can be obtained as:

$ΔE ΔE = = \frac{11}{22} {C C}_{B B} {(({V V}_{o o} + + \frac{11}{22} Δ Δ {V V}_{o o}))}^{22} - - \frac{11}{22} {C C}_{B B} {(({V V}_{o o} - - \frac{11}{22} Δ Δ {V V}_{o o}))}^{22} - - - - - - ((66))$

$= = {C C}_{B B} \cdot &Center Dot; {V V}_{o o} \cdot &Center Dot; Δ Δ {V V}_{o o}$

式中，c_B为储能电容C_B的电容值。In the formula, c _B is the capacitance value of the energy storage capacitor C _B.

由式(5)和式(6)可得，储能电容C_B的电容值c_B为：From formula (5) and formula (6), it can be obtained that the capacitance c _B of the energy storage capacitor C _B is:

${C C}_{B B} = = \frac{{P P}_{o o}}{22 π π {f f}_{line line} \cdot &Center Dot; {V V}_{o o} \cdot &Center Dot; Δ Δ {V V}_{o o}} - - - - - - ((77))$

从式(7)可以看出，当输入交流电压频率f_line和输出电压的平均值V_o一定时，储能电容C_B的电容值c_B与输出电压纹波的峰峰值ΔV_o成反比，输出电压纹波的峰峰值ΔV_o越小，所需要的电容值c_B越大；电容值c_B与平均输出功率P_o成正比，平均输出功率P_o越大，所需要的电容值c_B越大。It can be seen from formula (7) that when the input AC voltage frequency f _line and the average value V _o of the output voltage are constant, the capacitance c _B of the energy storage capacitor C _B is inversely proportional to the peak-to-peak value ΔV _o of the output voltage ripple, The smaller the peak-to-peak value ΔV _o of the output voltage ripple, the larger the required capacitor value c _B ; the capacitor value c _B is proportional to the average output power P _o , the larger the average output power P _o , the required capacitor value c _B bigger.

2、减小储能电容的控制方法2. Control method to reduce energy storage capacitor

由第1节分析可知，输入功率因数为1时，储能电容容值与其上电压及电压脉动的关系是一定的，如式(7)示。若能减小图2中T_line/4和3T_line/4处的峰值电流，则能降低输入峰值功率，从而可能减小储能电容储存的最大能量差ΔE。在0-T_line/2半个工频周期内，设输入电流满足表达式：From the analysis in Section 1, it can be seen that when the input power factor is 1, the relationship between the capacitance value of the energy storage capacitor and its upper voltage and voltage ripple is certain, as shown in formula (7). If the peak currents at T _line /4 and 3T _line /4 in Figure 2 can be reduced, the input peak power can be reduced, which may reduce the maximum energy difference ΔE stored in the energy storage capacitor. In the 0-T _line /2 half power frequency period, the input current satisfies the expression:

式(8)表示输入电流表达式，b/a决定输入功率因数PF，当b/a一定时，PF一定，b/a一定的情况下，b和a的具体值由输出功率P_o和输入电压V_m决定。Equation (8) represents the input current expression. b/a determines the input power factor PF. When b/a is constant, PF is constant. When b/a is constant, the specific values of b and a are determined by the output power P _o and the input power The voltage V _m is determined.

由输入输出功率平衡得：From the balance of input and output power:

$\frac{22}{{T T}_{line line}} {&Integral; &Integral;}_{00}^{{T T}_{line line} / / 22} {v v}_{in in} ((t t)) {i i}_{in in} ((t t)) = = {P P}_{o o} - - - - - - ((99))$

将式(8)代入式(9)可得：Substituting formula (8) into formula (9) can get:

${V V}_{m m} ((\frac{a a}{22} - - \frac{b b}{π π})) = = {P P}_{o o} - - - - - - ((1010))$

为了分析方便，对式(10)作归一化处理，令V_m=1，P_o=1，则For the convenience of analysis, formula (10) is normalized, let V _m =1, P _o =1, then

$((\frac{a a}{22} - - \frac{b b}{π π})) = = 11 - - - - - - ((1111))$

图3为b和a满足式(11)但比值不同的情况下，输入电流波形的变化情况。Figure 3 shows how the input current waveform changes when b and a satisfy the formula (11) but with different ratios.

图4为b和a满足式(11)但比值不同的情况下，输入功率波形的变化情况。如图4所示，p_in(t)的波形关于T_line/4对称，当0<b/a<0.73时，储能电容在半个工频周期内充放电一次；当0.73<b/a<1时，储能电容在半个工频周期内充放电两次。设从t=0开始，p_in(t)的波形与P_o=1的第一个交点对应的时间轴坐标为t_c。以输入功率因数为1(b/a=0)时，储能电容在半个工频周期中储存的最大能量差ΔE为基准，b/a取不同值时最大能量差的标幺值ΔE^*的表达式如式(12)，功率因数PF值的计算如式(13)，分别如下：Figure 4 shows how the input power waveform changes when b and a satisfy the formula (11) but with different ratios. As shown in Figure 4, the waveform of _pin (t) is symmetrical about T _line /4. When 0<b/a<0.73, the energy storage capacitor is charged and discharged once in half the power frequency cycle; when 0.73<b/a When <1, the energy storage capacitor is charged and discharged twice in half a power frequency cycle. It is assumed that starting from t=0, the time axis coordinate corresponding to the first intersection point between the waveform of p _in (t) and P _o =1 is t _c . When the input power factor is 1 (b/a=0), the maximum energy difference ΔE stored in the energy storage capacitor in half a power frequency cycle is used as the reference, and the per unit value ΔE of the maximum energy difference when b/a takes different values ^* The expression of is as formula (12), and the calculation of power factor PF value is as formula (13), respectively as follows:

$Δ Δ {E E.}^{* *} = = \frac{22 {&Integral; &Integral;}_{00}^{{t t}_{c c}} {P P}_{o o} - - {p p}_{in in} ((t t)) dt dt}{ΔE ΔE} - - - - - - ((1212))$

$PF PF = = \frac{{P P}_{o o}}{{V V}_{in in__rms rms} {I I}_{in in__rms rms}} = = \frac{11}{\frac{11}{\sqrt{22}} \sqrt{\frac{11}{π π} {&Integral; &Integral;}_{00}^{π π} {i i}_{in in}^{22} ((t t)) dt dt}} - - - - - - ((1313))$

式中V_{in_rms}为输入电压的有效值，I_{in_rms}为输入输入电流的有效值。Where V _{in_rms} is the effective value of the input voltage, and I _{in_rms} is the effective value of the input current.

由式(12)和式(13)可以作出b/a取值不同的情况下，功率因数PF和最大能量差的标幺值ΔE^*与b/a的关系图，如图5所示，从图5可以得到：当输入功率因数为0.9时，b/a=0.916，而标幺值ΔE^*等于0.68，即储能电容在半个工频周期中储存的最大能量差ΔE减小到功率因数PF为1时的68%。换言之，如果V_o和ΔV_o不变，那么变换器所需的储能电容容值减小为原来的68%。From formula (12) and formula (13), we can draw the relationship diagram between the power factor PF and the per unit value ΔE ^* of the maximum energy difference and b/a when the value of b/a is different, as shown in Figure 5, from Figure 5 shows: when the input power factor is 0.9, b/a=0.916, and the per unit value ΔE ^* is equal to 0.68, that is, the maximum energy difference ΔE stored by the energy storage capacitor in half a power frequency cycle is reduced to the power factor 68% of PF at 1. In other words, if V _o and ΔV _o remain unchanged, then the energy storage capacitor required by the converter is reduced to 68% of the original value.

输入电流在一个工频周期上的表达式为：The expression of the input current on a power frequency cycle is:

${i i}_{in in} ((t t)) = = \{\begin{matrix} a a sin sin ωt ωt + + b b cos cos ωt ωt - - b b & 00 \leq \leq ωt ωt \leq \leq \frac{π π}{22} \\ a a sin sin ωt ωt - - b b cos cos ωt ωt - - b b & \frac{π π}{22} \leq \leq ωt ωt \leq \leq π π \\ a a sin sin ωt ωt + + b b cos cos ωt ωt + + b b & π π \leq \leq ωt ωt \leq \leq \frac{33 π π}{22} \\ a a sin sin ωt ωt - - b b cos cos ωt ωt + + b b & \frac{33 π π}{22} \leq \leq ωt ωt \leq \leq 22 π π \end{matrix} - - - - - - ((1414))$

由图5可得，在满足PF值为0.9的情况下，b/a=0.916，在式(14)中，令a=1，b=0.916，对其作傅立叶分解，傅立叶分解后可得附图6，其中三次谐波占主要成分，其与基波的比值为0.47。因而该方法可近似认为是三次谐波电流注入法。It can be seen from Figure 5 that b/a=0.916 when the PF value is 0.9. In formula (14), set a=1, b=0.916, and perform Fourier decomposition on it. After Fourier decomposition, the attached Figure 6, where the third harmonic is the dominant component, and its ratio to the fundamental is 0.47. Therefore, this method can be approximately regarded as the third harmonic current injection method.

3、本发明采用小容量长寿命储能电容的Boost PFC变换器3. The present invention adopts Boost PFC converter with small capacity and long life energy storage capacitor

结合图7和图8，本发明根据以上分析设计的采用小容量长寿命储能电容的BoostPFC变换器主功率电路和控制电路，输入电压送入差分采样移相电路2进行差分取样后通过微分电路移相π/2，经由整流电路3得到b|cosωt|信号。b|cosωt|信号经由峰值取样电路4得到b信号，输入电压经过整流桥后由分压电阻取样得到a|sinωt|信号。a|sinωt|、b|cosωt|、b信号经过加减法电路5得到a|sinωt|+b|cosωt|-b信号，该信号和输出电压反馈控制电路6中误差放大器的输出信号经乘法器7相乘，乘积输出为PFC芯片的电流波形参考信号，具体电路结构如下：In conjunction with Fig. 7 and Fig. 8, the main power circuit and control circuit of the BoostPFC converter adopting the small-capacity long-life energy storage capacitor designed according to the above analysis of the present invention, the input voltage is sent to the differential sampling phase-shifting circuit 2 for differential sampling and then passed through the differential circuit The phase is shifted by π/2, and the b|cosωt| signal is obtained through the rectification circuit 3 . The b|cosωt| signal passes through the peak sampling circuit 4 to obtain the b signal, and the input voltage passes through the rectifier bridge and is sampled by the voltage dividing resistor to obtain the a|sinωt| signal. The a|sinωt|, b|cosωt|, b signals pass through the addition and subtraction circuit 5 to obtain the a|sinωt|+b|cosωt|-b signal, and the signal and the output signal of the error amplifier in the output voltage feedback control circuit 6 pass through the multiplier 7 multiplication, the product output is the current waveform reference signal of the PFC chip, the specific circuit structure is as follows:

本发明采用小容量长寿命储能电容的Boost PFC变换器，包括主功率电路1和控制电路，主功率电路1包括输入电压源v_in、EMI滤波器、二极管整流电路RB、Boost电感L_b、第一电阻R₁、第二电阻R₂、第三电阻R₃、开关管Q、二极管D_b、小容量储能电容C_B、负载R_Ld，其中输入电压源v_in与EMI滤波器的输入端口连接，EMI滤波器的输出端口与二极管整流电路RB的输入端口连接，二极管整流电路RB的输出负极为参考电位零点，二极管整流电路RB的输出正极与Boost电感L_b的一端连接，Boost电感L_b的另一端分别与开关管Q的漏极及二极管D_b的阳极连接，开关管Q的源极与第三电阻R₃的一端连接，第三电阻R₃的另一端与参考电位零点连接，二极管D_b的阴极分别与储能电容C_B的阳极及负载R_Ld的一端连接，储能电容C_B的阴极及负载R_Ld的另一端均与参考电位零点连接，其中储能电容C_B为小容量长寿命电容，第一电阻R₁与第二电阻R₂串联后接在二极管整流电路RB的输出端正、负极之间；所述储能电容C_B为小容量长寿命电容；所述控制电路包括差分采样移相电路2、整流电路3、峰值取样电路4、加减法电路5、输出电压反馈控制电路6、乘法器7、PFC芯片及开关管驱动电路8，所述差分采样移相电路2的输出端D与整流电路3的输入端连接，整流电路3的输出端I分别接入峰值取样电路4的输入端和加减法电路5的第一输入端，加减法电路5的第二输入端与主功率电路1中第一电阻R₁和第二电阻R₂的连接点G连接，峰值取样电路4的输出端H与加减法电路5的第三输入端连接，加减法电路5的输出端K与乘法器7的一个输入端v_x连接，主功率电路1的输出电压V_o经第二十电阻R₂₀和第二十一电阻R₂₁的分压点与输出电压反馈控制电路6的输入端L连接，输出电压反馈控制电路6的输出端M与乘法器7的另一个输入端v_y连接，乘法器7的输出端与PFC芯片及开关管驱动电路8的输入端连接，PFC芯片及开关管驱动电路8的输出端与主功率电路1中开关管Q的门极相连。The present invention adopts a Boost PFC converter with a small-capacity and long-life energy storage capacitor, which includes a main power circuit 1 and a control circuit. The main power circuit 1 includes an input voltage source v _in , an EMI filter, a diode rectifier circuit RB, a Boost inductor L _b , The first resistor R ₁ , the second resistor R ₂ , the third resistor R ₃ , the switch tube Q, the diode D _b , the small-capacity energy storage capacitor C _B , the load R _Ld , where the input voltage source v _in and the input of the EMI filter Port connection, the output port of the EMI filter is connected to the input port of the diode rectification circuit RB, the output negative pole of the diode rectification circuit RB is the reference potential zero point, the output positive pole of the diode rectification circuit RB is connected to one end of the Boost inductor L _b , and the Boost inductor L The other end of _b is respectively connected to the drain of the switching tube Q and the anode of the diode D _b , the source of the switching tube Q is connected to one end of the third resistor _R3 , and the other end of the third resistor _R3 is connected to the reference potential zero point, The cathode of the diode D _b is respectively connected to the anode of the energy storage capacitor C _B and one end of the load R _Ld , and the cathode of the energy storage capacitor C _B and the other end of the load R _Ld are connected to the reference potential zero point, wherein the energy storage capacitor C _B is A small-capacity long-life capacitor, the first resistor _R1 and the second resistor _R2 are connected in series between the positive and negative poles of the output terminal of the diode rectifier circuit RB; the energy storage capacitor C _B is a small-capacity long-life capacitor; the control The circuit includes a differential sampling phase shifting circuit 2, a rectification circuit 3, a peak sampling circuit 4, an addition and subtraction circuit 5, an output voltage feedback control circuit 6, a multiplier 7, a PFC chip and a switch tube drive circuit 8, and the differential sampling phase shifting The output terminal D of the circuit 2 is connected with the input terminal of the rectification circuit 3, and the output terminal I of the rectification circuit 3 is respectively connected to the input terminal of the peak sampling circuit 4 and the first input terminal of the addition and subtraction circuit 5, and the input terminal of the addition and subtraction circuit 5 The second input terminal is connected with the connection point G of the first resistor _R1 and the second resistor _R2 in the main power circuit 1, the output terminal H of the peak sampling circuit 4 is connected with the third input terminal of the addition and subtraction circuit 5, and the addition and subtraction The output terminal K of the law circuit 5 is connected to an input terminal v _x of the multiplier 7, and the output voltage V _o of the main power circuit 1 is connected to the output voltage by the voltage dividing point of the twentieth resistor R ₂₀ and the twenty-first resistor R ₂₁ The input terminal L of feedback control circuit 6 is connected, and the output terminal M of output voltage feedback control circuit 6 is connected with another input terminal v _y of multiplier 7, and the output terminal of multiplier 7 is connected with the input of PFC chip and switch tube drive circuit 8 The output terminal of the PFC chip and the switching tube drive circuit 8 is connected to the gate of the switching tube Q in the main power circuit 1 .

所述差分采样移相电路2包括第一运算放大器IC₁、第四电阻R₄、第五电阻R₅、第六电阻R₆、第七电阻R₇、第八电阻R₈、第九电阻R₉、第十电阻R₁₀、第十一电阻R₁₁、第一电容C₁；其中第四电阻R₄、第五电阻R₅、第六电阻R₆串联接于输入电压源v_in两端，第四电阻R₄和第五电阻R₅的连接端通过第八电阻R₈连接到第一运算放大器IC₁的同相输入端，第一运算放大器IC₁的同相输入端通过第九电阻R₉连接到参考电位零点，第五电阻R₅和第六电阻R₆的连接端通过第七电阻R₇连接到第一运算放大器IC₁的反相输入端，第一运算放大器IC₁的反相输入端通过第十电阻R₁₀连接到第一运算放大器IC₁的输出端C，第十一电阻R₁₁的一端与第一运算放大器IC₁的输出端C连接，第十一电阻R₁₁的另一端与第一电容C₁的一端连接，第一电容C₁的另一端连接到参考电位零点，第十一电阻R₁₁与第一电容C₁的连接点D与整流电路3的输入端连接。The differential sampling phase shifting circuit 2 includes a first operational amplifier IC ₁ , a fourth resistor R ₄ , a fifth resistor R ₅ , a sixth resistor R ₆ , a seventh resistor R ₇ , an eighth resistor R ₈ , and a ninth resistor R _9. The tenth resistor R ₁₀ , the eleventh resistor R ₁₁ , and the first capacitor C ₁ ; wherein the fourth resistor R ₄ , the fifth resistor R ₅ , and the sixth resistor R ₆ are connected in series to both ends of the input voltage source v _in , The connecting terminal of the fourth resistor _R4 and the fifth resistor _R5 is connected to the non-inverting input terminal of the first operational amplifier _IC1 through the eighth resistor _R8 , and the non-inverting input terminal of the first operational amplifier _IC1 is connected through the ninth resistor _R9 To the reference potential zero point, the connecting end of the fifth resistor _R5 and the sixth resistor _R6 is connected to the inverting input terminal of the first operational amplifier IC ₁ through the seventh resistor _R7 , and the inverting input terminal of the first operational amplifier IC ₁ The tenth resistor _R10 is connected to the output terminal C of the first operational amplifier _IC1 , one end of the eleventh resistor _R11 is connected to the output terminal C of the first operational amplifier _IC1 , and the other end of the eleventh resistor _R11 is connected to One end of the first capacitor _C1 is connected, the other end of the first capacitor _C1 is connected to the zero reference potential, and the connection point D between the eleventh resistor _R11 and the first capacitor _C1 is connected to the input end of the rectifier circuit 3 .

所述整流电路3包括第二运算放大器IC₂、第三运算放大器IC₃、第十二电阻R₁₂、第十三电阻R₁₃、第十四电阻R₁₄、第一二极管D₁、第二二极管D₂、第三二极管D₃、第四二极管D₄；其中第十三电阻R₁₃的一端分别与整流电路3的输入端D和第三运算放大器IC₃的同相输入端连接，第十三电阻R₁₃的另一端与第二运算放大器IC₂的反相输入端E连接，第十二电阻R₁₂的一端和第一二极管D₁的阳极均连接到第二运算放大器IC₂的反相输入端E，第一二极管D₁的阴极和第二二极管D₂的阳极均与第二运算放大器IC₂的输出端F连接，第十二电阻R₁₂的另一端和第二二极管D₂的阴极均与整流电路3的输出端I连接，第十四电阻R₁₄的一端和第三二极管D₃的阳极均连接到第三运算放大器IC₃的反相输入端G，第三二极管D₃的阴极和第四二极管D₄的阳极均与第三运算放大器IC₃的输出端连接，第十四电阻R₁₄的另一端和第四二极管D₄的阴极均与整流电路3的输出端I连接。The rectifier circuit 3 includes a second operational amplifier IC ₂ , a third operational amplifier IC ₃ , a twelfth resistor R ₁₂ , a thirteenth resistor R ₁₃ , a fourteenth resistor R ₁₄ , a first diode D ₁ , a first Two diodes D ₂ , the third diode D ₃ , and the fourth diode D ₄ ; one end of the thirteenth resistor R ₁₃ is in phase with the input terminal D of the rectifier circuit 3 and the third operational amplifier IC ₃ respectively The input end is connected, the other end of the thirteenth resistor _R13 is connected to the inverting input end E of the second operational amplifier _IC2 , one end of the twelfth resistor _R12 and the anode of the first diode _D1 are both connected to the first The inverting input terminal E of the second operational amplifier IC ₂ , the cathode of the first diode D ₁ and the anode of the second diode D ₂ are all connected to the output terminal F of the second operational amplifier IC ₂ , and the twelfth resistor R The other end of _R12 and the cathode of the second diode _D2 are connected to the output terminal I of the rectifier circuit 3, and one end of the fourteenth resistor _R14 and the anode of the third diode _D3 are connected to the third operational amplifier The inverting input terminal G of IC ₃ , the cathode of the third diode D ₃ and the anode of the fourth diode D ₄ are all connected to the output terminal of the third operational amplifier IC ₃ , and the other end of the fourteenth resistor R ₁₄ and the cathodes of the fourth diode _D4 are connected to the output terminal I of the rectifier circuit 3.

所述峰值取样电路4包括第十五电阻R₁₅、第二电容C₂、第五二极管D₅；其中第五二极管D₅的阳极与整流电路3的输出端I连接，第十五电阻R₁₅与第二电容C₂并联连接，其中一端并联连接点连接到参考电位零点、另一端并联连接点与第五二极管D₅的阴极连接，第五二极管D₅的阴极输出端即为峰值取样电路4的输出端H。The peak sampling circuit 4 includes a fifteenth resistor R ₁₅ , a second capacitor C ₂ , and a fifth diode D ₅ ; wherein the anode of the fifth diode D ₅ is connected to the output terminal I of the rectifier circuit 3, and the tenth The five resistors _R15 are connected in parallel with the second capacitor _C2 , and the parallel connection point of one end is connected to the reference potential zero point, and the parallel connection point of the other end is connected to the cathode of the fifth diode _D5 , and the cathode of the fifth diode _D5 The output terminal is the output terminal H of the peak sampling circuit 4 .

所述加减法电路5包括第四运算放大器IC₄、第十六电阻R₁₆、第十七电阻R₁₇、第十八电阻R₁₈、第十九电阻R₁₉；其中第十六电阻R₁₆的一端与峰值取样电路4的输出端H连接、第十六电阻R₁₆的另一端与第四运算放大器IC₄的反相端连接；第十七电阻R₁₇的一端与整流电路3的输出端I连接、第十七电阻R₁₇的另一端与第四运算放大器IC₄的同相输入端连接；第十八电阻R₁₈的一端与主功率电路1中第一电阻R₁和第二电阻R₂的公共端连接、第十八电阻R₁₈的另一端与第四运算放大器IC₄的同相输入端连接；第十九电阻R₁₉的一端与第四运算放大器IC₄的反相输入端连接、第十九电阻R₁₉的另一端与第四运算放大器IC₄的输出端K连接，第四运算放大器IC₄的输出端K即为加减法电路5的输出端。The addition and subtraction circuit 5 includes a fourth operational amplifier IC ₄ , a sixteenth resistor R ₁₆ , a seventeenth resistor R ₁₇ , an eighteenth resistor R ₁₈ , and a nineteenth resistor R ₁₉ ; wherein the sixteenth resistor R ₁₆ One end of R17 is connected to the output terminal H of the peak sampling circuit 4, the other end of the sixteenth resistor _R16 is connected to the inverting terminal of the fourth operational amplifier _IC4 ; one end of the seventeenth resistor _R17 is connected to the output terminal of the rectifier circuit 3 I connection, the other end of the seventeenth resistor R ₁₇ is connected to the non-inverting input end of the fourth operational amplifier IC ₄ ; one end of the eighteenth resistor R ₁₈ is connected to the first resistor R ₁ and the second resistor R ₂ in the main power circuit 1 The other end of the eighteenth resistor R ₁₈ is connected to the non-inverting input end of the fourth operational amplifier IC ₄ ; one end of the nineteenth resistor R ₁₉ is connected to the inverting input end of the fourth operational amplifier IC ₄ , The other end of the nineteenth resistor R ₁₉ is connected to the output terminal K of the fourth operational amplifier IC ₄ , and the output terminal K of the fourth operational amplifier IC ₄ is the output terminal of the addition and subtraction circuit 5 .

所述输出电压反馈控制电路6包括第五运算放大器IC₅、第二十电阻R₂₀、第二十一电阻R₂₁、第二十二电阻R₂₂、第三电容C₃、第四电容C₄；其中第二十电阻R₂₀的一端与主功率电路的输出正端连接，第二十电阻R₂₀的另一端与第二十一电阻R₂₁串联后接入参考电位零点，第二十电阻R₂₀和第二十一电阻R₂₁的公共端与第五运算放大器IC₅的反相输入端L连接，第五运算放大器IC₅的同相输入端与参考电位V_ref连接，第二十二电阻R₂₂和第三电容C₃串联后再与第四电容C₄并联，且一个并联连接点与第五运算放大器IC₅的反相输入端L连接，另一个并联连接点与第五运算放大器IC₅的输出端M连接，运算放大器IC₅的输出端M即为输出电压反馈控制电路6的输出端。The output voltage feedback control circuit 6 includes a fifth operational amplifier IC ₅ , a twentieth resistor R ₂₀ , a twenty-first resistor R ₂₁ , a twenty-second resistor R ₂₂ , a third capacitor C ₃ , and a fourth capacitor C ₄ ; One end of the twentieth resistor R ₂₀ is connected to the output positive end of the main power circuit, the other end of the twentieth resistor R ₂₀ is connected in series with the twenty-first resistor R ₂₁ to connect to the reference potential zero point, and the twentieth resistor R ₂₀ and the common end of the twenty-first resistor R ₂₁ are connected to the inverting input terminal L of the fifth operational amplifier IC ₅ , the non-inverting input terminal of the fifth operational amplifier IC ₅ is connected to the reference potential V _ref , and the twenty-second resistor R ₂₂ and the third capacitor _C3 are connected in series and then connected in parallel with the fourth capacitor _C4 , and one parallel connection point is connected to the inverting input terminal L of the fifth operational amplifier _IC5 , and the other parallel connection point is connected to the fifth operational amplifier _IC5 The output terminal M of the operational amplifier IC ₅ is connected to the output terminal M of the output voltage feedback control circuit 6 .

所述PFC芯片及开关管驱动电路8中PFC芯片可以采用UC3854或L6561等型号，第一运算放大器IC₁～第五运算放大器IC₅可以采用TL074、TL072、LM358或LM324等型号，乘法器7采用集成IC电路或分立器件组成。The PFC chip in the PFC chip and the switching tube drive circuit 8 can adopt models such as UC3854 or L6561, the first operational amplifier IC ₁ to the fifth operational amplifier IC ₅ can adopt models such as TL074, TL072, LM358 or LM324, and the multiplier 7 adopts Composed of integrated IC circuits or discrete devices.

综上所述，本发明采用小容量长寿命储能电容的Boost PFC变换器，通过简单谐波电流注入法进行控制和平衡瞬时输入功率和输出功率，可以在保证输入功率因数的要求下，减小储能电容容值，使变换器能够用其他种类的电容如薄膜电容或瓷片电容等小容量长寿命的电容代替电解电容，克服了传统的采用电解电容作为储能电容而存在体积大和使用寿命短等明显缺陷。具有能显著提高电源功率密度和延长变换器寿命等优点。In summary, the present invention uses a Boost PFC converter with a small-capacity and long-life energy storage capacitor to control and balance the instantaneous input power and output power through a simple harmonic current injection method, which can reduce the input power factor under the requirement of ensuring the input power factor. The small value of the energy storage capacitor enables the converter to replace the electrolytic capacitor with other types of capacitors such as film capacitors or ceramic capacitors with small capacity and long life, which overcomes the traditional use of electrolytic capacitors as energy storage capacitors. Short life and other obvious defects. It has the advantages of significantly improving the power density of the power supply and prolonging the life of the converter.

Claims

1. a Boost pfc converter that adopts low capacity long-life storage capacitor is characterized in that, comprises main power circuit (1) and control circuit, and described main power circuit (1) comprises input voltage source v _In, electromagnetic interface filter, diode rectifier circuit RB, Boost inductance L _b, first resistance R ₁, second resistance R ₂, the 3rd resistance R ₃, switching tube Q, diode D _b, storage capacitor C _B, load R _Ld, input voltage source v wherein _InBe connected with the input port of electromagnetic interface filter, the output port of electromagnetic interface filter is connected with the input port of diode rectifier circuit RB, and the output negative pole of diode rectifier circuit RB is reference potential zero point, the output cathode of diode rectifier circuit RB and Boost inductance L _bAn end connect the Boost inductance L _bThe other end respectively with drain electrode and the diode D of switching tube Q _bAnode connect the source electrode of switching tube Q and the 3rd resistance R ₃An end connect the 3rd resistance R ₃The other end be connected diode D zero point with reference potential _bNegative electrode respectively with storage capacitor C _BAnode and load R _LdAn end connect storage capacitor C _BNegative electrode and load R _LdThe other end all be connected storage capacitor C wherein zero point with reference potential _BBe low capacity long-life electric capacity, first resistance R ₁With second resistance R ₂Be connected on after the series connection between the output positive and negative electrode of diode rectifier circuit RB; Described control circuit comprises difference sampling phase-shift circuit (2), rectification circuit (3), peak sample circuit (4), adder and substracter circuit (5), output voltage feedback control circuit (6), multiplier (7), PFC chip and switching tube drive circuit (8), the output D of described difference sampling phase-shift circuit (2) is connected with the input of rectification circuit (3), the output I of rectification circuit (3) inserts the input of peak sample circuit (4) and the first input end of adder and substracter circuit (5), first resistance R in second input of adder and substracter circuit (5) and the main power circuit (1) respectively ₁With second resistance R ₂Tie point G connect, the output H of peak sample circuit (4) is connected with the 3rd input of adder and substracter circuit (5), an input v of the output K of adder and substracter circuit (5) and multiplier (7) _xConnect the output voltage V of main power circuit (1) _oThrough the 20 resistance R ₂₀With the 21 resistance R ₂₁Dividing point be connected another input v of the output M of output voltage feedback control circuit (6) and multiplier (7) with the input L of output voltage feedback control circuit (6) _yConnect, the output of multiplier (7) is connected with the input of PFC chip and switching tube drive circuit (8), and the output of PFC chip and switching tube drive circuit (8) links to each other with the gate pole of switching tube Q in the main power circuit (1).

2. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, described difference sampling phase-shift circuit (2) comprises the first operational amplifier IC ₁, the 4th resistance R ₄, the 5th resistance R ₅, the 6th resistance R ₆, the 7th resistance R ₇, the 8th resistance R ₈, the 9th resistance R ₉, the tenth resistance R ₁₀, the 11 resistance R ₁₁, first capacitor C ₁The 4th resistance R wherein ₄, the 5th resistance R ₅, the 6th resistance R ₆Be connected in series in input voltage source v _InTwo ends, the 4th resistance R ₄With the 5th resistance R ₅Link by the 8th resistance R ₈Be connected to the first operational amplifier IC ₁In-phase input end, the first operational amplifier IC ₁In-phase input end by the 9th resistance R ₉Be connected to reference potential zero point, the 5th resistance R ₅With the 6th resistance R ₆Link by the 7th resistance R ₇Be connected to the first operational amplifier IC ₁Inverting input, the first operational amplifier IC ₁Inverting input by the tenth resistance R ₁₀Be connected to the first operational amplifier IC ₁Output C, the 11 resistance R ₁₁An end and the first operational amplifier IC ₁Output C connect the 11 resistance R ₁₁The other end and first capacitor C ₁An end connect first capacitor C ₁The other end be connected to reference potential zero point, the 11 resistance R ₁₁With first capacitor C ₁Tie point D be connected with the input of rectification circuit (3).

3. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, described rectification circuit (3) comprises the second operational amplifier IC ₂, the 3rd operational amplifier IC ₃, the 12 resistance R ₁₂, the 13 resistance R ₁₃, the 14 resistance R ₁₄, the first diode D ₁, the second diode D ₂, the 3rd diode D ₃, the 4th diode D ₄The 13 resistance R wherein ₁₃An end respectively with input D and the 3rd operational amplifier IC of rectification circuit (3) ₃In-phase input end connect the 13 resistance R ₁₃The other end and the second operational amplifier IC ₂Inverting input E connect the 12 resistance R ₁₂An end and the first diode D ₁Anode all be connected to the second operational amplifier IC ₂Inverting input E, the first diode D ₁Negative electrode and the second diode D ₂Anode all with the second operational amplifier IC ₂Output F connect the 12 resistance R ₁₂The other end and the second diode D ₂Negative electrode all be connected the 14 resistance R with the output I of rectification circuit (3) ₁₄An end and the 3rd diode D ₃Anode all be connected to the 3rd operational amplifier IC ₃Inverting input G, the 3rd diode D ₃Negative electrode and the 4th diode D ₄Anode all with the 3rd operational amplifier IC ₃Output connect the 14 resistance R ₁₄The other end and the 4th diode D ₄Negative electrode all be connected with the output I of rectification circuit (3).

4. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, described peak sample circuit (4) comprises the 15 resistance R ₁₅, second capacitor C ₂, the 5th diode D ₅The 5th diode D wherein ₅Anode be connected the 15 resistance R with the output I of rectification circuit (3) ₁₅With second capacitor C ₂Be connected in parallel, wherein an end is connected in parallel a little to be connected to and is connected in parallel at reference potential zero point, the other end a little and the 5th diode D ₅Negative electrode connect the 5th diode D ₅Cathode end be the output H of peak sample circuit (4).

5. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, described adder and substracter circuit (5) comprises four-operational amplifier IC ₄, the 16 resistance R ₁₆, the 17 resistance R ₁₇, the 18 resistance R ₁₈, the 19 resistance R ₁₉The 16 resistance R wherein ₁₆An end be connected with the output H of peak sample circuit (4), the 16 resistance R ₁₆The other end and four-operational amplifier IC ₄End of oppisite phase connect; The 17 resistance R ₁₇An end be connected with the output I of rectification circuit (3), the 17 resistance R ₁₇The other end and four-operational amplifier IC ₄In-phase input end connect; The 18 resistance R ₁₈An end and main power circuit (1) in first resistance R ₁With second resistance R ₂Common port connect, the 18 resistance R ₁₈The other end and four-operational amplifier IC ₄In-phase input end connect; The 19 resistance R ₁₉An end and four-operational amplifier IC ₄Inverting input connect, the 19 resistance R ₁₉The other end and four-operational amplifier IC ₄Output K connect four-operational amplifier IC ₄Output K be the output of adder and substracter circuit (5).

6. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, described output voltage feedback control circuit (6) comprises the 5th operational amplifier IC ₅, the 20 resistance R ₂₀, the 21 resistance R ₂₁, the 22 resistance R ₂₂, the 3rd capacitor C ₃, the 4th capacitor C ₄The 20 resistance R wherein ₂₀An end be connected the 20 resistance R with the output plus terminal of main power circuit ₂₀The other end and the 21 resistance R ₂₁Reference potential zero point, the 20 resistance R are inserted in series connection back ₂₀With the 21 resistance R ₂₁Common port and the 5th operational amplifier IC ₅Inverting input L connect the 5th operational amplifier IC ₅In-phase input end and reference potential V _RefConnect the 22 resistance R ₂₂With the 3rd capacitor C ₃After the series connection again with the 4th capacitor C ₄Parallel connection, and one be connected in parallel a little and the 5th operational amplifier IC ₅Inverting input L connect, another is connected in parallel a little and the 5th operational amplifier IC ₅Output M connect operational amplifier IC ₅Output M be the output of output voltage feedback control circuit (6).

7. the Boost pfc converter of employing low capacity long-life storage capacitor according to claim 1 is characterized in that, PFC chip model is UC3854 or L6561 in described PFC chip and the switching tube drive circuit (8).