CN103647522A - Four-mold remainder system based FIR filter and design method thereof - Google Patents
Four-mold remainder system based FIR filter and design method thereof Download PDFInfo
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- CN103647522A CN103647522A CN201310577763.8A CN201310577763A CN103647522A CN 103647522 A CN103647522 A CN 103647522A CN 201310577763 A CN201310577763 A CN 201310577763A CN 103647522 A CN103647522 A CN 103647522A
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Abstract
本发明公开了一种基于四模余数系统的FIR滤波器及其设计方法,该滤波器由1个二进制数至剩余数转换模块,4个FIR滤波器子模块以及1个剩余数至二进制数转换模块构成的;该基于四模余数系统的FIR滤波器的设计方法包括前端设计、硬件描述语言建模、综合、成型;本发明的基于四模余数系统的FIR滤波器将一个计算分为若干个彼此独立,互不影响,并行运算的子计算,消除了各个子计算之间的进位链,加快了计算的速度,在模集合选取上,使多有模都具有2n和2n±1的形式,可以利用这些特殊的形式来简化转换器硬件电路的设计,使其完全用最简单的组合逻辑电路来实现,而不必占用存储空间。
The invention discloses a FIR filter based on a four-modulus remainder system and a design method thereof. The filter consists of a binary number to residual number conversion module, 4 FIR filter submodules and a residual number to binary number conversion module. It is made of modules; the design method of the FIR filter based on the four-modulus remainder system includes front-end design, hardware description language modeling, synthesis, and molding; the FIR filter based on the four-modulus remainder system of the present invention divides a calculation into several Independent of each other, independent of each other, the sub-computation of parallel operation eliminates the carry chain between each sub-calculation, and speeds up the calculation. In the selection of the module set, all the modules have the form of 2n and 2n±1. These special forms can be used to simplify the design of the hardware circuit of the converter, so that it can be realized with the simplest combinational logic circuit without occupying storage space.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105656450A (en) * | 2015-12-31 | 2016-06-08 | 北京合康亿盛变频科技股份有限公司 | Digital lowpass filtering method and apparatus for integer arithmetic |
| CN108616265A (en) * | 2018-05-04 | 2018-10-02 | 重庆邮电大学 | A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases |
| CN109787585A (en) * | 2019-01-31 | 2019-05-21 | 电子科技大学 | A FIR Filtering System Based on Nested Residue System |
| CN110620566A (en) * | 2019-09-25 | 2019-12-27 | 电子科技大学 | FIR filtering system based on combination of random calculation and remainder system |
| CN110794369A (en) * | 2019-09-25 | 2020-02-14 | 四川九洲空管科技有限责任公司 | Baseband signal processing method based on carrier-based platform digital array radar |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090307637A1 (en) * | 2008-06-09 | 2009-12-10 | Lichtensteiger Susan K | Method of designing multi-state restore circuitry for restoring state to a power-managed functional block |
| CN102054109A (en) * | 2010-12-31 | 2011-05-11 | 北京大学深圳研究生院 | Lower hardware mapping method of integrated circuit, and data control flow generation method and device |
-
2013
- 2013-11-19 CN CN201310577763.8A patent/CN103647522A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090307637A1 (en) * | 2008-06-09 | 2009-12-10 | Lichtensteiger Susan K | Method of designing multi-state restore circuitry for restoring state to a power-managed functional block |
| CN102054109A (en) * | 2010-12-31 | 2011-05-11 | 北京大学深圳研究生院 | Lower hardware mapping method of integrated circuit, and data control flow generation method and device |
Non-Patent Citations (2)
| Title |
|---|
| AMIR SABBAGH MOLAHOSSEINI等: "Efficient Reverse Converter Designs for the New 4-Moduli Sets {2n-1,2n,2n+1,22n+1-1} and {2n-1,2n+1,22n,22n+1} Based on New CRTs", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I:REGULAR PAPERS》 * |
| 陈建文: "基于余数系统的FIR滤波器的研究", 《CNKI博士学位论文全文库》 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105656450A (en) * | 2015-12-31 | 2016-06-08 | 北京合康亿盛变频科技股份有限公司 | Digital lowpass filtering method and apparatus for integer arithmetic |
| CN105656450B (en) * | 2015-12-31 | 2018-12-21 | 北京合康亿盛变频科技股份有限公司 | The digital low-pass filtering method and device of integer arithmetic |
| CN108616265A (en) * | 2018-05-04 | 2018-10-02 | 重庆邮电大学 | A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases |
| CN108616265B (en) * | 2018-05-04 | 2022-07-01 | 重庆邮电大学 | Circuit structure of RNS DWT filter bank based on five-modulus residue number basis |
| CN109787585A (en) * | 2019-01-31 | 2019-05-21 | 电子科技大学 | A FIR Filtering System Based on Nested Residue System |
| CN110620566A (en) * | 2019-09-25 | 2019-12-27 | 电子科技大学 | FIR filtering system based on combination of random calculation and remainder system |
| CN110794369A (en) * | 2019-09-25 | 2020-02-14 | 四川九洲空管科技有限责任公司 | Baseband signal processing method based on carrier-based platform digital array radar |
| CN110620566B (en) * | 2019-09-25 | 2021-07-02 | 电子科技大学 | FIR Filtering System Based on Combination of Random Computation and Remainder System |
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