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CN103647522A - Four-mold remainder system based FIR filter and design method thereof - Google Patents

Four-mold remainder system based FIR filter and design method thereof Download PDF

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CN103647522A
CN103647522A CN201310577763.8A CN201310577763A CN103647522A CN 103647522 A CN103647522 A CN 103647522A CN 201310577763 A CN201310577763 A CN 201310577763A CN 103647522 A CN103647522 A CN 103647522A
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fir filter
modulus
design
remainder
remainder system
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吕晓兰
肖明
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Guangdong University of Petrochemical Technology
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Abstract

本发明公开了一种基于四模余数系统的FIR滤波器及其设计方法,该滤波器由1个二进制数至剩余数转换模块,4个FIR滤波器子模块以及1个剩余数至二进制数转换模块构成的;该基于四模余数系统的FIR滤波器的设计方法包括前端设计、硬件描述语言建模、综合、成型;本发明的基于四模余数系统的FIR滤波器将一个计算分为若干个彼此独立,互不影响,并行运算的子计算,消除了各个子计算之间的进位链,加快了计算的速度,在模集合选取上,使多有模都具有2n和2n±1的形式,可以利用这些特殊的形式来简化转换器硬件电路的设计,使其完全用最简单的组合逻辑电路来实现,而不必占用存储空间。

Figure 201310577763

The invention discloses a FIR filter based on a four-modulus remainder system and a design method thereof. The filter consists of a binary number to residual number conversion module, 4 FIR filter submodules and a residual number to binary number conversion module. It is made of modules; the design method of the FIR filter based on the four-modulus remainder system includes front-end design, hardware description language modeling, synthesis, and molding; the FIR filter based on the four-modulus remainder system of the present invention divides a calculation into several Independent of each other, independent of each other, the sub-computation of parallel operation eliminates the carry chain between each sub-calculation, and speeds up the calculation. In the selection of the module set, all the modules have the form of 2n and 2n±1. These special forms can be used to simplify the design of the hardware circuit of the converter, so that it can be realized with the simplest combinational logic circuit without occupying storage space.

Figure 201310577763

Description

A kind of FIR filter and method for designing thereof based on four mould residue number systems
Technical field
The invention belongs to digital signal processing technique field, relate in particular to a kind of FIR filter and method for designing thereof based on four mould residue number systems.
Background technology
FIR filter circuit based on residue system utilizes remainder a calculating can be divided into several are independent of one another, be independent of each other, the son of parallel running calculates and word length remains constant essential advantage in whole computational process, effectively solved the problem that conventional filter exists, be more and more widely used in the filtering processing of Ultrahigh speed data stream.
In digital processing field, indispensable parts are finite impulse response filters.Its high stability has determined that it is widely used in the multiple fields such as communication, control, image and radar.Yet because FIR filter is a computing unit of taking advantage of crypto set type, therefore, under the impact of current ultrahigh speed information flow, the FIR filter of traditional binary number system has inevitably produced following problem:
1) guarantee real time communication.
2) precision and the effect of filtering by reducing the word length of tap number or adder and multiplier, have but been reduced.
Traditional solution is to adopt converter technique to realize, as fast Fourier transform (FFT) etc.Yet FFT is the mode deal with data with piece, thereby therefore in processing procedure, need a large amount of data bufferings to cause the time delay of output.
Adopting residue number system to build FIR filter is the effective ways that address the above problem.
Summary of the invention
The object of the present invention is to provide a kind of FIR filter and method for designing thereof based on four mould residue number systems, being intended to solve traditional Fourier transform is the mode deal with data with piece, thereby in processing procedure, needs a large amount of data bufferings to cause the problem of the time delay of output.
The present invention be achieved in that a kind of FIR filter based on four mould residue number systems by 1 binary number to remainder modular converter, 4 FIR filter submodules and 1 remainder to binary number modular converter form;
Further, the circuit of the described FIR filter based on four mould residue number systems, with 4 moulds combination { 2n-1,2n+1,22n, 22n+1-1}, can process 4 moulds simultaneously, the dynamic range of processing number reaches 6n+1 position, and whole circuit consists of combinational circuit completely, and each mould in set has the form of 2n and 2n ± 1 simultaneously;
A kind of method for designing of the FIR filter based on four mould residue number systems comprises Front-end Design, hardware description language modeling, comprehensive, moulding.Concrete steps are as follows:
Step 1, Front-end Design.
First, according to the parameter of filter, utilize the FDATool tool box of business software Matlab to design FIR filter.FDATool obtains the exponent number N of filter according to the filter parameter of input, the coefficient of filter, and then FDATool quantizes coefficient according to the quantified precision of designer's appointment.Designer determines the dynamic range M of residue number system according to the bit wide of the precision quantizing and input data, utilize formula
Figure BSA0000097709110000021
the value that determines mould set n, then solves quantization parameter about the remainder of each mould.
Step 2, hardware description language modeling.
Utilize Verilog or VHDL hardware description language to carry out remainder FIR modeling filter based on respective mode set, wherein, binary number is to the design of remainder transducer, the design of the mould adder of each passage, and mode multiplier is selected respectively the optimized design of previous stage.The parameter instantiation model of trying to achieve according to step 1, whether Bing Yong simulation software is as correct in ModelSim verifying logic.
Step 3, comprehensive.
The logically true instantiation remainder FIR filter that step 2 is obtained utilizes integrated software comprehensive, as Synopsys Design Compiler, obtain the minimum timing of critical path, then, the net table generating is done to rear imitating, the logical correctness of checking net table, errors excepted, should revise after logic, more imitative after comprehensive, this process circulation carries out until net table is correct.
Step 4, moulding.
Utilize net table, generate domain, the flow of contact chip Foundrymen.Also can be packaged into soft core or stone, with the form issue of IP kernel.
effect gathers
FIR filter based on four mould residue number systems of the present invention has following beneficial effect:
(1) FIR filter is the intensive Digital Signal Processing of multiply-add operation, and residue system has unrivaled pure concurrency on multiply-add operation, it is divided into a calculating, and several are independent of one another, be independent of each other, the son of concurrent operation calculates, eliminate the carry chain between each height calculates, accelerated the speed of calculating.
(2) based on residue system FIR filter, in mould set, choose, make to have mould all to there is the form of 2n and 2n ± 1 more.Can utilize these special forms to simplify the design of transducer hardware circuit, it be realized with the simplest combinational logic circuit completely, and needn't take memory space.
Accompanying drawing explanation
Fig. 1 is the overall architecture schematic diagram of the four-way FIR filter circuit based on residue system that provides of the embodiment of the present invention;
Fig. 2 is the design flow diagram of the four-way FIR filter circuit based on residue system that provides of the embodiment of the present invention;
Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figure 1, a kind of FIR filter based on four mould residue number systems is by 1 binary number to remainder modular converter, and 4 FIR filter submodules and 1 remainder to binary number modular converter form;
Further, the circuit of the described FIR filter based on four mould residue number systems, with 4 moulds combination { 2n-1,2n+1,22n, 22n+1-1}, can process 4 moulds simultaneously, the dynamic range of processing number reaches 6n+1 position, and whole circuit consists of combinational circuit completely, and each mould in set has the form of 2n and 2n ± 1 simultaneously;
As shown in Figure 2, a kind of method for designing of the FIR filter based on four mould residue number systems comprises
S101: Front-end Design;
S102: hardware description language modeling:;
S103: comprehensive;
S104: moulding.
Concrete steps are as follows:
Step 1, Front-end Design.
First, according to the parameter of filter, utilize the FDATool tool box of business software Matlab to design FIR filter.FDATool obtains the exponent number N of filter according to the filter parameter of input, the coefficient of filter, and then FDATool quantizes coefficient according to the quantified precision of designer's appointment.Designer determines the dynamic range M of residue number system according to the bit wide of the precision quantizing and input data, utilize formula
Figure BSA0000097709110000041
the value that determines mould set n, then solves quantization parameter about the remainder of each mould.
Step 2, hardware description language modeling.
Utilize Verilog or VHDL hardware description language to carry out remainder FIR modeling filter based on respective mode set, wherein, binary number is to the design of remainder transducer, the design of the mould adder of each passage, and mode multiplier is selected respectively the optimized design of previous stage.The parameter instantiation model of trying to achieve according to step 1, whether Bing Yong simulation software is as correct in ModelSim verifying logic.
Step 3, comprehensive.
The logically true instantiation remainder FIR filter that step 2 is obtained utilizes integrated software comprehensive, as Synopsys Design Compiler, obtain the minimum timing of critical path, then, the net table generating is done to rear imitating, the logical correctness of checking net table, errors excepted, should revise after logic, more imitative after comprehensive, this process circulation carries out until net table is correct.
Step 4, moulding.
Utilize net table, generate domain, the flow of contact chip Foundrymen.Also can be packaged into soft core or stone, with the form issue of IP kernel.
Although above-mentioned, by reference to the accompanying drawings the specific embodiment of the present invention is described; but be not limiting the scope of the invention; one of ordinary skill in the art should be understood that; on the basis of technical scheme of the present invention, those skilled in the art do not need to pay various modifications that performing creative labour can make or distortion still within protection scope of the present invention.

Claims (4)

1.一种基于四模余数系统的FIR滤波器,其特征在于,所述的基于四模余数系统的FIR滤波器由1个二进制数至剩余数转换模块,4个FIR滤波器子模块以及1个剩余数至二进制数转换模块构成的。1. a kind of FIR filter based on four modulus remainder system, it is characterized in that, described FIR filter based on four modulus remainder system is by 1 binary number to residual number conversion module, 4 FIR filter submodules and 1 It is composed of residual number to binary number conversion modules. 2.如权利要求1所述的基于四模余数系统的FIR滤波器,其特征在于,所述的基于四模余数系统的FIR滤波器的电路,以4模结合{2n-1,2n+1,22n,22n+1-1},可同时处理4个模,处理数的动态范围达到6n+1位,整个电路完全由组合电路构成,同时集合中的每一个模都具有2n和2n±1的形式。2. the FIR filter based on four modulus remainder system as claimed in claim 1, is characterized in that, the circuit of described FIR filter based on four modulus remainder system, combines {2n-1, 2n+1 with 4 mode , 22n, 22n+1-1}, can process 4 modules at the same time, the dynamic range of the processing number reaches 6n+1 bits, the whole circuit is completely composed of combinational circuits, and each module in the set has 2n and 2n±1 form. 3.一种基于四模余数系统的FIR滤波器的设计方法,其特征在于,所述的基于四模余数系统的FIR滤波器的设计方法包括前端设计、硬件描述语言建模、综合、成型。3. A design method based on the FIR filter of the four-modulus remainder system, characterized in that, the described design method of the FIR filter based on the four-modulus remainder system comprises front-end design, hardware description language modeling, synthesis, molding. 4.如权利要求3所述的基于四模余数系统的FIR滤波器的设计方法,其特征在于,具体步骤如下:4. the design method based on the FIR filter of four modulus remainder system as claimed in claim 3, is characterized in that, concrete steps are as follows: 步骤一、前端设计;Step 1. Front-end design; 首先,根据滤波器的参数利用商业软件Matlab的FDATool工具箱来设计FIR滤波器。FDATool根据输入的滤波器参数求出滤波器的阶数N,滤波器的系数,然后FDATool根据设计者指定的量化精度对系数进行量化;设计者根据量化的精度以及输入数据的位宽决定余数系统的动态范围M,利用公式
Figure FSA0000097709100000011
决定模集合n的取值,然后求解量化系数关于各个模的余数;
First, according to the parameters of the filter, the FIR filter is designed using the FDATool toolbox of the commercial software Matlab. FDATool calculates the order N of the filter and the coefficients of the filter according to the input filter parameters, and then FDATool quantizes the coefficients according to the quantization precision specified by the designer; the designer determines the remainder system according to the quantization precision and the bit width of the input data The dynamic range M, using the formula
Figure FSA0000097709100000011
Determine the value of the modulus set n, and then solve the remainder of the quantization coefficient with respect to each modulus;
步骤二、硬件描述语言建模;Step 2, hardware description language modeling; 利用Verilog或VHDL硬件描述语言对基于相应模集合进行余数FIR滤波器建模,其中,二进制数至余数转换器的设计,各个通道的模加法器的设计,模乘法器分别选用前一阶段的最优化的设计;根据步骤一求得的参数实例化模型,并用仿真软件如ModelSim验证逻辑是否正确;Use Verilog or VHDL hardware description language to model the remainder FIR filter based on the corresponding modulus set. Among them, the design of the binary number to remainder converter, the design of the modulus adder of each channel, and the modulus multiplier are respectively selected from the last stage. Optimized design; instantiate the model according to the parameters obtained in step 1, and use simulation software such as ModelSim to verify whether the logic is correct; 步骤三、综合;Step three, synthesis; 将步骤二得到的逻辑正确的实例化余数FIR滤波器利用综合软件综合,如Synopsys Design Compiler,获取关键路径的最小定时;然后,对生成的网表做后仿,验证网表的逻辑正确性,如有错误,应修改逻辑后,再综合后仿,此过程循环执行直至网表正确;The logically correct instantiated remainder FIR filter obtained in step 2 is synthesized by comprehensive software, such as Synopsys Design Compiler, to obtain the minimum timing of the critical path; then, post-simulate the generated netlist to verify the logical correctness of the netlist, If there is an error, the logic should be modified, then synthesized and imitated, and this process is executed cyclically until the netlist is correct; 步骤四、成型;Step four, forming; 利用网表,生成版图,联系芯片铸造商流片;也可以封装成软核或硬核,以IP核的形式发布。Use the netlist to generate the layout and contact the chip foundry for tape-out; it can also be packaged into a soft core or hard core and released in the form of an IP core.
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CN105656450A (en) * 2015-12-31 2016-06-08 北京合康亿盛变频科技股份有限公司 Digital lowpass filtering method and apparatus for integer arithmetic
CN108616265A (en) * 2018-05-04 2018-10-02 重庆邮电大学 A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases
CN109787585A (en) * 2019-01-31 2019-05-21 电子科技大学 A FIR Filtering System Based on Nested Residue System
CN110620566A (en) * 2019-09-25 2019-12-27 电子科技大学 FIR filtering system based on combination of random calculation and remainder system
CN110794369A (en) * 2019-09-25 2020-02-14 四川九洲空管科技有限责任公司 Baseband signal processing method based on carrier-based platform digital array radar

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105656450A (en) * 2015-12-31 2016-06-08 北京合康亿盛变频科技股份有限公司 Digital lowpass filtering method and apparatus for integer arithmetic
CN105656450B (en) * 2015-12-31 2018-12-21 北京合康亿盛变频科技股份有限公司 The digital low-pass filtering method and device of integer arithmetic
CN108616265A (en) * 2018-05-04 2018-10-02 重庆邮电大学 A kind of circuit structure of the RNS DWT filter groups based on five mould remainder bases
CN108616265B (en) * 2018-05-04 2022-07-01 重庆邮电大学 Circuit structure of RNS DWT filter bank based on five-modulus residue number basis
CN109787585A (en) * 2019-01-31 2019-05-21 电子科技大学 A FIR Filtering System Based on Nested Residue System
CN110620566A (en) * 2019-09-25 2019-12-27 电子科技大学 FIR filtering system based on combination of random calculation and remainder system
CN110794369A (en) * 2019-09-25 2020-02-14 四川九洲空管科技有限责任公司 Baseband signal processing method based on carrier-based platform digital array radar
CN110620566B (en) * 2019-09-25 2021-07-02 电子科技大学 FIR Filtering System Based on Combination of Random Computation and Remainder System

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