CN103647557B - Adc circuit, ic for energy metering and electric energy metered system - Google Patents
Adc circuit, ic for energy metering and electric energy metered system Download PDFInfo
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Abstract
本发明涉及一种ADC电路、电能计量电路和电能计量系统。其中,ADC电路包括开关电阻电路;第一运算放大器,其输入端与开关电阻电路连接;第二运算放大器,其输入端通过电阻与第一运算放大器的输出端连接;量化器,其输入端与第二运算放大器的输出端连接,其输出端用于输出对第二运算放大器的输出信号进行比较量化后的信号;数模转换器模块,其输入端与量化器的输出端连接,其输出端反馈连接到第一运算放大器的输入端和第二运算放大器的输入端。本发明实施例的ADC电路的第一运算放大器与第二运算放大器之间通过电阻连接,二者之间的信号是连续传输的,是一种连续时间的sigma‑delta ADC结构,能够提高ADC电路的精度。
The invention relates to an ADC circuit, an electric energy metering circuit and an electric energy metering system. Wherein, the ADC circuit includes a switch resistor circuit; a first operational amplifier, whose input terminal is connected to the switch resistor circuit; a second operational amplifier, whose input terminal is connected to an output terminal of the first operational amplifier through a resistor; a quantizer, whose input terminal is connected to the output terminal of the first operational amplifier. The output terminal of the second operational amplifier is connected, and its output terminal is used to output the signal after comparing and quantizing the output signal of the second operational amplifier; the digital-to-analog converter module, its input terminal is connected with the output terminal of the quantizer, and its output terminal Feedback is connected to the input of the first operational amplifier and the input of the second operational amplifier. The first operational amplifier and the second operational amplifier of the ADC circuit of the embodiment of the present invention are connected through a resistor, and the signal between the two is continuously transmitted, which is a continuous-time sigma-delta ADC structure, which can improve the performance of the ADC circuit. accuracy.
Description
技术领域technical field
本发明涉及电能计量领域,尤其涉及一种ADC电路、电能计量电路和电能计量系统。The invention relates to the field of electric energy metering, in particular to an ADC circuit, an electric energy metering circuit and an electric energy metering system.
背景技术Background technique
在电能计量领域,需要模数转换器(英文:Analog to Digital Converter,缩写:ADC)对输入的模拟信号进行采集、放大、并转换成数字信号供数字系统进行数字信号处理。In the field of electric energy measurement, an analog-to-digital converter (English: Analog to Digital Converter, abbreviation: ADC) is required to collect, amplify, and convert the input analog signal into a digital signal for the digital system to perform digital signal processing.
目前在电能计量领域的ADC主要有三种实现方式,其中第一种方式是将增益放大器(英文:Programable Gain Amplifier,缩写:PGA)集成在sigma delta ADC的采样电容中,通过调整采样电容的大小实现不同的增益放大倍数。这种结构需要增加自举升压(bootstrap)电路对PMOS开关实施boost,以传输负电平信号;此外,通过调整电容的大小来实现不同的增益放大倍数,会造成ADC第一级积分器的环路带宽降低,要达到合理带宽要求,必须增加运放的功耗。At present, there are three main implementation methods of ADC in the field of electric energy measurement. The first method is to integrate the gain amplifier (English: Programable Gain Amplifier, abbreviation: PGA) in the sampling capacitor of the sigma delta ADC, and realize it by adjusting the size of the sampling capacitor. Different gain magnifications. This structure needs to add a bootstrap circuit to boost the PMOS switch to transmit negative level signals; in addition, by adjusting the size of the capacitor to achieve different gain magnifications, it will cause loops in the first-stage integrator of the ADC. The bandwidth of the circuit is reduced. To meet the reasonable bandwidth requirements, the power consumption of the op amp must be increased.
第二种方式是使输入信号先通过一个连续时间的电阻型PGA实现对输入增益的控制,同时将信号输出到偏置在共模电压,直接输送给sigma delta ADC进行转换。这种结构的ADC电路在输入较大的负信号例如-1V时,开关无法关断,会产生漏电,从而造成PGA输出信号错误。The second way is to make the input signal pass through a continuous-time resistive PGA to control the input gain, and at the same time output the signal to the biased common-mode voltage, and directly send it to the sigma delta ADC for conversion. When an ADC circuit with this structure is input with a large negative signal such as -1V, the switch cannot be turned off, and leakage current will occur, thereby causing an error in the PGA output signal.
第三种方式是通过合理配置PGA和sigma delta ADC的增益实现零偏置输入的功能,进而实现了降低对sigma delta ADC的第一级积分器的带宽、功耗设计要求。但是,这种结构的ADC电路需要额外的展波运放,且额外PGA增加了噪声源,需要增加滤波电路,从而增加了电路的复杂性。The third way is to realize the function of zero bias input by rationally configuring the gain of PGA and sigma delta ADC, and then reduce the bandwidth and power consumption design requirements of the first-stage integrator of sigma delta ADC. However, the ADC circuit with this structure requires an additional wave spreader op amp, and the additional PGA increases the noise source, and the filter circuit needs to be added, thereby increasing the complexity of the circuit.
以上三种实现方式的ADC电路结构均采用离散时间sigma delta ADC的结构,这种结构对转换器内运放的带宽要求较高(一般大于10倍),功耗较大。此外,各通路输入端需要一个对较大RC电路进行抗混叠,增加了芯片成本以及PCB的生产成本。另外,离散时间结构的ADC对运放的建立等要求较高,在实现高精度ADC时,需要选择高性能的运放的需求。The ADC circuit structures of the above three implementations all adopt the discrete-time sigma delta ADC structure, which has higher requirements on the bandwidth of the operational amplifier in the converter (generally greater than 10 times), and consumes a lot of power. In addition, the input end of each channel needs an anti-aliasing circuit for a large RC circuit, which increases the cost of the chip and the production cost of the PCB. In addition, the ADC with a discrete-time structure has high requirements for the establishment of the operational amplifier. When implementing a high-precision ADC, it is necessary to select a high-performance operational amplifier.
发明内容Contents of the invention
技术问题technical problem
有鉴于此,本发明要解决的技术问题是,如何提高ADC电路的精度。In view of this, the technical problem to be solved by the present invention is how to improve the precision of the ADC circuit.
解决方案solution
为了解决上述技术问题,根据本发明的一实施例,提供了一种模数转换器ADC电路,包括:开关电阻电路;第一运算放大器,其输入端与所述开关电阻电路连接;第二运算放大器,其输入端通过电阻与所述第一运算放大器的输出端连接;量化器,其输入端与所述第二运算放大器的输出端连接,其输出端用于输出对所述第二运算放大器的输出信号进行比较量化后的信号;数模转换器模块,其输入端与所述量化器的输出端连接,其输出端反馈连接到所述第一运算放大器的输入端和所述第二运算放大器的输入端。In order to solve the above technical problems, according to an embodiment of the present invention, an analog-to-digital converter ADC circuit is provided, including: a switch resistance circuit; a first operational amplifier, whose input terminal is connected to the switch resistance circuit; a second operation Amplifier, its input end is connected with the output end of described first operational amplifier through resistance; Quantizer, its input end is connected with the output end of described second operational amplifier, and its output end is used for outputting to described second operational amplifier The output signal is compared with the quantized signal; the digital-to-analog converter module, its input terminal is connected to the output terminal of the quantizer, and its output terminal is feedback-connected to the input terminal of the first operational amplifier and the second operational amplifier amplifier input.
对于上述ADC电路,在一种可能的实现方式中,所述开关电阻电路由两个开关电阻阵列组成,所述开关电阻阵列包括:第一电阻,其一端连接待处理信号的输出端,其另一端连接所述第一运算放大器的输入端;至少一路开关电路,其包括第二电阻、第一开关和第二开关;所述第二电阻的一端与所述第一电阻的一端连接,所述第二电阻的另一端连接所述第一开关的第一端;所述第一开关的第二端接地,所述第一开关的第三端连接配置模块的第一控制引脚;所述第二开关的第二端连接所述第二电阻的另一端,所述第二开关的第一端连接所述第一电阻的另一端,所述第二开关的第三端连接所述配置模块的第二控制引脚。For the above ADC circuit, in a possible implementation, the switched resistor circuit is composed of two switched resistor arrays, and the switched resistor array includes: a first resistor, one end of which is connected to the output end of the signal to be processed, and the other end of which is connected to the output end of the signal to be processed. One end is connected to the input end of the first operational amplifier; at least one switch circuit includes a second resistor, a first switch and a second switch; one end of the second resistor is connected to one end of the first resistor, and the The other end of the second resistor is connected to the first end of the first switch; the second end of the first switch is grounded, and the third end of the first switch is connected to the first control pin of the configuration module; the second end of the first switch is connected to the first control pin of the configuration module; The second end of the second switch is connected to the other end of the second resistor, the first end of the second switch is connected to the other end of the first resistor, and the third end of the second switch is connected to the configuration module. Second control pin.
对于上述ADC电路,在一种可能的实现方式中,所述第一运算放大器包括第一正向输入端、第一反向输入端、第一正向输出端和第一反向输出端,所述第一正向输入端与一个所述开关电阻阵列连接,所述第一反向输入端与另一个所述开关电阻阵列连接,所述第一正向输入端与所述第一反向输出端之间连接有电容,所述第一反向输入端与所述第一运算放大器的第一正向输出端之间连接有电容。For the above ADC circuit, in a possible implementation manner, the first operational amplifier includes a first positive input terminal, a first negative input terminal, a first positive output terminal, and a first negative output terminal, so The first positive input terminal is connected to one of the switch resistor arrays, the first reverse input terminal is connected to another switch resistor array, and the first positive input terminal is connected to the first reverse output A capacitor is connected between the terminals, and a capacitor is connected between the first inverting input terminal and the first positive output terminal of the first operational amplifier.
对于上述ADC电路,在一种可能的实现方式中,所述第二运算放大器包括第二正向输入端、第二反向输入端、第二正向输出端和第二反向输出端,所述第二反向输入端与所述第一反向输出端之间连接有电阻,所述第二正向输入端与所述第一正向输出端之间连接有电阻,所述第二正向输入端与所述第二反向输出端之间连接有电容,所述第二反向输入端与所述第二正向输出端之间连接有电容。For the above ADC circuit, in a possible implementation manner, the second operational amplifier includes a second positive input terminal, a second negative input terminal, a second positive output terminal, and a second negative output terminal, so A resistor is connected between the second reverse input terminal and the first reverse output terminal, a resistor is connected between the second positive input terminal and the first positive output terminal, and the second positive A capacitor is connected between the forward input terminal and the second reverse output terminal, and a capacitor is connected between the second reverse input terminal and the second positive output terminal.
对于上述ADC电路,在一种可能的实现方式中,所述量化器的第一输入端与所述第二正向输出端连接,所述量化器的第二输入端与所述第二反向输出端连接。For the above ADC circuit, in a possible implementation manner, the first input terminal of the quantizer is connected to the second positive output terminal, and the second input terminal of the quantizer is connected to the second inverting output terminal. output connection.
对于上述ADC电路,在一种可能的实现方式中,所述数模转换器模块包括两个数模转换电路,一个所述数模转换器模块的输出端分别与所述第一正向输入端以及所述第一反向输入端连接,另一个所述数模转换器模块的输出端分别与所述第二正向输入端以及所述第二反向输入端连接。For the above ADC circuit, in a possible implementation manner, the digital-to-analog converter module includes two digital-to-analog conversion circuits, and the output terminal of one of the digital-to-analog converter modules is connected to the first positive input terminal respectively. and the first inverting input terminal is connected, and the output terminal of the other digital-to-analog converter module is respectively connected to the second positive input terminal and the second inverting input terminal.
对于上述ADC电路,在一种可能的实现方式中,所述第一开关和/或所述第二开关为场效应管;所述第一开关和/或所述第二开关的第一端、第二端和第三端分别为所述场效应管的源极、漏极和栅极。For the above ADC circuit, in a possible implementation manner, the first switch and/or the second switch is a field effect transistor; the first end of the first switch and/or the second switch, The second terminal and the third terminal are respectively the source, the drain and the gate of the field effect transistor.
为了解决上述技术问题,根据本发明的另一实施例,提供了一种电能计量电路,包括:电源、待测负载、第一采样电阻和ADC电路;其中,所述电源、所述待测负载和所述第一采样电阻串联为一个回路;所述ADC电路与所述第一采样电阻并联;所述ADC电路采用本发明实施例中任意一种结构的ADC电路;所述第一采样电阻的两端分别与所述ADC电路的开关电阻电路的两端连接。In order to solve the above technical problems, according to another embodiment of the present invention, an electric energy metering circuit is provided, including: a power supply, a load to be measured, a first sampling resistor, and an ADC circuit; wherein, the power supply, the load to be measured It is connected in series with the first sampling resistor to form a loop; the ADC circuit is connected in parallel with the first sampling resistor; the ADC circuit adopts an ADC circuit with any structure in the embodiment of the present invention; the first sampling resistor’s The two ends are respectively connected to the two ends of the switch resistance circuit of the ADC circuit.
为了解决上述技术问题,根据本发明的另一实施例,提供了一种电能计量电路,包括:电源、待测负载、第二采样电阻、第三采样电阻、第四采样电阻和ADC电路;其中,所述ADC电路采用本发明实施例中任意一种结构的ADC电路;所述第二采样电阻的一端连接所述电源与所述待测负载的连接端,所述第二采样电阻的另一端与所述第三采样电阻的一端以及所述ADC电路的开关电阻电路的一端连接;所述第三采样电阻的另一端接地;所述第四采样电阻的一端与所述ADC电路的开关电阻电路的另一端连接,所述第四采样电阻的另一端接地。In order to solve the above technical problems, according to another embodiment of the present invention, an electric energy metering circuit is provided, including: a power supply, a load to be measured, a second sampling resistor, a third sampling resistor, a fourth sampling resistor and an ADC circuit; wherein , the ADC circuit adopts an ADC circuit with any structure in the embodiment of the present invention; one end of the second sampling resistor is connected to the connection end between the power supply and the load to be measured, and the other end of the second sampling resistor One end of the third sampling resistor and one end of the switch resistor circuit of the ADC circuit are connected; the other end of the third sampling resistor is grounded; one end of the fourth sampling resistor is connected to the switch resistor circuit of the ADC circuit The other end of the fourth sampling resistor is connected to the ground.
为了解决上述技术问题,根据本发明的另一实施例,提供了一种电能计量系统,包括:电流计量电路和电压计量电路;其中,所述电流计量电路采用本发明实施例中任意一种结构的电能计量电路;所述电压计量电路采用本发明实施例中任意一种结构的的电能计量电路。In order to solve the above technical problems, according to another embodiment of the present invention, an electric energy metering system is provided, including: a current metering circuit and a voltage metering circuit; wherein, the current metering circuit adopts any structure in the embodiments of the present invention The electric energy metering circuit; the voltage metering circuit adopts the electric energy metering circuit of any structure in the embodiment of the present invention.
有益效果Beneficial effect
本发明实施例的ADC电路的第一运算放大器与第二运算放大器之间通过电阻连接,二者之间的信号是连续传输的,是一种连续时间的sigma-delta ADC结构,能够提高ADC电路的精度。此外,本发明实施例的ADC电路中第一运算放大器和开关电阻电路能够实现增益放大运放(PGA)的功能,无需采用独立的PGA,避免了PGA所引入的噪声,并且减少了采用的运放、电阻和电容的数量,可以节省芯片成本。The first operational amplifier and the second operational amplifier of the ADC circuit in the embodiment of the present invention are connected through a resistor, and the signal between the two is continuously transmitted, which is a continuous time sigma-delta ADC structure, which can improve the ADC circuit accuracy. In addition, the first operational amplifier and the switch resistor circuit in the ADC circuit of the embodiment of the present invention can realize the function of a gain amplification operational amplifier (PGA), without using an independent PGA, avoiding the noise introduced by the PGA, and reducing the number of operational amplifiers used. The number of amplifiers, resistors and capacitors can save chip cost.
根据下面参考附图对示例性实施例的详细说明,本发明的其它特征及方面将变得清楚。Other features and aspects of the present invention will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings.
附图说明Description of drawings
包含在说明书中并且构成说明书的一部分的附图与说明书一起示出了本发明的示例性实施例、特征和方面,并且用于解释本发明的原理。The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the invention and together with the description, serve to explain the principles of the invention.
图1示出根据本发明一实施例的模数转换器ADC电路的结构框图;Fig. 1 shows the structural block diagram of the analog-to-digital converter ADC circuit according to an embodiment of the present invention;
图2示出根据本发明另一实施例的模数转换器ADC电路的具体电路图;2 shows a specific circuit diagram of an analog-to-digital converter ADC circuit according to another embodiment of the present invention;
图3a示出根据本发明另一实施例的模数转换器ADC电路的开关电阻阵列与配置模块连接关系的电路示意图;3a shows a schematic circuit diagram of the connection relationship between the switch resistor array and the configuration module of the analog-to-digital converter ADC circuit according to another embodiment of the present invention;
图3b示出根据本发明一实施例的数模转换电路的具体电路图;Figure 3b shows a specific circuit diagram of a digital-to-analog conversion circuit according to an embodiment of the present invention;
图4示出根据本发明一实施例的电能计量电路的示意图;Fig. 4 shows a schematic diagram of an electric energy metering circuit according to an embodiment of the present invention;
图5示出根据本发明另一实施例的电能计量电路的示意图;Fig. 5 shows a schematic diagram of an electric energy metering circuit according to another embodiment of the present invention;
图6示出根据本发明一实施例的电能计量系统的示意图。Fig. 6 shows a schematic diagram of an electric energy metering system according to an embodiment of the present invention.
具体实施方式detailed description
以下将参考附图详细说明本发明的各种示例性实施例、特征和方面。附图中相同的附图标记表示功能相同或相似的元件。尽管在附图中示出了实施例的各种方面,但是除非特别指出,不必按比例绘制附图。Various exemplary embodiments, features, and aspects of the invention will be described in detail below with reference to the accompanying drawings. The same reference numbers in the figures indicate functionally identical or similar elements. While various aspects of the embodiments are shown in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
在这里专用的词“示例性”意为“用作例子、实施例或说明性”。这里作为“示例性”所说明的任何实施例不必解释为优于或好于其它实施例。The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments.
另外,为了更好的说明本发明,在下文的具体实施方式中给出了众多的具体细节。本领域技术人员应当理解,没有某些具体细节,本发明同样可以实施。在一些实例中,对于本领域技术人员熟知的方法、手段、元件和电路未作详细描述,以便于凸显本发明的主旨。In addition, in order to better illustrate the present invention, numerous specific details are given in the specific embodiments below. It will be understood by those skilled in the art that the present invention may be practiced without certain of the specific details. In some instances, methods, means, components and circuits well known to those skilled in the art have not been described in detail in order to highlight the gist of the present invention.
实施例1Example 1
图1示出根据本发明一实施例的模数转换器ADC电路的结构框图。如图1所示,该ADC电路主要包括:开关电阻电路110、第一运算放大器120、第二运算放大器130、量化器140、以及数模转换器模块150。其中,第一运算放大器120的输入端与开关电阻电路110连接,第二运算放大器130的输入端通过电阻160与第一运算放大器120的输出端连接,量化器140的输入端与第二运算放大器130的输出端连接,量化器140的输出端用于输出对所述第二运算放大器的输出信号进行比较量化后的信号,数模转换器模块150的输入端与量化器140的输出端连接,数模转换器模块150的输出端反馈连接到第一运算放大器120的输入端和第二运算放大器130的输入端。FIG. 1 shows a structural block diagram of an analog-to-digital converter ADC circuit according to an embodiment of the present invention. As shown in FIG. 1 , the ADC circuit mainly includes: a switch resistor circuit 110 , a first operational amplifier 120 , a second operational amplifier 130 , a quantizer 140 , and a digital-to-analog converter module 150 . Wherein, the input terminal of the first operational amplifier 120 is connected with the switch resistance circuit 110, the input terminal of the second operational amplifier 130 is connected with the output terminal of the first operational amplifier 120 through the resistor 160, the input terminal of the quantizer 140 is connected with the second operational amplifier The output terminal of 130 is connected, and the output terminal of quantizer 140 is used for outputting the signal after comparing and quantizing the output signal of the second operational amplifier, and the input terminal of digital-to-analog converter module 150 is connected with the output terminal of quantizer 140, The output terminal of the digital-to-analog converter module 150 is feedback-connected to the input terminal of the first operational amplifier 120 and the input terminal of the second operational amplifier 130 .
在一种可能的实现方式中,开关电阻电路110可以由两个开关电阻阵列组成,通过控制开关电阻阵列的开关断开或闭合,能够实现不同倍数的增益。In a possible implementation manner, the switched resistor circuit 110 may be composed of two switched resistor arrays, and by controlling switches of the switched resistor arrays to be turned on or off, gains of different multiples can be realized.
本实施例的ADC电路的第一运算放大器与第二运算放大器之间通过电阻连接,二者之间的信号是连续传输的,是一种连续时间的sigma-delta ADC结构,能够提高ADC电路的精度。此外,本实施例的ADC电路中第一运算放大器和开关电阻电路能够实现增益放大运放(PGA)的功能,无需采用独立的PGA,避免了PGA所引入的噪声,并且减少了采用的运放、电阻和电容的数量,可以节省芯片成本。The first operational amplifier and the second operational amplifier of the ADC circuit of this embodiment are connected through a resistor, and the signal between the two is continuously transmitted, which is a continuous-time sigma-delta ADC structure, which can improve the performance of the ADC circuit. precision. In addition, the first operational amplifier and the switch resistor circuit in the ADC circuit of this embodiment can realize the function of a gain amplification operational amplifier (PGA), without using an independent PGA, avoiding the noise introduced by the PGA, and reducing the number of operational amplifiers used. , the number of resistors and capacitors can save chip cost.
实施例2Example 2
图2示出根据本发明另一实施例的模数转换器ADC电路的具体电路图。图2中标号与图1相同的组件具有相同的功能,为简明起见,省略对这些组件的详细说明。FIG. 2 shows a specific circuit diagram of an analog-to-digital converter ADC circuit according to another embodiment of the present invention. Components with the same numbers in FIG. 2 as those in FIG. 1 have the same functions, and for the sake of brevity, detailed descriptions of these components are omitted.
在一种可能的实现方式中,图2所示的ADC电路的开关电阻电路110由两个开关电阻阵列111、112组成,其中,开关电阻阵列111和开关电阻阵列112可以为结构相同的模块。In a possible implementation, the switched resistor circuit 110 of the ADC circuit shown in FIG. 2 is composed of two switched resistor arrays 111 and 112, wherein the switched resistor array 111 and the switched resistor array 112 may be modules with the same structure.
如图3a所示,开关电阻阵列111、112可以包括:第一电阻310和四路开关电路。其中,第一电阻310的一端A连接待处理信号的输出端,另一端B连接第一运算放大器120的输入端。四路开关电路可以为结构相同的模块,各路开关电路可以均包括一个电阻和两个开关。具体地,以一路开关电路为例,该开关电路包括一个第二电阻320和两个开关321、322,其中,第二电阻320的一端A与第一电阻310的一端A连接,第二电阻320的另一端B连接第一开关321的第一端S;第一开关321的第二端D接地,第一开关321的第三端G连接配置模块的第一控制引脚;第二开关322的第二端D连接第二电阻320的另一端B,第二开关322的第一端S连接所述第一电阻310的另一端B,第二开关322的第三端G连接配置模块的第二控制引脚。As shown in FIG. 3 a , the switch resistor arrays 111 and 112 may include: a first resistor 310 and four switch circuits. Wherein, one end A of the first resistor 310 is connected to the output end of the signal to be processed, and the other end B is connected to the input end of the first operational amplifier 120 . The four switch circuits may be modules with the same structure, and each switch circuit may include a resistor and two switches. Specifically, taking a switch circuit as an example, the switch circuit includes a second resistor 320 and two switches 321, 322, wherein, one end A of the second resistor 320 is connected to one end A of the first resistor 310, and the second resistor 320 The other end B of the first switch 321 is connected to the first end S of the first switch 321; the second end D of the first switch 321 is grounded, and the third end G of the first switch 321 is connected to the first control pin of the configuration module; The second terminal D is connected to the other terminal B of the second resistor 320, the first terminal S of the second switch 322 is connected to the other terminal B of the first resistor 310, and the third terminal G of the second switch 322 is connected to the second terminal of the configuration module. control pin.
配置模块与开关电阻电路110的连接关系示意图如图3a所示,为了更清楚简洁的描述配置模块与开关电阻电路110的连接关系,图3a仅以一路开关电路为例,另外3路开关电路与配置模块的连接关系与图3a所述的连接关系一致。配置模块的第一控制引脚可以为SELB引脚,第二控制引脚可以为SEL引脚,该配置模块通过控制EN引脚以及S<1-0>引脚的信号,给SELB引脚和SEL引脚配置相应的值,从而可以控制四路开关电路中各组开关的是否选通,从而可以实现不同倍数的增益。EN引脚以及S<1-0>引脚的值与增益的关系可以如表1所示。The schematic diagram of the connection relationship between the configuration module and the switch resistance circuit 110 is shown in FIG. 3a. In order to describe the connection relationship between the configuration module and the switch resistance circuit 110 more clearly and concisely, FIG. The connection relationship of the configuration modules is consistent with the connection relationship described in Fig. 3a. The first control pin of the configuration module can be the SELB pin, and the second control pin can be the SEL pin. The configuration module controls the signals of the EN pin and the S<1-0> pin to the SELB pin and the S<1-0> pin. The SEL pin is configured with a corresponding value, so as to control whether each group of switches in the four-way switch circuit is gated, thereby achieving different multiples of gain. The relationship between the value of the EN pin and the S<1-0> pin and the gain can be shown in Table 1.
表1 EN引脚以及S<1-0>引脚的值与增益的关系Table 1 Relationship between EN pin and S<1-0> pin value and gain
在一种可能的实现方式中,开关电阻阵列111以及开关电阻阵列112的结构可以如图3a所示,如果第一电阻310的阻值为R,则第二电阻320的阻值可以为R,电阻330的阻值可以为R/2,电阻340的阻值可以为R/4,电阻350的阻值可以为R/8。如果要实现4倍增益,则可以使得第一开关321、开关331截止,第二开关322、开关332导通,从而使得第二电阻320、电阻330连通;并且使得开关341、开关351导通,开关342、开关352导通,以使得电阻340、电阻350不连通。也就是说,如果将开关电阻阵列111和开关电阻阵列112的等效阻值减少一倍,则本实施例的ADC电路的增益放大一倍。In a possible implementation manner, the structure of the switch resistor array 111 and the switch resistor array 112 can be shown in FIG. 3a, if the resistance value of the first resistor 310 is R, then the resistance value of the second resistor 320 can be R, The resistance value of the resistor 330 may be R/2, the resistance value of the resistor 340 may be R/4, and the resistance value of the resistor 350 may be R/8. If a 4-fold gain is to be realized, the first switch 321 and the switch 331 can be turned off, and the second switch 322 and the switch 332 are turned on, so that the second resistor 320 and the resistor 330 are connected; and the switch 341 and the switch 351 are turned on, The switch 342 and the switch 352 are turned on, so that the resistor 340 and the resistor 350 are not connected. That is to say, if the equivalent resistance values of the switch resistor array 111 and the switch resistor array 112 are doubled, the gain of the ADC circuit in this embodiment is doubled.
在一种可能的实现方式中,如图3a所示的开关电阻阵列中的开关可以均为场效应管,所述第一端S、所述第二端D和所述第三端G分别为场效应管的源极S、漏极D和栅极G。In a possible implementation, the switches in the switch resistor array shown in FIG. 3a may all be field effect transistors, and the first terminal S, the second terminal D and the third terminal G are respectively The source S, drain D and gate G of the field effect transistor.
需要说明的是,尽管以四路开关电路作为示例介绍了ADC电路的开关电阻电路结构如上,但本领域技术人员能够理解,本发明应不限于此。事实上,用户完全可根据个人喜好和/或实际应用场景灵活设定开关电路的路数,以实现期望的增益倍数。It should be noted that although a four-way switch circuit is used as an example to describe the switch resistance circuit structure of the ADC circuit as above, those skilled in the art can understand that the present invention should not be limited thereto. In fact, users can flexibly set the number of switching circuits according to personal preferences and/or actual application scenarios to achieve desired gain multiples.
本实施例的ADC电路的开关电阻电路结构,将四路开关电路中的各电阻的一端B一方面通过场效应管开关接地,另一方面通过另一个场效应管开关接到运算放大器的输入端,从而可以彻底断开不用的电阻对ADC电路性能的影响。在实际测试计量过程中,在一路开关电路中采用两个开关,在一个开关无法关断时还可以采用另一个开关关断,能够避免由于开关无法关断而产生的漏电问题,从而保证选择准确的放大增益。The switch resistor circuit structure of the ADC circuit of the present embodiment, one end B of each resistor in the four-way switch circuit is grounded through the field effect tube switch on the one hand, and is connected to the input terminal of the operational amplifier through another field effect tube switch on the other hand , so that the influence of unused resistors on the performance of the ADC circuit can be completely disconnected. In the actual test and measurement process, two switches are used in one switch circuit, and when one switch cannot be turned off, the other switch can be used to turn off, which can avoid the leakage problem caused by the switch cannot be turned off, thus ensuring accurate selection the amplification gain.
在一种可能的实现方式中,如图2所示,第一运算放大器120包括第一正向输入端、第一反向输入端、第一正向输出端和第一反向输出端,所述第一正向输入端与开关电阻阵列111连接,所述第一反向输入端与开关电阻阵列112连接,所述第一正向输入端与所述第一反向输出端之间连接有电容211,所述第一反向输入端与所述第一正向输出端之间连接有电容212。In a possible implementation manner, as shown in FIG. 2, the first operational amplifier 120 includes a first positive input terminal, a first negative input terminal, a first positive output terminal and a first negative output terminal, so The first positive input terminal is connected to the switch resistor array 111, the first reverse input terminal is connected to the switch resistor array 112, and the first positive input terminal is connected to the first reverse output terminal. A capacitor 211, a capacitor 212 is connected between the first inverting input terminal and the first positive output terminal.
在一种可能的实现方式中,如图2所示,第二运算放大器130包括第二正向输入端、第二反向输入端、第二正向输出端和第二反向输出端,所述第二反向输入端与所述第一反向输出端之间连接有电阻162,所述第二正向输入端与所述第一正向输出端之间连接有电阻161,所述第二正向输入端与第二反向输出端之间连接有电容221,所述第二反向输入端与第二正向输出端之间连接有电容222。电阻161与电阻162的阻值可以相同。In a possible implementation, as shown in FIG. 2, the second operational amplifier 130 includes a second positive input terminal, a second negative input terminal, a second positive output terminal and a second negative output terminal, so A resistor 162 is connected between the second reverse input terminal and the first reverse output terminal, a resistor 161 is connected between the second positive input terminal and the first positive output terminal, and the first A capacitor 221 is connected between the two forward input terminals and the second reverse output terminal, and a capacitor 222 is connected between the second reverse input terminal and the second forward output terminal. The resistance values of the resistor 161 and the resistor 162 can be the same.
需要说明的是,第一运算放大器120可以是具有斩波电路的运放,斩波电路能够降低运放的噪声,从而可以一定程度上提高ADC电路的测量精度。此外,电容211、电容212、电容221、以及电容222可以提高运放稳定性,也可以保证运放输出信号的准确性。It should be noted that the first operational amplifier 120 may be an operational amplifier with a chopper circuit, and the chopper circuit can reduce the noise of the operational amplifier, thereby improving the measurement accuracy of the ADC circuit to a certain extent. In addition, the capacitor 211, the capacitor 212, the capacitor 221, and the capacitor 222 can improve the stability of the operational amplifier, and can also ensure the accuracy of the output signal of the operational amplifier.
在一种可能的实现方式中,如图2所示,量化器140的第一输入端C1与第二运算放大器130的第二正向输出端连接,第二输入端C2与第二运算放大器130的第二反向输出端连接。根据具体应用场景和实际需要,量化器140可以为一位的比较器,也可以为4位或者8位的比较器。In a possible implementation, as shown in FIG. 2, the first input terminal C1 of the quantizer 140 is connected to the second positive output terminal of the second operational amplifier 130, and the second input terminal C2 is connected to the second positive output terminal of the second operational amplifier 130. The second inverting output terminal connection. According to specific application scenarios and actual needs, the quantizer 140 may be a one-bit comparator, or may be a 4-bit or 8-bit comparator.
在一种可能的实现方式中,如图2所示,数模转换器模块150可以包括两个数模转换电路151、152,其中,数模转换电路151的输出端分别与第一运算放大器120的第一正向输入端和第一反向输入端连接,数模转换电路152的输出端分别与第二运算放大器130的第二正向输入端和第二反向输入端连接,用于将量化器140输出的数字信号转化为模拟信号并反馈给第一运算放大器120和第二运算放大器130。In a possible implementation manner, as shown in FIG. 2 , the digital-to-analog converter module 150 may include two digital-to-analog conversion circuits 151 and 152, wherein the output terminals of the digital-to-analog conversion circuit 151 are respectively connected to the first operational amplifier 120 The first non-inverting input end and the first inverting input end of the digital-to-analog conversion circuit 152 are respectively connected with the second non-inverting input end and the second inverting input end of the second operational amplifier 130, for The digital signal output by the quantizer 140 is converted into an analog signal and fed back to the first operational amplifier 120 and the second operational amplifier 130 .
在一种可能的实现方式中,数模转换电路151与数模转换电路152的结构可以相同,都可以采用如图3b所示的结构,具体地,数模转换电路可以包括编码器360、锁存器370、电阻381、电阻382、开关391、开关392,其中,Mj[K]端为数模转换电路的输入端,与量化器140的输出端连接,Pj[K]为Mj[K]通过编码器360输出的信号,Vo1端以及Vo2端为数模转换电路的输出端,分别与第一运算放大器120的第一正向输入端和第一反向输入端连接,或者分别与第二运算放大器130的第二正向输入端和第二反向输入端连接。In a possible implementation manner, the structure of the digital-to-analog conversion circuit 151 and the digital-to-analog conversion circuit 152 can be the same, and both can adopt the structure shown in FIG. Register 370, resistance 381, resistance 382, switch 391, switch 392, wherein, Mj[K] end is the input end of digital-to-analog conversion circuit, is connected with the output end of quantizer 140, and Pj[K] is Mj[K] Through the signal output by the encoder 360, the Vo1 end and the Vo2 end are the output ends of the digital-to-analog conversion circuit, which are respectively connected with the first forward input end and the first reverse input end of the first operational amplifier 120, or respectively connected with the second The second non-inverting input terminal of the operational amplifier 130 is connected to the second inverting input terminal.
本实施例的ADC电路的第一运算放大器与第二运算放大器之间通过电阻连接,二者之间的信号是连续传输的,是一种连续时间的sigma-delta ADC结构,能够提高ADC电路的精度。此外,本实施例的ADC电路中第一运算放大器和开关电阻电路能够实现增益放大运放(PGA)的功能,无需采用独立的PGA,避免了PGA所引入的噪声,并且减少了采用的运放、电阻和电容的数量,可以节省芯片成本。The first operational amplifier and the second operational amplifier of the ADC circuit of this embodiment are connected through a resistor, and the signal between the two is continuously transmitted, which is a continuous-time sigma-delta ADC structure, which can improve the performance of the ADC circuit. precision. In addition, the first operational amplifier and the switch resistor circuit in the ADC circuit of this embodiment can realize the function of a gain amplification operational amplifier (PGA), without using an independent PGA, avoiding the noise introduced by the PGA, and reducing the number of operational amplifiers used. , the number of resistors and capacitors can save chip cost.
实施例3Example 3
图4示出根据本发明一实施例的电能计量电路的示意图,该电能计量电路可以用于测量家庭电路中的电流大小。如图4所示,该电能计量电路可以包括:电源510、待测负载520、第一采样电阻530和ADC电路540。Fig. 4 shows a schematic diagram of an electric energy metering circuit according to an embodiment of the present invention, and the electric energy metering circuit can be used to measure the magnitude of current in a household circuit. As shown in FIG. 4 , the electric energy metering circuit may include: a power supply 510 , a load to be measured 520 , a first sampling resistor 530 and an ADC circuit 540 .
具体地,电源510、待测负载520和第一采样电阻530串联为一个回路,待测负载520可以为家用电器等,所述回路可以为家庭电路中的一个包括家用电器的电路回路,ADC电路540与第一采样电阻530并联;ADC电路540可以为采用实施例1或实施例2所述结构的ADC电路;第一采样电阻530的两端分别与ADC电路540的开关电阻电路的两端连接。流经第一采样电阻530的电流经ADC电路540放大并转换成数字信号,通过外围处理电路,可以准确得出所述回路中电流的大小。Specifically, the power supply 510, the load to be tested 520, and the first sampling resistor 530 are connected in series to form a loop, the load to be tested 520 can be a household appliance, etc., and the loop can be a circuit loop including a household appliance in a household circuit, an ADC circuit 540 is connected in parallel with the first sampling resistor 530; the ADC circuit 540 can be an ADC circuit adopting the structure described in embodiment 1 or embodiment 2; the two ends of the first sampling resistor 530 are respectively connected to the two ends of the switch resistance circuit of the ADC circuit 540 . The current flowing through the first sampling resistor 530 is amplified by the ADC circuit 540 and converted into a digital signal, and the magnitude of the current in the loop can be accurately obtained through the peripheral processing circuit.
需要说明的是,可以在ADC电路540的开关电阻电路中外接一个电流源,为第一运算放大器的输入端提供一个小电流,从而可以为该级运放提供共模点,因此本实施例的电能计量电路可以保证外部大信号负输入时,ADC电路540仍可以正常工作,从而实现外部零偏置输入,节省成本。并且,本实施例的电能计量电路所采用的ADC电路540的精度高,从而可以保证该电能计量电路输出结果的准确性。It should be noted that a current source can be externally connected to the switch resistance circuit of the ADC circuit 540 to provide a small current for the input terminal of the first operational amplifier, thereby providing a common mode point for the operational amplifier of this stage. Therefore, the The electric energy metering circuit can ensure that the ADC circuit 540 can still work normally when the external large signal is negatively input, thereby realizing external zero bias input and saving costs. Moreover, the ADC circuit 540 used in the electric energy metering circuit of this embodiment has high precision, so that the accuracy of the output result of the electric energy metering circuit can be guaranteed.
实施例4Example 4
图5示出根据本发明另一实施例的电能计量电路的示意图,该电能计量电路可以用于测量家庭电路中的电压大小。如图5所示,该电能计量电路可以包括:电源610、待测负载620、第二采样电阻630、第三采样电阻640、第四采样电阻650和ADC电路660。Fig. 5 shows a schematic diagram of an electric energy metering circuit according to another embodiment of the present invention, and the electric energy metering circuit can be used to measure the voltage in a household circuit. As shown in FIG. 5 , the electric energy metering circuit may include: a power supply 610 , a load to be measured 620 , a second sampling resistor 630 , a third sampling resistor 640 , a fourth sampling resistor 650 and an ADC circuit 660 .
具体地,电源610和待测负载620可以组成家庭电路中的一个电路回路,待测负载620可以为家用电器等,ADC电路660可以为采用上述实施例中任意一种结构的ADC电路,第二采样电阻630的一端A连接电源610与待测负载620的连接端C,第二采样电阻630的另一端B与ADC电路660的开关电阻电路的一端连接;第三采样电阻640的一端A与ADC电路660的开关电阻电路的一端连接,所述第三采样电阻640的另一端B接地;第四采样电阻650的一端A与ADC电路660的开关电阻电路的另一端连接,第四采样电阻650的另一端B接地。Specifically, the power supply 610 and the load to be tested 620 can form a circuit loop in a home circuit, the load to be tested 620 can be a household appliance, etc., and the ADC circuit 660 can be an ADC circuit using any structure in the above-mentioned embodiments. One end A of the sampling resistor 630 is connected to the connection end C of the power supply 610 and the load to be measured 620, and the other end B of the second sampling resistor 630 is connected to one end of the switch resistor circuit of the ADC circuit 660; one end A of the third sampling resistor 640 is connected to the ADC One end of the switch resistor circuit of the circuit 660 is connected, and the other end B of the third sampling resistor 640 is grounded; one end A of the fourth sampling resistor 650 is connected to the other end of the switch resistor circuit of the ADC circuit 660, and the fourth sampling resistor 650 The other end B is grounded.
在一种可能的实现方式中,第三采样电阻640的阻值可以与第四采样电阻650的阻值相同,通过将第三采样电阻640两端的电压经ADC电路660放大并转换成数字信号,通过外围处理电路,可以准确得出所述回路中待测负载620两端的电压大小以及是否稳定等信息。In a possible implementation manner, the resistance value of the third sampling resistor 640 may be the same as that of the fourth sampling resistor 650, and the voltage across the third sampling resistor 640 is amplified by the ADC circuit 660 and converted into a digital signal, Through the peripheral processing circuit, information such as the magnitude and stability of the voltage at both ends of the load 620 to be tested in the loop can be accurately obtained.
此外,可以在ADC电路660的开关电阻电路中外接一个电流源,为第一运算放大器的输入端提供一个小电流,从而可以为该级运放提供共模点,因此本实施例的电能计量电路可以保证外部大信号负输入时,ADC电路660仍可以正常工作,从而实现外部零偏置输入,节省成本。并且,本实施例的电能计量电路所采用的ADC电路660的精度高,从而可以保证该电能计量电路输出结果的准确性。In addition, a current source can be externally connected to the switched resistance circuit of the ADC circuit 660 to provide a small current for the input terminal of the first operational amplifier, thereby providing a common mode point for the operational amplifier of this stage. Therefore, the electric energy measurement circuit of this embodiment It can be guaranteed that the ADC circuit 660 can still work normally when the external large signal is negatively input, thereby realizing external zero bias input and saving costs. Moreover, the ADC circuit 660 used in the electric energy metering circuit of this embodiment has high precision, so that the accuracy of the output result of the electric energy metering circuit can be guaranteed.
实施例5Example 5
图6示出根据本发明一实施例的电能计量系统的示意图,该电能计量系统可以用于测量家庭电路中的电流和/或电压大小。如图6所示,该电能计量系统可以包括:电流计量电路和电压计量电路。其中,所述电流计量电路可以为采用实施例3的电能计量电路,具体可以参见图4及其相关描述。所述电压计量电路可以为采用实施例4的电能计量电路,具体可以参见图5及其相关描述。其中,也可以将图4和图5中的电能计量电路结合为一个电路。如图6所示,电能计量系统可以包括电源710、待测负载720、第一采样电阻530、第二采样电阻630、第三采样电阻640、第四采样电阻650、ADC电路540和ADC电路660。电流计量电路和电压计量电路的电源、待测负载可以共用,测量电压时,也可以包括第一采样电阻530,由于第一采样电阻阻值较小,分压影响可以忽略。Fig. 6 shows a schematic diagram of an electric energy metering system according to an embodiment of the present invention, which can be used to measure the current and/or voltage in a household circuit. As shown in FIG. 6 , the electric energy metering system may include: a current metering circuit and a voltage metering circuit. Wherein, the current metering circuit may be the electric energy metering circuit of Embodiment 3, for details, please refer to FIG. 4 and its related descriptions. The voltage metering circuit may be the electric energy metering circuit of Embodiment 4, for details, refer to FIG. 5 and its related descriptions. Wherein, it is also possible to combine the electric energy metering circuits in Fig. 4 and Fig. 5 into one circuit. As shown in Figure 6, the electric energy metering system may include a power supply 710, a load to be measured 720, a first sampling resistor 530, a second sampling resistor 630, a third sampling resistor 640, a fourth sampling resistor 650, an ADC circuit 540 and an ADC circuit 660 . The power supply and the load to be measured of the current metering circuit and the voltage metering circuit can be shared, and the first sampling resistor 530 can also be included when measuring the voltage. Since the resistance of the first sampling resistor is small, the effect of voltage division can be ignored.
需要说明的是,本发明实施例的电能计量系统的电流计量电路和电压计量电路可以同时进行电路的测试计量,也可以分开进行,本领域人员应能理解,实施例3和实施例4所述的可能的实现方式均可应用于本实施例并能获得相同的有益效果,这里不再赘述。It should be noted that the current metering circuit and the voltage metering circuit of the electric energy metering system in the embodiment of the present invention can perform the test and measurement of the circuit at the same time, or separately, and those skilled in the art should understand that, as described in Embodiment 3 and Embodiment 4 All possible implementation manners can be applied to this embodiment and can obtain the same beneficial effect, and will not be repeated here.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. Should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.
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| CN108535539A (en) * | 2018-07-06 | 2018-09-14 | 南方电网科学研究院有限责任公司 | Electric energy meter in accordance with IR46 standard and analog front end thereof |
| CN114487615B (en) * | 2022-04-06 | 2022-08-30 | 基合半导体(宁波)有限公司 | Capacitance measuring circuit and capacitance measuring method |
| CN116170022B (en) * | 2023-03-01 | 2025-08-29 | 中微半导体(深圳)股份有限公司 | An ultra-high precision comparator and its control method |
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