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CN103681985B - Epitaxial wafer of a kind of light emitting diode and preparation method thereof - Google Patents

Epitaxial wafer of a kind of light emitting diode and preparation method thereof Download PDF

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CN103681985B
CN103681985B CN201310593671.9A CN201310593671A CN103681985B CN 103681985 B CN103681985 B CN 103681985B CN 201310593671 A CN201310593671 A CN 201310593671A CN 103681985 B CN103681985 B CN 103681985B
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gallium nitride
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CN103681985A (en
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刘华容
魏世祯
谢文明
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Boe Huacan Optoelectronics Suzhou Co ltd
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HC Semitek Suzhou Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/811Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0137Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials

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Abstract

本发明公开了一种发光二极管的外延片及其制作方法,属于半导体技术领域。该外延片包括衬底、生长在衬底上的低温缓冲层、非掺杂的氮化镓层、N型氮化镓层、多量子阱层和P型氮化镓层,从N型氮化镓层一侧开始的至少一个量子垒层采用AlxGa1-xN生长,0<x<0.3,从P型氮化镓层一侧开始的至少一个量子垒层采用InzGa1-zN生长,0<z<0.15,P型氮化镓层直接生长在多量子阱层上。本发明通过使靠近N型氮化镓层的量子垒层势垒较高,靠近P型氮化镓层的量子垒层势垒较低,在减小电子的溢流现象的同时可提高空穴的注入效率,使得更多的电子和空穴进入量子阱层中复合,从而提高发光二极管内量子效率。

The invention discloses an epitaxial wafer of a light-emitting diode and a manufacturing method thereof, belonging to the technical field of semiconductors. The epitaxial wafer includes a substrate, a low-temperature buffer layer grown on the substrate, a non-doped gallium nitride layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer. At least one quantum barrier layer from the side of the gallium layer is grown by Al x Ga 1-x N, 0<x<0.3, and at least one quantum barrier layer from the side of the P-type gallium nitride layer is grown by In z Ga 1-z N growth, 0<z<0.15, the P-type gallium nitride layer is directly grown on the multi-quantum well layer. In the present invention, the potential barrier of the quantum barrier layer close to the N-type GaN layer is relatively high, and the potential barrier of the quantum barrier layer close to the P-type GaN layer is relatively low, thereby reducing the overflow phenomenon of electrons and increasing the hole density. The high injection efficiency allows more electrons and holes to recombine into the quantum well layer, thereby improving the internal quantum efficiency of the light-emitting diode.

Description

一种发光二极管的外延片及其制作方法A kind of epitaxial wafer of light-emitting diode and its manufacturing method

技术领域technical field

本发明涉及半导体技术领域,特别涉及一种发光二极管的外延片及其制作方法。The invention relates to the technical field of semiconductors, in particular to an epitaxial wafer of a light emitting diode and a manufacturing method thereof.

背景技术Background technique

GaN(氮化镓)是第三代宽禁带半导体材料的典型代表,其优异的高热导率、耐高温、耐酸碱、高硬度等特性,使其被广泛地应用于制作蓝、绿、紫外发光二极管。GaN基发光二极管通常包括外延片和设于外延片上的电极。GaN (gallium nitride) is a typical representative of the third-generation wide-bandgap semiconductor materials. Its excellent high thermal conductivity, high temperature resistance, acid and alkali resistance, and high hardness make it widely used in the production of blue, green, and UV LEDs. GaN-based light emitting diodes generally include an epitaxial wafer and electrodes disposed on the epitaxial wafer.

现有的一种GaN基半导体发光外延片,其包括衬底、以及依次生长在衬底上的N型层、多量子阱层、电子阻挡层和P型层,其中,多量子阱的结构是InGaN/GaN,其对载流子起限制作用,当正向电流通过时,N型层中的电子和P型层中的空穴被限制在量子阱层中发光。电子阻挡层可以降低电子的溢流现象,从而提高载流子的注入效率,进而提高发光二极管的亮度。An existing GaN-based semiconductor light-emitting epitaxial wafer, which includes a substrate, and an N-type layer, a multi-quantum well layer, an electron blocking layer, and a P-type layer grown sequentially on the substrate, wherein the structure of the multi-quantum well is InGaN/GaN, which confines the carriers, when the forward current passes, the electrons in the N-type layer and the holes in the P-type layer are confined to emit light in the quantum well layer. The electron blocking layer can reduce the overflow phenomenon of electrons, thereby improving the injection efficiency of carriers, and further improving the brightness of the light-emitting diode.

在实现本发明的过程中,发明人发现现有技术至少存在以下问题:In the process of realizing the present invention, the inventor finds that there are at least the following problems in the prior art:

电子阻挡层在阻挡电子溢流的同时,也阻挡了空穴向量子阱中注入,导致发光二极管的内量子效率仍然较低,进而导致发光二极管的亮度的提高程度有限。While blocking electron overflow, the electron blocking layer also blocks holes from being injected into the quantum well, so that the internal quantum efficiency of the light-emitting diode is still low, and the improvement of the brightness of the light-emitting diode is limited.

发明内容Contents of the invention

为了解决现有技术的问题,本发明实施例提供了一种发光二极管的外延片及其制作方法。所述技术方案如下:In order to solve the problems in the prior art, an embodiment of the present invention provides an epitaxial wafer of a light emitting diode and a manufacturing method thereof. Described technical scheme is as follows:

一方面,本发明实施例提供了一种发光二极管的外延片,所述外延片包括衬底、生长在所述衬底上的低温缓冲层、非掺杂的氮化镓层、N型氮化镓层、多量子阱层和P型氮化镓层,所述多量子阱层为超晶格结构,所述超晶格结构包括交替生长的量子阱层和量子垒层,从所述N型氮化镓层一侧开始的至少一个量子垒层采用AlxGa1-xN生长,0<x<0.3,从所述P型氮化镓层一侧开始的至少一个量子垒层采用InzGa1-zN生长,0<z<0.15,所述P型氮化镓层直接生长在所述多量子阱层上。On the one hand, an embodiment of the present invention provides an epitaxial wafer of a light emitting diode, the epitaxial wafer includes a substrate, a low-temperature buffer layer grown on the substrate, a non-doped gallium nitride layer, an N-type nitride Gallium layer, multi-quantum well layer and P-type gallium nitride layer, the multi-quantum well layer is a superlattice structure, and the superlattice structure includes alternately grown quantum well layers and quantum barrier layers, from the N-type At least one quantum barrier layer starting from one side of the gallium nitride layer is grown by Al x Ga 1-x N, 0<x<0.3, and at least one quantum barrier layer starting from the side of the P-type gallium nitride layer is grown by In z Ga 1-z N growth, 0<z<0.15, the P-type gallium nitride layer is directly grown on the multiple quantum well layer.

优选地,从所述N型氮化镓层一侧开始的至少两个量子垒层采用AlxGa1-xN生长,从所述N型氮化镓层一侧开始的至少两个量子垒层中的Al组分含量固定不变或逐层升高或逐层降低。Preferably, at least two quantum barrier layers starting from one side of the N-type gallium nitride layer are grown using Al x Ga 1-x N, and at least two quantum barrier layers starting from the side of the N-type gallium nitride layer The Al component content in the layers is fixed or increases or decreases layer by layer.

优选地,从所述P型氮化镓层一侧开始的至少两个量子垒层采用InzGa1-zN生长,从所述P型氮化镓层一侧开始的至少两个量子垒层中的In组分含量固定不变或逐层升高或逐层降低。Preferably, at least two quantum barrier layers starting from one side of the P-type gallium nitride layer are grown using In z Ga 1-z N, and at least two quantum barrier layers starting from the side of the P-type gallium nitride layer The content of the In component in the layers is fixed or increases or decreases layer by layer.

优选地,所述多量子阱层的中间量子垒层的势垒高度大于或等于所述从所述P型氮化镓层一侧开始的至少一个量子垒层的势垒高度,所述中间量子垒层的势垒高度小于或等于所述从所述N型氮化镓层一侧开始的至少一个量子垒层的势垒高度,所述中间量子垒层为,除了所述从所述N型氮化镓层一侧开始的至少一个量子垒层和所述从所述P型氮化镓层一侧开始的至少一个量子垒层以外的量子垒层。Preferably, the barrier height of the middle quantum barrier layer of the multi-quantum well layer is greater than or equal to the barrier height of at least one quantum barrier layer starting from the side of the P-type gallium nitride layer, and the middle quantum The barrier height of the barrier layer is less than or equal to the barrier height of at least one quantum barrier layer starting from the side of the N-type gallium nitride layer, and the intermediate quantum barrier layer is, except for the N-type gallium nitride layer The at least one quantum barrier layer starting from one side of the gallium nitride layer and the quantum barrier layer other than the at least one quantum barrier layer starting from the side of the p-type gallium nitride layer.

进一步地,所述中间量子垒层为AlxGa1-xN层、InzGa1-zN层或GaN层。Further, the intermediate quantum barrier layer is an AlxGa1 - xN layer, an InzGa1 -zN layer or a GaN layer.

优选地,所述多量子阱层的各量子阱层的厚度分别为2-3nm,各量子垒层的厚度分别为10-20nm。Preferably, the thickness of each quantum well layer of the multiple quantum well layer is 2-3 nm, and the thickness of each quantum barrier layer is 10-20 nm.

进一步地,所述多量子阱层中的各量子垒层的厚度相等或不相等。Further, the thicknesses of the quantum barrier layers in the multiple quantum well layers are equal or unequal.

优选地,所述量子阱层为InGaN层,且所述从所述量子垒层中In的组分含量小于各个量子阱层中In的组分含量。Preferably, the quantum well layer is an InGaN layer, and the composition content of In in the quantum barrier layer is smaller than the composition content of In in each quantum well layer.

可选地,所述多量子阱层中的各量子垒层有硅掺杂。Optionally, each quantum barrier layer in the multiple quantum well layer is doped with silicon.

另一方面,本发明实施例提供了一种发光二极管的外延片的制作方法,所述方法包括:On the other hand, an embodiment of the present invention provides a method for manufacturing an epitaxial wafer of a light emitting diode, the method comprising:

提供一衬底;providing a substrate;

在所述衬底上生长低温缓冲层、非掺杂的氮化镓层、N型氮化镓层、多量子阱层和P型氮化镓层,所述多量子阱层为超晶格结构,所述超晶格结构包括交替生长的量子阱层和量子垒层,从所述N型氮化镓层一侧开始的至少一个量子垒层采用AlxGa1-xN生长,0<x<0.3,从所述P型氮化镓层一侧开始的至少一个量子垒层采用InzGa1-zN生长,0<z<0.15,所述P型氮化镓层直接生长在所述多量子阱层上。growing a low-temperature buffer layer, a non-doped gallium nitride layer, an n-type gallium nitride layer, a multi-quantum well layer and a p-type gallium nitride layer on the substrate, and the multi-quantum well layer is a superlattice structure , the superlattice structure includes alternately grown quantum well layers and quantum barrier layers, at least one quantum barrier layer starting from one side of the N-type gallium nitride layer is grown by Al x Ga 1-x N, 0<x <0.3, at least one quantum barrier layer from one side of the P-type GaN layer is grown using In z Ga 1-z N, 0<z<0.15, the P-type GaN layer is directly grown on the multiple quantum well layer.

本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solution provided by the embodiments of the present invention are:

通过将靠近N型氮化镓层的多量子阱层中至少一个量子垒层采用AlxGa1-xN生长,提高了该量子垒层的势垒高度,使电子减速,进而减少电子溢流。将靠近P型氮化镓层的多量子阱层中至少一个量子垒层采用InzGa1-zN生长,从而降低了对空穴的阻挡作用,提高了空穴的注入效率,最终使得有更多的电子和空穴被限制在量子阱中复合发光,从而提高了发光二极管的内量子效率。By growing at least one quantum barrier layer in the multi-quantum well layer close to the N-type gallium nitride layer using Al x Ga 1-x N, the barrier height of the quantum barrier layer is increased, electrons are decelerated, and electron overflow is reduced . At least one quantum barrier layer in the multi-quantum well layer close to the P-type gallium nitride layer is grown with In z Ga 1-z N, thereby reducing the blocking effect on holes and improving the injection efficiency of holes, and finally makes the More electrons and holes are confined in the quantum well to recombine and emit light, thereby improving the internal quantum efficiency of the LED.

附图说明Description of drawings

为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

图1是本发明实施例一提供的一种发光二极管的外延片的结构示意图;FIG. 1 is a schematic structural view of an epitaxial wafer of a light emitting diode provided in Embodiment 1 of the present invention;

图1a是图1所示外延片中一种多量子阱层的部分能带结构示意图;Fig. 1 a is a partial energy band structure schematic diagram of a kind of multi-quantum well layer in the epitaxial wafer shown in Fig. 1;

图1b是图1所示外延片中另一种多量子阱层的部分能带结构示意图;Fig. 1 b is a partial energy band structure schematic diagram of another multi-quantum well layer in the epitaxial wafer shown in Fig. 1;

图2是本发明实施例二提供的一种发光二极管的外延片的结构示意图;FIG. 2 is a schematic structural view of an epitaxial wafer of a light-emitting diode provided in Embodiment 2 of the present invention;

图3是本发明实施例三提供的一种发光二极管的外延片的制作方法的流程图;3 is a flow chart of a method for manufacturing an epitaxial wafer of a light-emitting diode provided in Embodiment 3 of the present invention;

图3a是实施例三提供的一种多量子阱层的生长结构示意图。Fig. 3a is a schematic diagram of a growth structure of a multi-quantum well layer provided in Embodiment 3.

具体实施方式detailed description

为使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明实施方式作进一步地详细描述。In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

实施例一Embodiment one

本发明实施例提供了一种发光二极管的外延片,参见图1,该外延片包括衬底1、生长在衬底1上的低温缓冲层2、非掺杂的氮化镓层3、N型氮化镓层4、多量子阱层5和P型氮化镓层6,多量子阱层5为超晶格结构,该超晶格结构包括量子阱层51和量子垒层52(见图1a和1b),量子阱层51和量子垒层52交替生长,其中,从N型氮化镓层一侧开始的至少一个量子垒层52a采用AlxGa1-xN生长,0<x<0.3,从P型氮化镓层一侧开始的至少一个量子垒层52b采用InzGa1-zN生长,0<z<0.15,并且P型氮化镓层6直接生长在多量子阱层5上。An embodiment of the present invention provides an epitaxial wafer of a light-emitting diode. Referring to FIG. Gallium nitride layer 4, multi-quantum well layer 5 and P-type gallium nitride layer 6, multi-quantum well layer 5 is a superlattice structure, and the superlattice structure includes quantum well layer 51 and quantum barrier layer 52 (see Figure 1a and 1b), quantum well layers 51 and quantum barrier layers 52 are grown alternately, wherein at least one quantum barrier layer 52a starting from the side of the N-type gallium nitride layer is grown by Al x Ga 1-x N, 0<x<0.3 , at least one quantum barrier layer 52b starting from one side of the P-type gallium nitride layer is grown by In z Ga 1-z N, 0<z<0.15, and the P-type gallium nitride layer 6 is directly grown on the multi-quantum well layer 5 superior.

优选地,多量子阱层的周期数为5-15,但是并不以此为限,可以根据实际需要设置。量子垒层52a优选为两个或者三个,量子垒层52b优选为一个或者两个。Preferably, the number of periods of the multi-quantum well layer is 5-15, but it is not limited thereto and can be set according to actual needs. There are preferably two or three quantum barrier layers 52a, and one or two quantum barrier layers 52b.

进一步地,当量子垒层52a(采用AlxGa1-xN生长)为至少两个时,至少两个量子垒层52a中的Al组分含量可以固定不变或逐层升高或逐层降低;当量子垒层52b(采用InzGa1-zN生长)为至少两个时,至少两个量子垒层52b中的In组分含量可以固定不变或逐层升高或逐层降低。其中,含量固定不变即沿从N型氮化镓层4至P型氮化镓层6的方向x和Z的值不发生变化;含量逐层升高或逐层降低即沿从N型氮化镓层4至P型氮化镓层6的方向x和Z的值逐层增大或逐层减小。Further, when there are at least two quantum barrier layers 52a (grown using AlxGa1 -xN ) , the Al component content in at least two quantum barrier layers 52a can be fixed or increased layer by layer or layer by layer decrease; when there are at least two quantum barrier layers 52b (grown using In z Ga 1-z N), the In composition content in at least two quantum barrier layers 52b can be fixed or increased layer by layer or decreased layer by layer . Wherein, the content is fixed, that is, the values of x and Z do not change along the direction from the N-type gallium nitride layer 4 to the P-type gallium nitride layer 6; the content increases or decreases layer by layer, that is, along the direction from the N-type gallium nitride layer The values of the directions x and Z from the GaN layer 4 to the P-type GaN layer 6 increase or decrease layer by layer.

在本实施例中,多量子阱层5还包括中间量子垒层52c,中间量子垒层52c的势垒高度大于或等于量子垒层52b的势垒高度,中间量子垒层52c的势垒高度小于或等于量子垒层52a的势垒高度,中间量子垒层52c为,除了从N型氮化镓层一侧开始的至少一个量子垒层52a和从P型氮化镓层一侧开始的至少一个量子垒层52b以外的量子垒层。量子垒层5a的势垒高度较高,可以使电子进行减速,减少电子溢流,从而使更多的电子集中到多量子阱中,量子垒层52b的势垒高度较低,可以减小对空穴的阻力,有利于空穴的注入,最终可以使更多的电子和空穴在量子阱中复合发光。In this embodiment, the multi-quantum well layer 5 also includes an intermediate quantum barrier layer 52c, the potential barrier height of the intermediate quantum barrier layer 52c is greater than or equal to the potential barrier height of the quantum barrier layer 52b, and the potential barrier height of the intermediate quantum barrier layer 52c is less than Or equal to the barrier height of the quantum barrier layer 52a, the intermediate quantum barrier layer 52c is, except at least one quantum barrier layer 52a starting from the side of the N-type gallium nitride layer and at least one starting from the side of the P-type gallium nitride layer Quantum barrier layers other than the quantum barrier layer 52b. The potential barrier height of the quantum barrier layer 5a is relatively high, which can slow down the electrons and reduce the overflow of electrons, so that more electrons can be concentrated into the multiple quantum wells. The potential barrier height of the quantum barrier layer 52b is low, which can reduce the interference The resistance of holes is conducive to the injection of holes, and finally more electrons and holes can recombine and emit light in the quantum well.

进一步地,中间量子垒层52c可以为AlxGa1-xN层、InzGa1-zN层或GaN层。Further, the intermediate quantum barrier layer 52c may be an AlxGa1 - xN layer, an InzGa1 -zN layer or a GaN layer.

更进一步地,量子阱层51为InGaN层,且量子垒层52b中In的组分含量小于各个量子阱层51中In的组分含量,以保证量子垒层的禁带宽度大于量子阱层的禁带宽度。容易知道,量子阱层51采用InGaN生长,但不限于有其他掺杂。Furthermore, the quantum well layer 51 is an InGaN layer, and the composition content of In in the quantum barrier layer 52b is smaller than that of In in each quantum well layer 51, to ensure that the forbidden band width of the quantum barrier layer is greater than that of the quantum well layer Bandwidth. It is easy to know that the quantum well layer 51 is grown by InGaN, but not limited to other doping.

作为本实施例的一个示例,参见图1a,多量子阱层可以包括三个量子垒层52a、三个量子垒层52b以及三个量子垒层52c。量子垒层52a中Al组分含量和量子垒层52b中In组分含量均固定,从图1a中可以看出,量子垒层52a的势垒高度最高,并且三个量子垒层52a因Al组分含量均相等故势垒高度相同;量子垒层52b的势垒高度最低,并且三个量子垒层52b因In组分含量均相等故势垒高度也相同;量子垒层52c的量子垒层的势垒高度小于量子垒层52a的势垒高度,量子垒层52c的势垒高度大于量子垒层52b的势垒高度。As an example of this embodiment, referring to FIG. 1a, the multiple quantum well layer may include three quantum barrier layers 52a, three quantum barrier layers 52b and three quantum barrier layers 52c. The content of the Al component in the quantum barrier layer 52a and the content of the In component in the quantum barrier layer 52b are all fixed. As can be seen from FIG. The component contents are equal so the barrier height is the same; the barrier height of the quantum barrier layer 52b is the lowest, and the three quantum barrier layers 52b are also the same because the In component content is equal; the quantum barrier layer of the quantum barrier layer 52c The potential barrier height is smaller than the potential barrier height of the quantum barrier layer 52a, and the potential barrier height of the quantum barrier layer 52c is greater than the potential barrier height of the quantum barrier layer 52b.

作为本实施例的另一个示例,参见图1b,多量子阱层可以包括三个量子垒层52a、三个量子垒层52c以及三个量子垒层52b。在这种结构中,量子垒层52a中Al组分含量逐层降低、量子垒层52b中In组分含量逐层增加,从图1b中可以看出,量子垒层52a的势垒高度最高,并且三个量子垒层52a因Al组分含量逐层降低故势垒高度也逐渐降低;量子垒层52b的势垒高度最低,并且三个量子垒层52b中In组分含量逐层增加,因此势垒高度逐渐降低;量子垒层52c的势垒高度小于量子垒层52a的势垒高度,量子垒层52c的势垒高度大于量子垒层52b的势垒高度。As another example of this embodiment, referring to FIG. 1b, the multiple quantum well layer may include three quantum barrier layers 52a, three quantum barrier layers 52c and three quantum barrier layers 52b. In this structure, the content of the Al component in the quantum barrier layer 52a decreases layer by layer, and the content of the In component in the quantum barrier layer 52b increases layer by layer. It can be seen from FIG. 1b that the barrier height of the quantum barrier layer 52a is the highest. And the three quantum barrier layers 52a also gradually reduce the barrier height because the Al component content decreases layer by layer; the potential barrier height of the quantum barrier layer 52b is the lowest, and the In component content in the three quantum barrier layers 52b increases layer by layer, so The barrier height gradually decreases; the barrier height of the quantum barrier layer 52c is smaller than that of the quantum barrier layer 52a, and the barrier height of the quantum barrier layer 52c is greater than that of the quantum barrier layer 52b.

容易知道,在满足量子垒层52c的势垒高度大于或者等于量子垒层52b的势垒高度,且量子垒层52c的势垒高度小于或者等于量子垒层52a的势垒高度的前提下,上述举例还可以是,量子垒层52a中Al组分含量固定、量子垒层52b中In组分含量逐层增加;或者是,量子垒层52a中Al组分含量逐层降低、量子垒层52b中In组分含量固定;或者是,量子垒层52a中Al组分含量逐层增加、量子垒层52b中In组分含量逐层降低;或者是,量子垒层52a中Al组分含量固定、量子垒层52b中In组分含量逐层降低;或者是,量子垒层52a中Al组分含量逐层增加、量子垒层52b中In组分含量固定。It is easy to know that under the premise that the barrier height of the quantum barrier layer 52c is greater than or equal to the barrier height of the quantum barrier layer 52b, and the barrier height of the quantum barrier layer 52c is less than or equal to the barrier height of the quantum barrier layer 52a, the above-mentioned For example, the content of the Al component in the quantum barrier layer 52a is fixed, and the content of the In component in the quantum barrier layer 52b increases layer by layer; or, the content of the Al component in the quantum barrier layer 52a decreases layer by layer, and the content of the In component in the quantum barrier layer 52b The content of the In component is fixed; or, the content of the Al component in the quantum barrier layer 52a increases layer by layer, and the content of the In component in the quantum barrier layer 52b decreases layer by layer; or, the content of the Al component in the quantum barrier layer 52a is fixed and the quantum The content of the In component in the barrier layer 52b decreases layer by layer; or, the content of the Al component in the quantum barrier layer 52a increases layer by layer, and the content of the In component in the quantum barrier layer 52b is fixed.

其中,优选为量子垒层52a中的Al组分含量逐层降低,量子垒层52b中的In组分含量逐层增加。在这种结构中,量子垒层52a中Al组分含量由多变少,则多量子垒层的势垒高度沿从N型氮化镓层到P型氮化镓层方向逐渐降低,有利于使从N氮化镓型方向向量子阱层迁移的电子减速,减少溢流;量子垒层52b中的In由少变多,则多量子垒层的势垒高度沿从P型氮化镓层到N型氮化镓层方向逐渐升高,有利于减少空穴从P型氮化镓方向向量子阱迁移的阻力。Wherein, preferably, the content of the Al component in the quantum barrier layer 52a decreases layer by layer, and the content of the In component in the quantum barrier layer 52b increases layer by layer. In this structure, as the content of the Al component in the quantum barrier layer 52a changes from more to less, the barrier height of the multi-quantum barrier layer gradually decreases along the direction from the N-type gallium nitride layer to the P-type gallium nitride layer, which is beneficial to The electrons that migrate from the N gallium nitride type direction to the quantum well layer are decelerated to reduce the overflow; the In in the quantum barrier layer 52b changes from less to more, and the barrier height of the multi-quantum barrier layer is along the direction from the P-type gallium nitride layer. Gradually rising toward the N-type GaN layer is beneficial to reduce the resistance of holes migrating from the P-type GaN layer to the quantum well.

优选地,多量子阱层5的各量子阱层的厚度为2-3nm,各量子垒层的厚度为10-20nm。由于采用InGaN生长而成的量子阱层51的In容易扩散,如果量子垒层52较薄,就不能很好地阻挡InGaN量子阱层51的In的扩散,且可能造成InGaN量子阱层51间的耦合;量子垒层52的厚度过厚,空穴不易进入到InGaN量子阱层51里,因此,限制量子垒层52的厚度,在阻挡量子阱层51的In扩散的同时还能保证空穴容易进入到量子阱层51里。此外,量子垒层52的厚度设置还会影响电子和空穴的迁移和晶体质量。例如,量子垒层加厚时,虽然可以提高晶体质量,但同时会增加对电子和空穴的阻挡作用,尤其是对空穴的阻挡,这会使得没有足够的电子和空穴在量子阱层中复合发光,从而会降低发光二极管的发光效率;反之,量子垒层减薄时,又会使晶体质量不好,导致抗静电能量差,因此量子垒层的厚度需要控制在合适范围。Preferably, the thickness of each quantum well layer of the multi-quantum well layer 5 is 2-3 nm, and the thickness of each quantum barrier layer is 10-20 nm. Because the In of the quantum well layer 51 formed by InGaN growth is easy to diffuse, if the quantum barrier layer 52 is thinner, the diffusion of In of the InGaN quantum well layer 51 cannot be blocked well, and may cause the InGaN quantum well layer 51. Coupling; the thickness of quantum barrier layer 52 is too thick, and hole is difficult for entering in the InGaN quantum well layer 51, therefore, limit the thickness of quantum barrier layer 52, can guarantee that hole is easy while blocking the In diffusion of quantum well layer 51. into the quantum well layer 51. In addition, the thickness setting of the quantum barrier layer 52 will also affect the migration of electrons and holes and crystal quality. For example, when the quantum barrier layer is thickened, although the crystal quality can be improved, it will also increase the blocking effect on electrons and holes, especially the blocking of holes, which will make there are not enough electrons and holes in the quantum well layer. If the quantum barrier layer is thinned, the quality of the crystal will be poor, resulting in poor antistatic energy. Therefore, the thickness of the quantum barrier layer needs to be controlled within an appropriate range.

进一步地,多量子阱层5中的各量子垒层的厚度可以相等或者不相等。多量子阱层5中的各量子垒层可以有Si(硅)掺杂,掺杂Si的多量子阱层有利于降低发光二极管的电阻。Further, the thicknesses of the quantum barrier layers in the multiple quantum well layer 5 may be equal or unequal. Each quantum barrier layer in the multi-quantum well layer 5 can be doped with Si (silicon), and the multi-quantum well layer doped with Si is beneficial to reduce the resistance of the light emitting diode.

可选地,衬底1包括但不限于蓝宝石衬底。Optionally, the substrate 1 includes but not limited to a sapphire substrate.

可选地,低温缓冲层2可以为氮化镓、氮化铝或铝镓氮等材料。Optionally, the low-temperature buffer layer 2 may be made of materials such as gallium nitride, aluminum nitride, or aluminum gallium nitride.

可选地,N型氮化镓层4的上面可直接生长多量子阱层5,也可插入其他缓冲层或应力释放层后再生长多量子阱层5。在本实施例中,N型氮化镓层4可以为Si掺杂的GaN层,但不限于Si掺杂,该N型GaN层可以为单层也可以为多层。Optionally, the multi-quantum well layer 5 can be directly grown on the N-type gallium nitride layer 4 , or the multi-quantum well layer 5 can be grown after inserting other buffer layers or stress release layers. In this embodiment, the N-type GaN layer 4 may be a Si-doped GaN layer, but not limited to Si-doped, and the N-type GaN layer may be a single layer or a multi-layer.

可选地,P型氮化镓层6采用Mg(镁)掺杂的GaN作为生长材料,容易知道,本实施例中P型氮化镓层6不限于Mg掺杂,P型氮化镓层6可以为单层也可以为多层。Optionally, the P-type gallium nitride layer 6 uses Mg (magnesium) doped GaN as the growth material. It is easy to know that the P-type gallium nitride layer 6 in this embodiment is not limited to Mg doping, and the P-type gallium nitride layer 6 can be a single layer or multiple layers.

可选地,该外延片结构还可以包括在P型氮化镓层6上生长的P型接触层7。Optionally, the epitaxial wafer structure may also include a P-type contact layer 7 grown on the P-type GaN layer 6 .

本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solution provided by the embodiments of the present invention are:

通过将靠近N型氮化镓层的多量子阱层中至少一个量子垒层采用AlxGa1-xN生长,提高了该量子垒层的势垒高度,使电子减速,进而减少电子溢流。将靠近P型氮化镓层的多量子阱层中至少一个量子垒层采用InzGa1-zN生长,从而降低了对空穴的阻挡作用,提高了空穴的注入效率,最终使得有更多的电子和空穴被限制在量子阱中复合发光,从而提高了发光二极管的内量子效率。By growing at least one quantum barrier layer in the multi-quantum well layer close to the N-type gallium nitride layer using Al x Ga 1-x N, the barrier height of the quantum barrier layer is increased, electrons are decelerated, and electron overflow is reduced . At least one quantum barrier layer in the multi-quantum well layer close to the P-type gallium nitride layer is grown with In z Ga 1-z N, thereby reducing the blocking effect on holes and improving the injection efficiency of holes, and finally makes the More electrons and holes are confined in the quantum well to recombine and emit light, thereby improving the internal quantum efficiency of the LED.

实施例二Embodiment two

本发明实施例提供了一种发光二极管的外延片,本实施例的外延片的结构与实施例一的外延片的结构基本相同,不同之处在于,该外延片的多量子阱层5不包括中间量子垒层52c。An embodiment of the present invention provides an epitaxial wafer of a light-emitting diode. The structure of the epitaxial wafer in this embodiment is basically the same as that of the epitaxial wafer in Embodiment 1. The difference is that the multi-quantum well layer 5 of the epitaxial wafer does not include The middle quantum barrier layer 52c.

参见图2,该外延片从下往上包括衬底1、低温缓冲层2、非掺杂的氮化镓层3、N型氮化镓层4、多量子阱层5和P型氮化镓层6,多量子阱层5为超晶格结构,每个周期包括量子阱层51和量子垒层52,量子阱层51和量子垒层52交替生长,其中,从N型氮化镓层一侧开始的至少一个量子垒层52a采用AlxGa1-xN生长,0<x<0.3,从P型氮化镓层一侧开始的至少一个量子垒层52b采用InzGa1-zN生长,0<z<0.15,并且P型氮化镓层6直接生长在多量子阱层5上。Referring to FIG. 2, the epitaxial wafer includes a substrate 1, a low-temperature buffer layer 2, an undoped gallium nitride layer 3, an N-type gallium nitride layer 4, a multi-quantum well layer 5, and a P-type gallium nitride layer from bottom to top. Layer 6, multi-quantum well layer 5 is a superlattice structure, each period includes quantum well layer 51 and quantum barrier layer 52, quantum well layer 51 and quantum barrier layer 52 grow alternately, wherein, from N-type gallium nitride layer- At least one quantum barrier layer 52a starting from the P-type gallium nitride layer is grown using Al x Ga 1-x N, 0<x<0.3, and at least one quantum barrier layer 52b starting from the side of the P-type gallium nitride layer is grown using In z Ga 1-z N growth, 0<z<0.15, and the P-type gallium nitride layer 6 is directly grown on the multi-quantum well layer 5 .

本实施例的外延片除了不包括中间量子垒层52c外,其他的结构和特性均与实施例一相同,在此不再赘述。Except that the epitaxial wafer in this embodiment does not include the intermediate quantum barrier layer 52c, other structures and characteristics are the same as those in Embodiment 1, and will not be repeated here.

本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solution provided by the embodiments of the present invention are:

通过将靠近N型氮化镓层的多量子阱层中至少一个量子垒层采用AlxGa1-xN生长,提高了该量子垒层的势垒高度,使电子减速,减少电子溢流。将靠近P型氮化镓层的多量子阱层中至少一个量子垒层采用InzGa1-zN生长,从而降低了对空穴的阻挡作用,提高了空穴的注入效率,最终使得有更多的电子和空穴被限制在量子阱中复合发光,从而提高了发光二极管的内量子效率。By growing at least one quantum barrier layer in the multi-quantum well layer close to the N-type gallium nitride layer using AlxGa1 -xN , the potential barrier height of the quantum barrier layer is increased, electrons are decelerated, and electron overflow is reduced. At least one quantum barrier layer in the multi-quantum well layer close to the P-type gallium nitride layer is grown with In z Ga 1-z N, thereby reducing the blocking effect on holes and improving the injection efficiency of holes, and finally makes the More electrons and holes are confined in the quantum well to recombine and emit light, thereby improving the internal quantum efficiency of the LED.

实施例三Embodiment three

本发明实施例提供了一种发光二极管的外延片的制作方法,参见图3,方法包括:An embodiment of the present invention provides a method for manufacturing an epitaxial wafer of a light-emitting diode. Referring to FIG. 3 , the method includes:

步骤301:提供一衬底;Step 301: providing a substrate;

可选地,在本实施例中,衬底包括但不限于蓝宝石衬底。Optionally, in this embodiment, the substrate includes but not limited to a sapphire substrate.

在实现时,可以将衬底在1300℃的H2气氛下进行热处理10分钟,清洁表面。At the time of implementation, the substrate can be heat-treated at 1300 °C for 10 minutes under H2 atmosphere to clean the surface.

步骤302:在衬底上依次生长低温缓冲层、非掺杂的氮化镓层、N型氮化镓层;Step 302: growing a low-temperature buffer layer, a non-doped gallium nitride layer, and an N-type gallium nitride layer sequentially on the substrate;

可选地,在本实施例中,低温缓冲层可以为氮化镓层,也可以为氮化铝层或者铝镓氮层。具体地,在550℃温度下,在衬底表面生长以GaN为材料的低温缓冲层,其厚度为20-30nm。Optionally, in this embodiment, the low-temperature buffer layer may be a gallium nitride layer, or may be an aluminum nitride layer or an aluminum gallium nitride layer. Specifically, at a temperature of 550° C., a low-temperature buffer layer made of GaN is grown on the surface of the substrate with a thickness of 20-30 nm.

具体地,生长非掺杂的氮化镓层可以是,将温度升至1100℃,在低温缓冲层上生长一层厚度为3μm的非掺杂的GaN层,即高温缓冲层。Specifically, growing the non-doped gallium nitride layer may be to raise the temperature to 1100° C., and grow a non-doped GaN layer with a thickness of 3 μm on the low-temperature buffer layer, that is, the high-temperature buffer layer.

可选地,N型氮化镓层的上面可直接生长多量子阱层,也可插入其他缓冲层或应力释放层后再生长多量子阱层。在本实施例中,N型氮化镓层可以硅掺杂的GaN层,但不限于Si掺杂,该N型GaN层可以为单层也可以为多层。具体地,在缓冲层上生长一层厚度为2μm的Si掺杂的GaN。容易知道,N型氮化镓层不限于Si掺杂。Optionally, the multi-quantum well layer can be directly grown on the N-type gallium nitride layer, or the multi-quantum well layer can be grown after inserting other buffer layers or stress release layers. In this embodiment, the N-type GaN layer may be a silicon-doped GaN layer, but not limited to Si-doped, and the N-type GaN layer may be a single layer or a multi-layer. Specifically, a layer of Si-doped GaN with a thickness of 2 μm is grown on the buffer layer. It is easy to know that the N-type GaN layer is not limited to Si doping.

步骤303:在N型氮化镓层上生长多量子阱层,多量子阱层为超晶格结构,该超晶格结构包括交替生长的量子阱层和量子垒层;Step 303: growing a multi-quantum well layer on the N-type gallium nitride layer, the multi-quantum well layer is a superlattice structure, and the superlattice structure includes alternately grown quantum well layers and quantum barrier layers;

其中,多从N型氮化镓层一侧开始的至少一个量子垒层采用AlxGa1-xN生长,0<x<0.3,从P型氮化镓层一侧开始的至少一个量子垒层采用InzGa1-zN生长,0<z<0.15,并且P型氮化镓层直接生长在多量子阱层最上端的量子垒层上。Among them, at least one quantum barrier layer starting from the side of the N-type gallium nitride layer is grown by Al x Ga 1-x N, 0<x<0.3, and at least one quantum barrier layer starting from the side of the P-type gallium nitride layer The layer is grown by In z Ga 1-z N, 0<z<0.15, and the P-type gallium nitride layer is directly grown on the uppermost quantum barrier layer of the multiple quantum well layer.

优选地,多量子阱层的周期数为5-15,但是并不以此为限,可以根据实际需要设置。从N型氮化镓层一侧开始的量子垒层优选为两个或者三个,从P型氮化镓层一侧开始的量子垒层优选为一个或者两个。Preferably, the number of periods of the multi-quantum well layer is 5-15, but it is not limited thereto and can be set according to actual needs. There are preferably two or three quantum barrier layers starting from the side of the N-type gallium nitride layer, and preferably one or two quantum barrier layers starting from the side of the P-type gallium nitride layer.

进一步地,当从N型氮化镓层一侧开始的量子垒层(采用AlxGa1-xN生长)为至少两个时,至少两个量子垒层中的Al组分含量可以固定或逐层升高或逐层降低;当从P型氮化镓层一侧开始的量子垒层(采用InzGa1-zN生长)为至少两个时,至少两个量子垒层中的In组分含量可以固定不变或逐层升高或逐层降低。其中,含量固定不变即沿从N型氮化镓层至P型氮化镓层的方向x和Z的值不发生变化;含量逐层升高或逐层降低即沿从N型氮化镓层至P型氮化镓层的方向x和Z的值逐渐增大或逐渐减小。Further, when there are at least two quantum barrier layers (grown by Al x Ga 1-x N) starting from one side of the N-type gallium nitride layer, the Al component content in at least two quantum barrier layers can be fixed or Increase layer by layer or decrease layer by layer; when there are at least two quantum barrier layers (grown with In z Ga 1-z N) from the side of the P-type gallium nitride layer, the In in at least two quantum barrier layers The component content can be fixed or increased or decreased layer by layer. Among them, the content is fixed, that is, the values of x and Z do not change along the direction from the N-type GaN layer to the P-type GaN layer; the content increases or decreases layer by layer, that is, along the direction from the N-type GaN layer The values of x and Z in the direction from the layer to the P-type gallium nitride layer gradually increase or decrease gradually.

其中,优选为从N型氮化镓层一侧开始的至少一个量子垒层中的Al组分含量逐层降低,从P型氮化镓层一侧开始的至少一个量子垒层中的In组分含量逐层增加。在这种结构中,Al组分含量由多变少,则多量子垒层的势垒高度沿从N型氮化镓层到P型氮化镓层方向逐渐降低,有利于使从N氮化镓型方向向量子阱层迁移的电子减速,减少溢流;第二量子阱层的量子垒层中的In由少变多,则多量子垒层的势垒高度沿从P型氮化镓层到N型氮化镓层方向逐渐升高,有利于减少空穴从P型氮化镓方向向量子阱迁移的阻力。Among them, it is preferable that the Al component content in at least one quantum barrier layer starting from the side of the N-type gallium nitride layer decreases layer by layer, and the content of the In composition in the at least one quantum barrier layer starting from the side of the P-type gallium nitride layer The component content increases layer by layer. In this structure, as the content of the Al component changes from more to less, the barrier height of the multi-quantum barrier layer gradually decreases along the direction from the N-type gallium nitride layer to the P-type gallium nitride layer, which is conducive to making the transition from N-type GaN layer to P-type GaN layer. The electrons migrating to the quantum well layer in the direction of gallium decelerate, reducing overflow; the In in the quantum barrier layer of the second quantum well layer changes from less to more, and the barrier height of the multi-quantum barrier layer increases from the P-type gallium nitride layer Gradually rising toward the N-type GaN layer is beneficial to reduce the resistance of holes migrating from the P-type GaN layer to the quantum well.

更进一步地,量子阱层为InGaN层,且量子垒层中In的组分含量均小于各个量子阱层中In的组分含量,以保证量子垒层的禁带宽度大于量子阱层的禁带宽度。容易知道,量子阱层采用InGaN生长,但不限于有其他掺杂。Furthermore, the quantum well layer is an InGaN layer, and the composition content of In in the quantum barrier layer is smaller than that of In in each quantum well layer, so as to ensure that the forbidden band width of the quantum barrier layer is greater than that of the quantum well layer width. It is easy to know that the quantum well layer is grown by InGaN, but not limited to other doping.

在本实施中,该外延片的多量子阱层5还包括中间量子垒层,即除了从N型氮化镓层一侧开始的至少一个量子垒层和从P型氮化镓层一侧开始的至少一个量子垒层以外的量子垒层。In this implementation, the multi-quantum well layer 5 of the epitaxial wafer also includes an intermediate quantum barrier layer, that is, in addition to at least one quantum barrier layer starting from the side of the N-type gallium nitride layer and starting from the side of the P-type gallium nitride layer at least one quantum barrier layer other than the quantum barrier layer.

在本实施例中,中间量子垒层的势垒高度小于或等于从N型氮化镓层一侧开始的至少一个量子垒层的势垒高度,大于或等于从P型氮化镓层一侧开始的至少一个量子垒层的势垒高度。从N型氮化镓层一侧开始的至少一个量子垒层的势垒高度较高,可以使电子进行减速,减少电子溢流,从而使更多的电子集中到多量子阱中,从P型氮化镓层一侧开始的至少一个量子垒层的势垒高度较低,可以减小对空穴的阻力,有利于空穴的注入,最终可以使更多的电子和空穴在量子阱中复合发光。In this embodiment, the barrier height of the intermediate quantum barrier layer is less than or equal to the barrier height of at least one quantum barrier layer starting from the side of the N-type gallium nitride layer, and greater than or equal to the barrier height of at least one quantum barrier layer starting from the side of the P-type gallium nitride layer. The initial barrier height of at least one quantum barrier layer. The barrier height of at least one quantum barrier layer starting from the side of the N-type gallium nitride layer is relatively high, which can slow down the electrons and reduce the overflow of electrons, so that more electrons can be concentrated in the multiple quantum wells. From the P-type The barrier height of at least one quantum barrier layer starting from one side of the gallium nitride layer is lower, which can reduce the resistance to holes, facilitate the injection of holes, and finally make more electrons and holes in the quantum well Composite glow.

进一步地,中间量子垒层的生长可以为GaN层、InzGa1-zN层或AlxGa1-xN层。Further, the growth of the intermediate quantum barrier layer may be a GaN layer, an In z Ga 1-z N layer or an Al x Ga 1-x N layer.

在其他实施例中,该外延片的多量子阱层5可以不包括中间量子垒层。In other embodiments, the multiple quantum well layer 5 of the epitaxial wafer may not include an intermediate quantum barrier layer.

优选地,多量子阱层的各量子阱层的厚度为2-3nm,各量子垒层的厚度为10-20nm。由于量子阱层的In会扩散,如果量子垒层较薄,就不能很好地阻挡量子阱层的In的扩散,且可能造成量子阱层间的耦合;量子垒层的厚度过厚,空穴不易进入到量子阱层里,因此,限制量子垒层的厚度,在阻挡InGaN量子阱层的In扩散的同时还能保证空穴容易进入到量子阱层里。此外,量子垒层52的厚度设置还会影响电子和空穴的迁移和晶体质量。例如,量子垒层加厚时,虽然可以提高晶体质量,但同时会增加对电子和空穴的阻挡作用,尤其是对空穴的阻挡,这会使得没有足够的电子和空穴在量子阱层中复合发光,从而会降低发光二极管的发光效率;反之,量子垒层减薄时,又会使晶体质量不好,导致抗静电能量差,因此量子垒层的厚度需要控制在合适范围。Preferably, the thickness of each quantum well layer of the multi-quantum well layer is 2-3 nm, and the thickness of each quantum barrier layer is 10-20 nm. Because the In of the quantum well layer can diffuse, if the quantum barrier layer is thinner, the diffusion of the In of the quantum well layer cannot be blocked well, and may cause the coupling between the quantum well layers; the thickness of the quantum barrier layer is too thick, and the hole It is not easy to enter the quantum well layer. Therefore, the thickness of the quantum barrier layer is limited to prevent the In diffusion of the InGaN quantum well layer and ensure that holes can easily enter the quantum well layer. In addition, the thickness setting of the quantum barrier layer 52 will also affect the migration of electrons and holes and crystal quality. For example, when the quantum barrier layer is thickened, although the crystal quality can be improved, it will also increase the blocking effect on electrons and holes, especially the blocking of holes, which will make there are not enough electrons and holes in the quantum well layer. If the quantum barrier layer is thinned, the quality of the crystal will be poor, resulting in poor antistatic energy. Therefore, the thickness of the quantum barrier layer needs to be controlled within an appropriate range.

进一步地,多量子阱层中的各量子垒层的厚度可以相等或者不相等。多量子阱层中的各量子垒层包括但不限于Si掺杂。掺杂Si有利于降低发光二极管的电阻。Further, the thicknesses of the quantum barrier layers in the multiple quantum well layers may be equal or unequal. Each quantum barrier layer in a multiple quantum well layer includes, but is not limited to, Si doping. Doping Si is beneficial to reduce the resistance of light-emitting diodes.

结合图3a,例如,先在N型氮化镓层上生长四个多量子阱层即交替生长四个量子阱层51、和量子垒层52a,再生长两个多量子阱层即交替生长两个量子阱层51和量子垒层52c,再生长两个多量子阱层即交替生长两个量子阱层51和量子垒层52b,进而形成多量子阱层。其中,量子阱层均采用InGaN生长,且各量子阱层中In的组分相同。量子垒层52a采用AlGaN生长,其中Al的组分分别为25%,20%,15%和10%。量子垒层52c采用GaN生长,而量子垒层52b采用InGaN生长,其中In的组分分别为5%和10%。各个量子阱层的厚度均为2.5nm,各个量子垒层的厚度可以为2-3nm。3a, for example, first grow four multi-quantum well layers on the N-type gallium nitride layer, that is, alternately grow four quantum well layers 51 and quantum barrier layers 52a, and then grow two multi-quantum well layers, that is, alternately grow two quantum well layers. A quantum well layer 51 and a quantum barrier layer 52c, and then grow two multi-quantum well layers, that is, alternately grow two quantum well layers 51 and quantum barrier layers 52b, and then form a multi-quantum well layer. Wherein, the quantum well layers are all grown by InGaN, and the composition of In in each quantum well layer is the same. The quantum barrier layer 52a is grown by AlGaN, wherein the Al components are 25%, 20%, 15% and 10% respectively. The quantum barrier layer 52c is grown by GaN, and the quantum barrier layer 52b is grown by InGaN, wherein the components of In are 5% and 10% respectively. The thickness of each quantum well layer is 2.5nm, and the thickness of each quantum barrier layer can be 2-3nm.

需要说明的是,该例中多量子阱层中的各量子阱层和量子垒层的层数仅为本实施例举例,不作为对本发明的限制。It should be noted that the number of quantum well layers and quantum barrier layers in the multi-quantum well layer in this example is only an example of this embodiment, and is not intended to limit the present invention.

步骤304:在多量子阱层的最后一个量子垒层上生长P型氮化镓层;Step 304: growing a P-type gallium nitride layer on the last quantum barrier layer of the multi-quantum well layer;

可选地,P型氮化镓层采用Mg(镁)掺杂的GaN作为生长材料,容易知道,本实施例中P型氮化镓层不限于Mg掺杂,也可采用其他掺杂,P型氮化镓层可以为单层也可以为多层。具体地,在多量子阱层的最后一个量子垒层上生长P型镁掺杂的GaN,其厚度约为300nm。Optionally, the P-type gallium nitride layer uses Mg (magnesium) doped GaN as the growth material. It is easy to know that the P-type gallium nitride layer in this embodiment is not limited to Mg doping, and other doping can also be used. The GaN-type GaN layer can be a single layer or a multi-layer. Specifically, P-type Mg-doped GaN is grown on the last quantum barrier layer of the multi-quantum well layer, and its thickness is about 300 nm.

在本实施例中,该方法还包括步骤305:在P型氮化镓层上生长P型接触层。In this embodiment, the method further includes step 305: growing a P-type contact layer on the P-type GaN layer.

需要说明的是,在具体实现中,本发明实施例可以采用高纯H2或者N2作为载气,采用TMGa、TMAl、TMIn和NH3分别作为Ga源、Al源、In源和N源,采用分别SiH4和Cp2Mg作为N型和P型掺杂剂,采用金属有机化学气相沉积设备或者其他设备完成外延片生长。It should be noted that in specific implementation, the embodiment of the present invention can use high-purity H2 or N2 as the carrier gas, and use TMGa, TMAl, TMIn and NH3 as Ga source, Al source, In source and N source respectively, Use SiH 4 and Cp 2 Mg as N-type and P-type dopants respectively, and use metal-organic chemical vapor deposition equipment or other equipment to complete epitaxial wafer growth.

本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solution provided by the embodiments of the present invention are:

通过将靠近N型氮化镓层的多量子阱层中至少一个量子垒层采用AlxGa1-xN生长,提高了该量子垒层的势垒高度,使电子减速,减少电子溢流。将靠近P型氮化镓层的多量子阱层中至少一个量子垒层采用InzGa1-zN生长,从而降低了对空穴的阻挡作用,提高了空穴的注入效率,最终使得有更多的电子和空穴被限制在量子阱中复合发光,从而提高了发光二极管的内量子效率。By growing at least one quantum barrier layer in the multi-quantum well layer close to the N-type gallium nitride layer using AlxGa1 -xN , the potential barrier height of the quantum barrier layer is increased, electrons are decelerated, and electron overflow is reduced. At least one quantum barrier layer in the multi-quantum well layer close to the P-type gallium nitride layer is grown with In z Ga 1-z N, thereby reducing the blocking effect on holes and improving the injection efficiency of holes, and finally making the More electrons and holes are confined in the quantum well to recombine and emit light, thereby improving the internal quantum efficiency of the LED.

以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (10)

1. an epitaxial wafer for light emitting diode, described epitaxial wafer comprises substrate, is grown on described substrateGallium nitride layer, n type gallium nitride layer, multiple quantum well layer and the P type gallium nitride layer of low temperature buffer layer, non-doping,Described multiple quantum well layer is superlattice structure, and described superlattice structure comprises quantum well layer and the amount of alternating growthSon is built layer, it is characterized in that,
At least one quantum barrier layer starting from described n type gallium nitride layer one side adopts AlxGa1-xN growth,0 < x < 0.3, at least one quantum barrier layer starting from described P type gallium nitride layer one side adopts InzGa1-zN growth,0 < z < 0.15, described P type gallium nitride layer is grown directly upon on described multiple quantum well layer.
2. epitaxial wafer according to claim 1, is characterized in that, from described n type gallium nitride layer one sideAt least two quantum barrier layers that start adopt AlxGa1-xN growth, starts from described n type gallium nitride layer one sideAl constituent content at least two quantum barrier layers immobilizes or successively raises or successively reduce.
3. epitaxial wafer according to claim 1, is characterized in that, from described P type gallium nitride layer one sideAt least two quantum barrier layers that start adopt InzGa1-zN growth, starts from described P type gallium nitride layer one sideIn constituent content at least two quantum barrier layers immobilizes or successively raises or successively reduce.
4. epitaxial wafer according to claim 1, is characterized in that, the intermediate quantity of described multiple quantum well layerThe barrier height that son is built layer is more than or equal to described at least one amount starting from described P type gallium nitride layer one sideSon is built the barrier height of layer, and the barrier height of described middle quantum barrier layer is less than or equal to described from described N-typeThe barrier height of at least one quantum barrier layer that gallium nitride layer one side starts, described middle quantum barrier layer is to removeDescribed at least one quantum barrier layer starting from described n type gallium nitride layer one side and described from described P type nitrogenQuantum barrier layer beyond at least one quantum barrier layer that change gallium layer one side starts.
5. epitaxial wafer according to claim 4, is characterized in that, described middle quantum barrier layer isAlxGa1-xN layer, InzGa1-zN layer or GaN layer.
6. epitaxial wafer according to claim 1, is characterized in that, each quantum of described multiple quantum well layerThe thickness of trap layer is respectively 2~3nm, and the thickness of each quantum barrier layer is respectively 10~20nm.
7. epitaxial wafer according to claim 1, is characterized in that, the each amount in described multiple quantum well layerThe thickness that son is built layer is equal or unequal.
8. epitaxial wafer according to claim 1, is characterized in that, described quantum well layer is InGaN layer,And in described quantum barrier layer, the constituent content of In is less than the constituent content of In in each quantum well layer.
9. epitaxial wafer according to claim 1, is characterized in that, the each amount in described multiple quantum well layerSon is built layer silicon doping.
10. a preparation method for the epitaxial wafer of light emitting diode, described method comprises:
One substrate is provided;
In gallium nitride layer, n type gallium nitride layer, the volume of described Grown low temperature buffer layer, non-dopingSub-trap layer and P type gallium nitride layer, described multiple quantum well layer is superlattice structure, described superlattice structure comprisesThe quantum well layer of alternating growth and quantum barrier layer, is characterized in that,
At least one quantum barrier layer starting from described n type gallium nitride layer one side adopts AlxGa1-xN growth,0 < x < 0.3, at least one quantum barrier layer starting from described P type gallium nitride layer one side adopts InzGa1-zN growth,0 < z < 0.15, described P type gallium nitride layer is grown directly upon on described multiple quantum well layer.
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