CN103810983A - Driving integrated circuit - Google Patents

Abstract

A driving integrated circuit includes a signal processing circuit, a receiver, and a termination resistance providing circuit. The receiver is coupled to the first transmission line and the second transmission line, and outputs a transmission signal to the signal processing circuit after receiving the transmission signal through the first transmission line and the second transmission line. The termination resistor providing circuit is coupled to the receiver.

Description

Driver IC

technical field

The present invention relates to a driving circuit, and in particular to a driving integrated circuit.

Background technique

Flat panel displays are widely used products today. In order to realize the realism and vividness of the picture of the flat-panel display, it is inevitable to increase the picture resolution and increase the picture update frequency, so the high-speed application of the flat-panel display is born accordingly. Facing the demand of high-speed applications, the reflection and attenuation of the transmission line make it difficult to increase the frequency of flat-panel displays. Therefore, the transmission line must have proper impedance matching.

Traditionally, impedance-matched termination resistors have been placed on the printed circuit board closest to the input of the driver IC. However, the high-speed signal that actually enters the driver integrated circuit will inevitably still pass through a path of impedance mismatch, resulting in distortion of the high-speed signal and reducing the actual maximum speed of the high-speed signal.

Contents of the invention

The invention relates to a driving integrated circuit.

According to the present invention, a driver integrated circuit is proposed. The driving integrated circuit includes a signal processing circuit, a receiver and a terminal resistance supply circuit. The receiver is coupled to the first transmission line and the second transmission line, receives a transmission signal through the first transmission line and the second transmission line, and outputs it to the signal processing circuit. The termination resistor provides the circuit and is coupled to the receiver.

In order to have a better understanding of the above and other aspects of the present invention, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a block diagram of a driving integrated circuit with a terminal resistor providing circuit.

FIG. 2 is a schematic diagram of the driving integrated circuit according to the first embodiment.

FIG. 3 is a schematic diagram of a driver integrated circuit according to a second embodiment.

FIG. 4 is a schematic diagram of a driving integrated circuit according to a third embodiment.

FIG. 5 is a schematic diagram of a driving integrated circuit according to a fourth embodiment.

FIG. 6 is a schematic diagram of a driving integrated circuit according to a fifth embodiment.

FIG. 7 is a schematic diagram of a driving integrated circuit according to a sixth embodiment.

FIG. 8 is a schematic diagram of a display driving circuit according to the seventh embodiment.

FIG. 9 is a schematic diagram of a display driving circuit according to the eighth embodiment.

FIG. 10 is a schematic diagram of a display driving circuit according to the ninth embodiment.

FIG. 11 is a schematic diagram of a display according to the ninth embodiment.

[Description of main component labels]

10: Driver integrated circuit 11: Signal processing circuit

12: Receiver 13, 13(1)～16(6): Terminal resistance supply circuit

20P, 20N: transmission line 30: timing controller

40, 50, 60, 70: printed circuit board 80: substrate

90: Display panel 111: Analog circuit

112: Digital circuit 121: Protection circuit

R1～Rn, R11～R1n, R21～R2n: terminal resistance

SW1～SW4, SW11～R1n, SW21～SW2n

Detailed ways

Please refer to FIG. 1 . FIG. 1 is a block diagram of a driving integrated circuit with a terminal resistor providing circuit. The driving integrated circuit 10 includes a signal processing circuit 11 , a receiver 12 and a terminal resistor providing circuit 13 . The signal processing circuit 11 further includes an analog circuit 111 and a digital circuit 112 . The digital circuit 112 is coupled to the analog circuit 111 , and the analog circuit 111 is coupled to the receiver 12 . The receiver 12 is coupled to the transmission line 20P and the transmission line 20N, and receives a transmission signal through the transmission line 20P and the transmission line 20N, and outputs it to the signal processing circuit 11 . For example, the driving integrated circuit 10 is, for example, a source driving integrated circuit, and the driving integrated circuit 10 receives the transmission signal generated by the timing controller. The driver integrated circuit 10 is multi-drived by the timing controller branch. That is to say, one channel of the timing controller is connected to the receivers 12 of several driving integrated circuits 10 at the same time. The termination resistor providing circuit 13 is coupled to the receiver 12 . The receiver 12 further includes a protection circuit 121 , and the terminal resistor providing circuit 13 is coupled to the protection circuit 121 . The protection circuit 121 is coupled to the transmission line 20P and the transmission line 20N.

The aforementioned terminal resistance providing circuit 13 is built in the driving integrated circuit 10 and can provide a terminal resistance between the transmission line 20P and the transmission line 20N. Therefore, not only can the path of impedance mismatch be shortened and the quality of the transmission signal be improved, but also the highest frequency that the transmission signal can reach can be increased.

first embodiment

Please refer to FIG. 2 , which is a schematic diagram of a driving integrated circuit according to the first embodiment. The aforementioned terminal resistor providing circuit 13 is described in the first embodiment by taking the terminal resistor providing circuit 13 ( 1 ) as an example. The terminal resistance providing circuit 13(1) includes a terminal resistance R1. One end of the terminal resistor R1 is electrically connected to the transmission line 20P, and the other end of the terminal resistor R1 is electrically connected to the transmission line 20N.

second embodiment

Please refer to FIG. 3 , which is a schematic diagram of a driving integrated circuit according to a second embodiment. The aforementioned terminal resistance providing circuit 13 is described in the second embodiment by taking the terminal resistance providing circuit 13(2) as an example. Termination resistance supply circuit 13(2) includes termination resistance R1, switch SW1, and switch SW2. One end of the terminal resistor R1 is coupled to the transmission line 20P via the switch SW1 , and the other end of the terminal resistor R1 is coupled to the transmission line 20N via the switch SW2 .

third embodiment

Please refer to FIG. 4 , which is a schematic diagram of a driving integrated circuit according to a third embodiment. The aforementioned termination resistor providing circuit 13 is described in the third embodiment by taking the termination resistor providing circuit 13 ( 3 ) as an example. The terminal resistance providing circuit 13(3) includes a switch SW3, a terminal resistance R1, and a terminal resistance R2. One end of the switch SW3 is coupled to the transmission line 20P via the terminal resistor R1 , and the other end of the switch SW3 is coupled to the transmission line 20N via the terminal resistor R1 .

Fourth embodiment

Please refer to FIG. 5 , which is a schematic diagram of a driving integrated circuit according to a fourth embodiment. The aforementioned termination resistor providing circuit 13 is described in the fourth embodiment by taking the termination resistor providing circuit 13 ( 4 ) as an example. The termination resistor providing circuit 13 ( 4 ) includes a termination resistor R1 and a switch SW4 , one end of the termination resistor R1 is coupled to the transmission line 20P via the switch SW4 , and the other end of the termination resistor R1 is coupled to the transmission line 20N.

fifth embodiment

Please refer to FIG. 6 , which is a schematic diagram of a driving integrated circuit according to a fifth embodiment. The aforementioned terminal resistor providing circuit 13 is described in the fifth embodiment by taking the terminal resistor providing circuit 13 ( 5 ) as an example. The termination resistor providing circuit 13(5) includes switches SW21-SW2n, termination resistors R11-R1n and termination resistors R21-R2n, one end of the termination resistors R11-R1n is coupled to the transmission line 20P. One ends of the switches SW21-SW2n are respectively coupled to the other ends of the terminal resistors R11-R1n, the other ends of the switches SW21-SW2n are respectively coupled to one ends of the terminal resistors R21-R2n, and the other ends of the terminal resistors R21-R2n are coupled to the transmission line 20N.

Sixth embodiment

Please refer to FIG. 7 , which is a schematic diagram of a driving integrated circuit according to a sixth embodiment. The aforementioned termination resistor providing circuit 13 is described in the sixth embodiment by taking the termination resistor providing circuit 13 ( 6 ) as an example. Termination resistance supply circuit 13 ( 6 ) includes termination resistances R1 to Rn and switches SW11 to SW1n. One ends of the switches SW11˜SW1n are coupled to the transmission line 20P, and the other ends of the switches SW11˜SW1n are respectively coupled to one ends of the termination resistors R1˜Rn. The other ends of the terminal resistors R1 ˜ Rn are coupled to the transmission line 20N.

Seventh embodiment

Please refer to FIG. 8 , which is a schematic diagram of a display driving circuit according to a seventh embodiment. It should be noted that each solid line shown in FIG. 8 includes several transmission lines for transmitting transmission signals. The timing controller 30 branches to drive several driver integrated circuits 10 via the printed circuit board 40 , and branches to drive several driver integrated circuits 10 via the printed circuit board 50 . Since the terminal resistor is built into the driving integrated circuit 10, the path of impedance mismatch is shortened, the signal quality of the high-speed signal is greatly improved, and the highest frequency that the high-speed signal can reach is also increased.

Eighth embodiment

Please refer to FIG. 9 , which is a schematic diagram of a display driving circuit according to an eighth embodiment. It should be noted that each solid line shown in FIG. 9 includes several transmission lines for transmitting transmission signals. The timing controller 30 branches and drives several driving integrated circuits 10 through the printed circuit board 40 and the printed circuit board 50 , and drives several driving integrated circuits 10 through the printed circuit board 50 . Since the terminal resistor is built into the driving integrated circuit 10, the path of impedance mismatch is shortened, the signal quality of the high-speed signal is greatly improved, and the highest frequency that the high-speed signal can reach is also increased.

Ninth embodiment

Please refer to FIG. 10 , which is a schematic diagram of a display driving circuit according to a ninth embodiment. It should be noted that each solid line shown in FIG. 10 includes several transmission lines for transmitting transmission signals. The timing controller 30 branches and drives several driving integrated circuits 10 via the printed circuit board 60 . Since the terminal resistor is built into the driving integrated circuit 10, the path of impedance mismatch is shortened, the signal quality of the high-speed signal is greatly improved, and the highest frequency that the high-speed signal can reach is also increased.

Tenth embodiment

Please refer to FIG. 11 , which is a schematic diagram of a display according to a ninth embodiment. It should be noted that each solid line shown in FIG. 11 includes several transmission lines for transmitting transmission signals. The timing controller 30 is disposed on the printed circuit board 70 , and the driving integrated circuit 10 and the display panel are disposed on the substrate 80 to form a Chip-On-Glass (COG) substrate. The timing controller 30 is electrically connected to the driving integrated circuit 10 via the printed circuit board 70 and the substrate 80 . Since the terminal resistor is built into the driving integrated circuit 10, the path of impedance mismatch is shortened, the signal quality of the high-speed signal is greatly improved, and the highest frequency that the high-speed signal can reach is also increased.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims (9)

1. A driver integrated circuit, comprising: a signal processing circuit; A receiver, coupled to a first transmission line and a second transmission line, receives a transmission signal through the first transmission line and the second transmission line, and outputs it to the signal processing circuit; and A terminating resistor provides circuitry coupled to the receiver. 2. The driving integrated circuit according to claim 1 , wherein the termination resistance providing circuit comprises a termination resistance, one end of the termination resistance is electrically connected to the first transmission line, and the other end of the termination resistance is electrically connected to the first transmission line. Two transmission lines. 3. The driving integrated circuit according to claim 2, wherein the termination resistance providing circuit comprises a termination resistance, a first switch and a second switch, and one end of the termination resistance is coupled to the first switch through the first switch. The other end of the terminal resistor is coupled to the second transmission line through the second switch. 4. The drive integrated circuit according to claim 2, wherein the termination resistance providing circuit comprises a switch, a first termination resistance and a second termination resistance, one end of the switch is coupled to the first termination resistance through the first termination resistance A transmission line, the other end of the switch is coupled to the second transmission line through the second terminal resistor. 5. The driving integrated circuit according to claim 2, wherein the termination resistance providing circuit comprises a termination resistance and a switch, one end of the termination resistance is coupled to the first transmission line through the switch, and the other end of the termination resistance is coupled to connected to the second transmission line. 6. The drive integrated circuit according to claim 2, wherein the termination resistance providing circuit comprises a plurality of switches, a plurality of first termination resistances and a plurality of second termination resistances, one end of the plurality of first termination resistances is coupled to For the first transmission line, one end of the plurality of switches is respectively coupled to the other end of the plurality of first terminating resistors, and the other end of the plurality of switches is respectively coupled to one end of the plurality of second terminating resistors. The other end of the second termination resistor is coupled to the second transmission line. 7. The driver integrated circuit according to claim 2 , wherein the termination resistance providing circuit comprises a plurality of termination resistances and a plurality of switches, one end of the plurality of switches is coupled to the first transmission line, and the other end of the plurality of switches are respectively coupled to one end of the plurality of termination resistors, and the other ends of the plurality of termination resistors are coupled to the second transmission line. 8. The driving integrated circuit according to claim 1, wherein the receiver comprises a protection circuit, and the termination resistor providing circuit is coupled to the protection circuit. 9. The driver integrated circuit according to claim 1, wherein the driver integrated circuit is driven by a timing controller branch.

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