CN103904106A - Super barrier rectifier device structure - Google Patents
Super barrier rectifier device structure Download PDFInfo
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- CN103904106A CN103904106A CN201410145434.0A CN201410145434A CN103904106A CN 103904106 A CN103904106 A CN 103904106A CN 201410145434 A CN201410145434 A CN 201410145434A CN 103904106 A CN103904106 A CN 103904106A
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- 230000004888 barrier function Effects 0.000 title description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 15
- 229920005591 polysilicon Polymers 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 239000007772 electrode material Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 claims 16
- 210000000746 body region Anatomy 0.000 claims 1
- 239000002344 surface layer Substances 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 7
- 238000000034 method Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- OKZIUSOJQLYFSE-UHFFFAOYSA-N difluoroboron Chemical compound F[B]F OKZIUSOJQLYFSE-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/422—PN diodes having the PN junctions in mesas
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
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- Electrodes Of Semiconductors (AREA)
Abstract
本发明提供一种超势垒整流器器件结构，所述超势垒整流器器件结构采用沟槽型MOS结构作为场终止结构，所述沟槽型MOS结构包括沟槽、结合于所述沟槽表面的介质层、以及填充于沟槽内的多晶硅层。本发明通过在原有的超势垒整流器器件结构中增加沟槽型MOS结构作为场终止结构，可以进一步增加器件的反向击穿电压，降低反向漏电流，本发明可以满足更高的器件使用场合要求，而且结构简单，适用于各种电子设备的整流应用领域。
The present invention provides a super-barrier rectifier device structure. The super-barrier rectifier device structure adopts a trench-type MOS structure as a field termination structure. The trench-type MOS structure includes a trench and a A dielectric layer and a polysilicon layer filled in the trench. The present invention can further increase the reverse breakdown voltage of the device and reduce the reverse leakage current by adding a trench type MOS structure as the field termination structure in the original super-barrier rectifier device structure, and the present invention can meet higher device usage Occasion requirements, and simple structure, suitable for rectification application fields of various electronic equipment.
Description
Technical field
The invention belongs to semiconductor device structure field, particularly relate to a kind of superpotential and build rectifier device structure.
Background technology
In October, 2006, the people such as V.Rodov have delivered the article of a piece " Super Barrier Rectifier-A New Generation of Power Diode " by name, mention first super barrier rectifier (SBR:Super Barrier Rectifier) and its principle, structure, technique and performance are described in detail in article.Nowadays both at home and abroad some companies successfully develop a series of products on its basis, and voltage is from tens volts to several hectovolts, and electric current is from several amperes to tens amperes etc.There is the advantages such as efficiency height and good reliability due to SBR and be widely used in vehicle electronics, the fields such as computer adapter.Specifically, its efficiency highly depends primarily on that forward conduction voltage drop is low, switching speed is fast, turn-off electric leakage less and reverse recovery time short factors; It is strong that good reliability depends primarily on shock resistance, and SBR discharges impact energy by PN junction, and traditional Schottky diode can only release energy by Schottky barrier.With regard to its technique, super barrier rectifier is similar to the VDMOS technique of existing maturation; Also similar with VDMOS with regard to its structure, difference be only grid (gate) sources (source) method of attachment, VDMOS grid source be separate and SBR calls anode (anode) grid source short circuit; With regard to its principle, because grid source short circuit has caused a kind of special effects, when namely grid source adds positive voltage simultaneously, in VDMOS, be called the region meeting transoid of raceway groove, so just, reduced raceway groove and intermetallic barrier height, thereby reduced forward voltage drop, super potential barrier is also gained the name thus.
As shown in Figure 1, it comprises the device architecture of existing a kind of super barrier rectifier substantially: the first conductivity type substrate 101 and bottom electrode 102; Be incorporated into first conductive type epitaxial layer 103 on described the first conductivity type substrate surface; Be incorporated into the gate dielectric layer 104 on described the first conductive type epitaxial layer surface; Be incorporated into the electrode material 105 on described gate dielectric layer surface; And top electrode 106;
Described the first conductive type epitaxial layer top layer is formed with several spaced second conduction type doped regions 107 and is formed at the first conduction type doped region 108 in each described the second conduction type tagma; Described the second conduction type doped region and the first conduction type doped region are connected with described top electrode 106 by contact hole.This device architecture has the advantages that forward voltage drop is low, but its reverse characteristic as reverse breakdown voltage, reverse leakage current etc. is poor.
Existing another kind of superpotential is built rectifier device structure as shown in Figure 2, and its basic structure is as the first superpotential base rectifier device structure.In addition, in order to improve reverse breakdown voltage, it builds rectifier device structure periphery in superpotential has increased a termination structure, and this termination structure is formed by the second conductive type ion heavily doped region 109, and described the second conductive type ion heavily doped region 109 is connected with described top electrode 106.Although this structure can tentatively be improved the characteristic such as reverse breakdown voltage and reverse leakage current of device, but in actual application, such structure often can not meet the requirement of use completely.
Therefore, the invention provides a kind of novel device architecture of the reverse characteristic such as reverse breakdown voltage and reverse leakage current that can further improve superpotential base rectifier device structure, to adapt to higher instructions for use.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of superpotential to build rectifier device structure, builds rectifier device structure because reverse characteristic is poor and can not meet the problem of instructions for use for solving prior art superpotential.
For achieving the above object and other relevant objects, the invention provides a kind of superpotential and build rectifier device structure, described superpotential is built rectifier device structure and is adopted groove type MOS structure as field termination structure, and described groove type MOS structure comprises groove, is incorporated into the dielectric layer of described flute surfaces and is filled in the polysilicon layer in groove.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, described groove is U-shaped groove, and described dielectric layer is silicon dioxide layer, and described electrode material is polysilicon.
Build a kind of preferred version of rectifier device structure as superpotential of the present invention, described superpotential is built rectifier device structure and is comprised:
The first conductivity type substrate; Be incorporated into first conductive type epitaxial layer on described the first conductivity type substrate surface; Be incorporated into the gate dielectric layer on described the first conductive type epitaxial layer surface; Be incorporated into the electrode material on described gate dielectric layer surface; And top electrode;
Described the first conductive type epitaxial layer top layer is formed with several spaced second conduction type doped regions and is formed at the first conduction type doped region in each described the second conduction type tagma; Described the second conduction type doped region and the first conduction type doped region are connected with described top electrode by contact hole;
In first conductive type epitaxial layer in described several spaced the second outsides, conduction type doped region, be formed with groove type MOS structure, described groove type MOS structure comprises groove, is incorporated into the dielectric layer of described flute surfaces and is filled in the polysilicon layer in groove, and described polysilicon layer is connected with described top electrode.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, the degree of depth of described grooved MOS structure is greater than the degree of depth of described the second conduction type doped region.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, the quantity of described the second conduction type doped region and the first conduction type doped region is at least 3.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, also comprises the bottom electrode that is incorporated into the described first conductivity type substrate back side.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, described the first conduction type is N-type, described the second conduction type is P type.
Build a kind of preferred version of rectifier device structure as superpotential of the present invention, described the first conductivity type substrate is N+ type substrate, described the first conductive type epitaxial layer is N-type epitaxial loayer, described the second conduction type doped region is P type doped region, and described the first conduction type doped region is N+ type doped region.
A kind of preferred version of building rectifier device structure as superpotential of the present invention, the material of described the first conductivity type substrate and the first conductive type epitaxial layer is silicon.
As mentioned above, the invention provides a kind of superpotential and build rectifier device structure, described superpotential is built rectifier device structure and is adopted groove type MOS structure as field termination structure, and described groove type MOS structure comprises groove, is incorporated into the dielectric layer of described flute surfaces and is filled in the polysilicon layer in groove.The present invention is by building in rectifier device structure and increase groove type MOS structure as field termination structure in original superpotential, can further increase the reverse breakdown voltage of device, reduce reverse leakage current, the present invention can meet higher device use occasion requirement, and simple in structure, be applicable to the rectification application of various electronic equipments.
Accompanying drawing explanation
Fig. 1 is shown as a kind of superpotential of the prior art and builds the structural representation of rectifier device structure.
Fig. 2 is shown as another kind of superpotential of the prior art and builds the structural representation of rectifier device structure.
Fig. 3 is shown as a kind of superpotential of the present invention and builds the structural representation of rectifier device structure.
Element numbers explanation
101 first conductivity type substrate
102 bottom electrodes
103 first conductive type epitaxial layers
104 gate dielectric layers
105 electrode materials
106 top electrodes
107 second conduction type doped regions
108 first conduction type doped regions
20 groove type MOS structures
201 dielectric layers
202 polysilicon layers
Embodiment
Below, by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this specification.The present invention can also be implemented or be applied by other different embodiment, and the every details in this specification also can be based on different viewpoints and application, carries out various modifications or change not deviating under spirit of the present invention.
Refer to Fig. 3.It should be noted that, the diagram providing in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size drafting while implementing according to reality, when its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel also may be more complicated.
As shown in Figure 3, the present embodiment provides a kind of superpotential to build rectifier device structure, described superpotential is built rectifier device structure and is adopted groove type MOS structure 20 as a termination structure, and described groove type MOS structure 20 comprises groove, is incorporated into the dielectric layer 201 of described flute surfaces and is filled in the polysilicon layer 202 in groove.
As example, described groove is U-shaped groove.Certainly, the shape of described groove can be also as rectangle, inverted trapezoidal etc., and is not limited thereto several that place enumerates.It can form by semiconductor etching process.
As an example, described dielectric layer 201 is silicon dioxide layer, and it can be formed at by chemical deposition process or thermal oxidation technology the surface of groove.
In addition, it should be noted that, described groove type MOS structure 20 can be formed at superpotential rectifier device structure both sides, base or Perfect Ring is around in described superpotential base rectifier device structure.
As shown in Figure 3, as example, described superpotential is built rectifier device structure and is comprised:
The first conductivity type substrate 101; Be incorporated into first conductive type epitaxial layer 103 on described the first conductivity type substrate 101 surfaces; Be incorporated into the gate dielectric layer 104 on described the first conductive type epitaxial layer 103 surfaces; Be incorporated into the electrode material 105 on described gate dielectric layer 104 surfaces; And top electrode 106;
Described the first conductive type epitaxial layer 103 top layers are formed with several spaced second conduction type doped regions 107 and are formed at the first conduction type doped region 108 in each described the second conduction type tagma; Described the second conduction type doped region 107 and the first conduction type doped region 108 are connected with described top electrode 106 by contact hole;
In first conductive type epitaxial layer 103 in described several 107 outsides, spaced the second conduction type doped region, be formed with groove type MOS structure 20, described groove type MOS structure 20 comprises groove, is incorporated into the dielectric layer 201 of described flute surfaces and is filled in the polysilicon layer 202 in groove, and described polysilicon layer 202 is connected with described top electrode 106.
As example, the material of described the first conductivity type substrate 101 and the first conductive type epitaxial layer 103 is silicon.Certainly, in other embodiment, the material of described the first conductivity type substrate 101 and the first conductive type epitaxial layer 103 can be as materials such as germanium silicon, carborundum, and is not limited to cited several herein.The material of described gate dielectric layer 104 is silicon dioxide, can be by method preparations such as thermal oxidation methods.The thickness of described gate dielectric layer 104 is 100nm～2000nm, and in the present embodiment, the thickness of described gate dielectric layer 104 is 200nm.Certainly, cited is only a kind of preferred scope herein, and in other embodiment, its thickness can be determined according to actual demand.Described electrode material 105 is polysilicon, can form by conventional epitaxy method and conventional etching technics.
In order to guarantee the effect of described grooved MOS structure, as example, the degree of depth of described grooved MOS structure is greater than the degree of depth of described the second conduction type doped region 107.In the present embodiment, in order further to strengthen the effect of described grooved MOS structure, the degree of depth of described grooved MOS structure is more than the degree of depth twice of described the second conduction type doped region 107, or the degree of depth of described grooved MOS structure can approach or equal the thickness of described the first conductive type epitaxial layer 103.
As example, the quantity of described the second conduction type doped region 107 and the first conduction type doped region 108 is at least 3.In the present embodiment, the quantity of described the second conduction type doped region 107 and the first conduction type doped region 108 is 3.Certainly,, in other embodiment, the quantity of described the second conduction type doped region 107 and the first conduction type doped region 108 can be determined according to actual demand, is not limited to cited one herein.
As example, described superpotential is built rectifier device structure and is also comprised the bottom electrode 102 that is incorporated into described first conductivity type substrate 101 back sides, and the material of described top electrode 106 and bottom electrode 102 can be Cu, Al etc., and is not limited to cited several herein.
As example, described the first conduction type is N-type, and described the second conduction type is P type.Further, described the first conductivity type substrate 101 is N+ type substrate, and described the first conductive type epitaxial layer 103 is N-type epitaxial loayer, and described the second conduction type doped region 107 is P type doped region, and described the first conduction type doped region 108 is N+ type doped region.In the present embodiment, the doping ion of described N-type is P etc., and the doping ion of described P type is boron or boron difluoride BF2 etc.Certainly, in other embodiment, described the first conduction type can be P type, and described the second conduction type can be N-type, can change according to actual demand, to meet different use occasions.
As mentioned above, the invention provides a kind of superpotential and build rectifier device structure, described superpotential is built rectifier device structure and is adopted groove type MOS structure 20 as a termination structure, and described groove type MOS structure 20 comprises groove, is incorporated into the dielectric layer 201 of described flute surfaces and is filled in the polysilicon layer 202 in groove.The present invention is by building in rectifier device structure and increase groove type MOS structure 20 as a termination structure in original superpotential, can further increase the reverse breakdown voltage of device, reduce reverse leakage current, the present invention can meet higher device use occasion requirement, and simple in structure, be applicable to the rectification application of various electronic equipments or other semiconductor equipment.So the present invention has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all can, under spirit of the present invention and category, modify or change above-described embodiment.Therefore, such as in affiliated technical field, have and conventionally know that the knowledgeable, not departing from all equivalence modifications that complete under disclosed spirit and technological thought or changing, must be contained by claim of the present invention.
Claims (9)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016101655A1 (en) * | 2014-12-25 | 2016-06-30 | 无锡华润上华半导体有限公司 | Semiconductor rectifier and manufacturing method thereof |
| CN106684127A (en) * | 2016-12-26 | 2017-05-17 | 东莞市联洲知识产权运营管理有限公司 | Super barrier rectifier and production method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101226883A (en) * | 2008-02-03 | 2008-07-23 | 苏州硅能半导体科技股份有限公司 | A semiconductor rectifier device and its manufacturing method |
| US20100078765A1 (en) * | 2008-09-30 | 2010-04-01 | Infineon Technologies Austria Ag | Power semiconductor |
| CN103187271A (en) * | 2011-12-30 | 2013-07-03 | 敦南科技股份有限公司 | Diode structure and manufacturing method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101226883A (en) * | 2008-02-03 | 2008-07-23 | 苏州硅能半导体科技股份有限公司 | A semiconductor rectifier device and its manufacturing method |
| US20100078765A1 (en) * | 2008-09-30 | 2010-04-01 | Infineon Technologies Austria Ag | Power semiconductor |
| CN103187271A (en) * | 2011-12-30 | 2013-07-03 | 敦南科技股份有限公司 | Diode structure and manufacturing method thereof |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016101655A1 (en) * | 2014-12-25 | 2016-06-30 | 无锡华润上华半导体有限公司 | Semiconductor rectifier and manufacturing method thereof |
| CN105789331A (en) * | 2014-12-25 | 2016-07-20 | 无锡华润上华半导体有限公司 | Semiconductor rectifying device and manufacturing method therefor |
| US10062746B2 (en) | 2014-12-25 | 2018-08-28 | Csmc Technologies Fab1 Co., Ltd. | Semiconductor rectifier and manufacturing method thereof |
| CN105789331B (en) * | 2014-12-25 | 2019-09-17 | 无锡华润上华科技有限公司 | Semiconductor rectifier device and preparation method thereof |
| CN106684127A (en) * | 2016-12-26 | 2017-05-17 | 东莞市联洲知识产权运营管理有限公司 | Super barrier rectifier and production method thereof |
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Application publication date: 20140702 |