CN103926430B - A kind of silicon through hole keyset method of testing - Google Patents
A kind of silicon through hole keyset method of testing Download PDFInfo
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- CN103926430B CN103926430B CN201410167044.3A CN201410167044A CN103926430B CN 103926430 B CN103926430 B CN 103926430B CN 201410167044 A CN201410167044 A CN 201410167044A CN 103926430 B CN103926430 B CN 103926430B
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Abstract
The invention provides a kind of silicon through hole keyset method of testing, simply, easily silicon through hole keyset can be carried out electrical testing, effectively prevent in test and silicon through hole keyset is produced cut and damage, ensure that electrical testing efficiency and the test effect of silicon through hole keyset, and ensure that the package quality of follow-up chip, it is characterized in that: it comprises the following steps: prepared by (1), test adaptor plate, test adaptor plate prepares pressure welding point (pad), with probe lead, pad is drawn the other one side of test adaptor plate;(2), use temporary weld method, the salient point (soldered ball) on silicon through hole keyset is physically connected on described test adaptor plate.
Description
Technical field
The present invention relates to the technical field of microelectronic industry microelectronic testing, be specifically related to a kind of silicon through hole and turn
Fishplate bar method of testing.
Background technology
Along with the development of large scale integrated circuit, circuit is increasingly thinner, conventional two-dimensional semiconductor fabrication
Face huge challenge, and use three-dimensional integration technology, interconnection path can be shortened, reduce and postpone, reduce merit
Consumption, obtains higher performance simultaneously, becomes the development trend of future semiconductor industry.Silicon through hole technology is to realize
Three-dimensionally integrated core technology, it is by directly making conductive through hole on dissimilar chip, thus is formed
Perpendicular interconnection passage.A kind of mode then makes keyset by silicon through hole, is led to by different types of chip
Cross keyset and realize high density interconnection, be not exclusively the integrated of three-dimensional perpendicular direction due to it, thus be referred to as
2.5D it is integrated.2.5D integrated technology has been pushed to product by the FPGA product with Xilinx as representative should
With.Silicon through hole keyset technology still suffers from a lot of technical barrier and challenge, and yield rate is the highest, wherein transfers
The test of plate is considered as one of main challenge.Owing to silicon through hole keyset is the thinnest, material is crisp, pad
(salient point) density is high, needs to carry out two-sided test, and traditional measuring technology is difficult with.Due to quasiconductor
I/O density on chip is more and more higher, and pressure welding point size is more and more less, and silicon through hole keyset is carried out electrical measurement
During examination, seeing Fig. 1, existing electrical testing uses the method for probe contact, probe 3 and silicon through hole keyset
Pressure welding point 2 on 1 contacts, and is drawn by silicon through hole keyset to be tested, realizes silicon through hole by probe
The electrical testing of keyset, this method of testing can produce cut and damage to silicon through hole keyset, affect follow-up envelope
Packing quality, silicon wafer thickness is more and more thinner, gives and holds and test brings difficulty, thus have impact on the switching of silicon through hole
The electrical testing efficiency of plate and test effect.
Summary of the invention
For the problems referred to above, the invention provides a kind of silicon through hole keyset method of testing, can simply,
Easily silicon through hole keyset is carried out electrical testing, effectively prevent in test and silicon through hole keyset is produced
Cut and damage, it is ensured that the electrical testing efficiency of silicon through hole keyset and test effect, and ensure that follow-up core
The package quality of sheet.
Its technical scheme is as follows: a kind of silicon through hole keyset method of testing, comprises the following steps:
(1), test adaptor plate prepare, test adaptor plate prepares pressure welding point (pad), with lead-in wire by pad
Draw the other one side of test adaptor plate;(2), use temporary weld method, by silicon through hole keyset
Salient point (soldered ball) be physically connected on described test adaptor plate.
It is further characterized by, and is correspondingly arranged survey prepared by step (1) in silicon through hole keyset both sides
Preliminary operation fishplate bar;It is further characterised by, on test adaptor plate, pressure welding point (pad) surface scribbles and is less than
The solder of salient point (soldered ball) fusing point on silicon through hole keyset;On silicon through hole keyset, the area of pressure welding point is big
The area of pressure welding point on test adaptor plate;Pressure welding point on pressure welding point and test adaptor plate on silicon through hole keyset
Select different lower salient point alloying metals (UBM).
Test board material includes: silicon, glass, polymer, the one in pottery.
Use in the said method of the present invention, owing to preparing pressure welding point (pad) at test adaptor plate, use
Pressure welding point (pad) is drawn outside test adaptor plate by probe lead, and the method using temporary weld, by silicon through hole
Salient point (soldered ball) on keyset is physically connected to described test adaptor plate, by probe lead by silicon through hole
Salient point on keyset is drawn, and simply, easily silicon through hole keyset can be carried out electrical testing, effectively
Prevent in test and silicon through hole keyset is produced cut and damage, it is ensured that the electrical testing efficiency of wafer and survey
Examination effect, and ensure that the package quality of follow-up chip.
Accompanying drawing explanation
Fig. 1 is existing wafer probe electrical testing schematic diagram;
Fig. 2 is that schematic diagram prepared by test adaptor plate;
Fig. 3 is the preparation of test adaptor plate and silicon through hole keyset one side connection diagram;
Fig. 4 is the preparation of test adaptor plate and silicon through hole keyset bilateral connection diagram.
Detailed description of the invention
Below in conjunction with accompanying drawing, invention is described in detail, but present embodiment is not limited to this
Bright, structure that those of ordinary skill in the art is made according to present embodiment, method or functionally
Conversion, is all contained in protection scope of the present invention.
A kind of silicon through hole keyset method of testing, comprises the following steps:
See Fig. 2, prepared by (1), test adaptor plate, prepares pressure welding point (pad) 2 on test adaptor plate 1,
With probe lead 3, pad is drawn the other one side of test adaptor plate 1;See Fig. 3, (2), employing
The method of temporary weld, is physically connected to test adaptor by the salient point 5 (soldered ball) on silicon through hole keyset 4
Plate 1;
See Fig. 4, (3), be correspondingly arranged test adaptor plate 1 in silicon through hole keyset 4 both sides, turned by test
Pressure welding point (pad) 2 on silicon through hole keyset 4 is turned by the probe lead 3 on fishplate bar 1 from silicon through hole
Twice extraction of fishplate bar 4, it is achieved thereby that the two-sided test of silicon through hole keyset, substantially increases silicon through hole
The testing efficiency of keyset.
Owing to preparing pressure welding point (pad) at test adaptor plate, with probe lead by pressure welding point (pad)
Drawing outside test adaptor plate, the method using temporary weld, by salient point (soldered ball) thing on silicon through hole keyset
Reason is connected to described test adaptor plate, is drawn by the salient point on silicon through hole keyset by probe lead, permissible
Simply, easily silicon through hole keyset is carried out electrical testing, effectively prevent in test and silicon through hole is transferred
Plate produces cut and damage, it is ensured that the electrical testing efficiency of silicon through hole keyset and test effect, and ensures
The package quality of follow-up chip.
On test adaptor plate 1, pressure welding point 2 (pad) surface scribbles less than salient point on silicon through hole keyset
The solder of 5 (soldered ball) fusing point, thus transfer with silicon through hole carrying out test adaptor plate 1 less than reflux temperature
Plate bonding and separation, do not impact the salient point (soldered ball) on silicon through hole keyset.
The solder composition of selection different melting points:
Such as tin-lead series: Pb90Sn10 fusing point 268 degree
Pb60Sn40 fusing point 183 degree
Sn95Pb5 fusing point 238 degree
SnAgCu series: Sn97Cu2.75Ag0.25 fusing point 228 degree
Sn95.6Ag3.5Cu0.9 fusing point 217 degree.
Use the solder of different melting points so that on low melting point test adaptor plate, pressure welding point first separates, silicon is led to
The stability that salient point on the keyset of hole is combined with silicon through hole keyset.
On silicon through hole keyset 4, the area of pressure welding point 2 is more than pressure welding point 2 on test adaptor plate 1
Area, under salient point 5 (soldered ball) is melted, salient point 5 (soldered ball) rests on bigger surface tension.
On silicon through hole keyset 4, on pressure welding point 2 and test adaptor plate 1, pressure welding point 2 selects difference
Lower salient point alloy (UBM) metal, salient point (soldered ball) is had different wettabilitys so that pressure welding point and weldering
The combination degree of ball is different, and after soldered ball high temperature melting, both sides are different to the surface tension of soldered ball, make salient point (weldering
Ball) stay on keyset.
This patent proposes a kind of by customizing special test circuit board, uses temporary weld mode to treat
Survey keyset to be mechanically fixed and be electrically interconnected, thus realize two-sided, the TSV keyset test of pitch.
Claims (5)
1. a silicon through hole keyset method of testing, it is characterised in that: it comprises the following steps:
(1), test adaptor plate prepare, test adaptor plate prepares pressure welding point (pad), with probe lead, pad is drawn the other one side of test adaptor plate;
(2), use temporary weld method, the salient point on silicon through hole keyset is physically connected on described test adaptor plate;
On silicon through hole keyset, pressure welding point selects different lower salient point alloying metals (UBM) with pressure welding point on test adaptor plate.
2. according to a kind of silicon through hole keyset method of testing described in claim 1, it is characterised in that: it is correspondingly arranged test adaptor plate prepared by step (1) in silicon through hole keyset both sides.
3. according to a kind of silicon through hole keyset method of testing described in claim 1, it is characterised in that: on silicon through hole keyset, the area of pressure welding point is more than the area of pressure welding point on test flap.
4. according to a kind of silicon through hole keyset method of testing described in claim 1, it is characterised in that: on silicon through hole keyset, pressure welding point selects different lower salient point alloying metals (UBM) with pressure welding point on test adaptor plate.
5. according to the arbitrary described a kind of silicon through hole keyset method of testing of claim 1-4, it is characterised in that: test board material includes: silicon, glass, polymer, the one in pottery.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410167044.3A CN103926430B (en) | 2014-04-23 | 2014-04-23 | A kind of silicon through hole keyset method of testing |
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| CN201410167044.3A CN103926430B (en) | 2014-04-23 | 2014-04-23 | A kind of silicon through hole keyset method of testing |
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| CN103926430A CN103926430A (en) | 2014-07-16 |
| CN103926430B true CN103926430B (en) | 2016-09-21 |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105140142A (en) * | 2015-08-10 | 2015-12-09 | 华进半导体封装先导技术研发中心有限公司 | Adapter plate process for sample testing electrical property of wafers |
| CN107192863A (en) * | 2016-03-15 | 2017-09-22 | 创意电子股份有限公司 | Probe card detection device |
| CN105845597A (en) * | 2016-05-13 | 2016-08-10 | 中国航天科技集团公司第九研究院第七七研究所 | Through-silicon-via stacked chip test method |
| CN111650492A (en) * | 2020-05-18 | 2020-09-11 | 马鞍山芯海科技有限公司 | A device and method for testing through-silicon via adapter wafers |
| CN111785653B (en) * | 2020-07-03 | 2025-09-16 | 珠海探宇芯科技有限公司 | Test module of three-dimensional package chip |
| CN112986687B (en) * | 2021-04-30 | 2021-09-10 | 成都宏明电子股份有限公司 | Thermistor chip screening test auxiliary fixtures with surface electrode |
| CN114487766A (en) * | 2021-11-22 | 2022-05-13 | 上达电子(深圳)股份有限公司 | A universal electrical measuring fixture |
| CN114137383A (en) * | 2022-02-08 | 2022-03-04 | 广东科翔电子科技股份有限公司 | High-precision Mini-LED board electric measurement method |
| CN116718891A (en) * | 2023-06-06 | 2023-09-08 | 无锡芯光互连技术研究院有限公司 | Test method of adapter plate and structure for testing adapter plate |
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| CN2739644Y (en) * | 2004-10-12 | 2005-11-09 | 追日润股份有限公司 | IC test adapter board |
| CN1798977A (en) * | 2003-05-01 | 2006-07-05 | 快速研究股份有限公司 | Planarizing and testing of bga packages |
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| EP1074844A3 (en) * | 1999-08-03 | 2003-08-06 | Lucent Technologies Inc. | Testing integrated circuits |
| TWI261676B (en) * | 2004-02-16 | 2006-09-11 | Advanced Chip Eng Tech Inc | Structure and method for package burn-in testing |
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| CN1798977A (en) * | 2003-05-01 | 2006-07-05 | 快速研究股份有限公司 | Planarizing and testing of bga packages |
| CN1802775A (en) * | 2003-05-01 | 2006-07-12 | 快速研究股份有限公司 | Device probing using a matching device |
| CN2739644Y (en) * | 2004-10-12 | 2005-11-09 | 追日润股份有限公司 | IC test adapter board |
| CN102012470A (en) * | 2009-09-04 | 2011-04-13 | 日月光半导体(上海)股份有限公司 | Electrical test adapter plate of sealing base plate and method thereof |
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