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CN103985669B - Metal interconnection structure and manufacture method thereof - Google Patents

Metal interconnection structure and manufacture method thereof Download PDF

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CN103985669B
CN103985669B CN201410217927.0A CN201410217927A CN103985669B CN 103985669 B CN103985669 B CN 103985669B CN 201410217927 A CN201410217927 A CN 201410217927A CN 103985669 B CN103985669 B CN 103985669B
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cnt
metal interconnecting
interconnection structure
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CN103985669A (en
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鲍宇
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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Abstract

The present invention provides a kind of metal interconnection structure and manufacture method thereof, the groove being etched back to be formed utilizing previous metal interconnecting layer increases the growth area of CNT, it is more conducive to the high-density growth of CNT, the high-density carbon nano-tube being consequently formed can as the growth source of regrowth CNT in follow-up through hole, improve the high density of regrowth CNT in through hole, it is possible to ensure that and the density of the CNT grown out in through hole improve the performance of metal interconnection structure。

Description

Metal interconnection structure and manufacture method thereof
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of metal interconnection structure and manufacture method thereof。
Background technology
Along with reducing further of copper-connection critical size, simple dependence copper does conductor and is difficult to meet the requirement of electricity aspect, so research worker has begun to test some new materials to replace copper。
CNT (CNT) is currently as the potential substitution material of copper-connection, it is possible to significantly reduces conductor resistance, and will not be subject to electromigratory puzzlement, but how to be incorporated in copper-connection by CNT is a very big challenge。
Refer to Figure 1A and 1B, prior art (TowardsFutureVLSIInterconnectsUsingAlignedCarbonNanotube s, 2011IEEE) proposes integration flow process two kinds feasible, but all suffers from self Problems existing。A kind of is the flow process (a) shown in Figure 1A, this flow process (a) uses catalyst granules (catalystparticle) as growth source in advance, the guiding relying on electric field forms vertical CNT on interconnection layer Metal1, CNT through hole (via) is formed between adjacent C NT and CNT, adopt the method for CVD to form dielectric layer again, be equivalent to epitaxial growth in through-holes and go out all thick catalytic epitaxial layer (blanketcatalystfilm) SiO2, then forming interconnection layer Metal2, it has the drawback that the requirement of mechanical strength to CNT through hole is higher;Another kind is the flow process (b) shown in Figure 1B, this flow process (b) is similar to traditional single Damascus, it is in the dielectric layer through hole (via) formed, with catalyst granules (catalystparticle) as growth source, dependence ties up effect (crowding-effect), make CNT vertical-growth in dielectric layer through hole, then, the CNT density that this flow process grows out is on the low side compared with the CNT that namely flow process (a) grows out for its defect。
Accordingly, it would be desirable to a kind of new metal interconnection structure and manufacture method thereof, part drawbacks described above at least can be avoided。
Summary of the invention
It is an object of the invention to provide a kind of metal interconnection structure and manufacture method thereof, it is possible to ensure the CNT CNT density grown out in through hole, improve the performance of metal interconnection structure。
For solving the problems referred to above, the present invention proposes the manufacture method of a kind of metal interconnection structure, including:
Thering is provided and be formed with previous metal interconnecting layer and the Semiconductor substrate of previous connected medium layer, described metal interconnecting layer is formed in the groove of described previous connected medium layer;
Described previous metal interconnecting layer is etched back to;
Preceding layer metal interconnecting layer after being etched back to is formed multiple vertical CNT;
Deposition middle dielectric layer on the device surface forming described CNT;
Described middle dielectric layer is formed the through hole at expose portion CNT top;
Regrowth CNT in described through hole;
Next connected medium layer is formed at the device surface including regrowth CNT;
Next metal interconnecting layer is formed after next connected medium layer described is carried out etching groove。
Further, described previous metal interconnecting layer and next metal interconnecting layer described are copper interconnection layer。
Further, adopt wet etching that described previous metal interconnecting layer is etched back to。
Further, the etching liquid that described wet etching adopts is acid is etching liquid or ammonia system etching liquid。
Further, described previous metal interconnecting layer be etched back to the degree of depth more than 2nm。
Further, the step preceding layer metal interconnecting layer after being etched back to being formed multiple vertical CNT includes:
Adopt and the mask and catalyst granules preceding layer metal interconnecting layer after described being etched back to that pattern form growth source;
Utilize described growth source and rely on guiding of electric field that the preceding layer metal interconnecting layer after being etched back to forms multiple vertical CNT。
Further, described growth source is Ferrocene (ferrocene)。
Further, physical gas-phase deposition is adopted to form described growth source。
Further, adopt chemical vapor deposition method or plasma gas-phase deposit technique, the preceding layer metal interconnecting layer after being etched back to is formed multiple vertical CNT。
Further, the degree of depth of described through hole can not expose described growth source。
The present invention also provides for a kind of metal interconnection structure, including what sequentially form: have fluted previous connected medium layer;It is filled in the groove of described previous connected medium layer and top surface is lower than the previous metal interconnecting layer of the top surface of described previous connected medium layer;It is formed on described preceding layer metal interconnecting layer and multiple vertical CNT that top surface and the top surface of described previous connected medium layer maintain an equal level;It is formed at the top surface of described previous connected medium layer and multiple vertical CNT and is filled in the middle dielectric layer between the plurality of vertical CNT, described middle dielectric layer is formed with through hole;It is formed at the regrowth CNT in described through hole;The top surface being formed at described middle dielectric layer and regrowth CNT and next the connected medium layer being filled between described regrowth CNT, be formed with the groove exposing described regrowth CNT top in next connected medium layer described;And it is filled in next metal interconnecting layer in the groove of next connected medium layer described。
Compared with prior art, metal interconnection structure provided by the invention and manufacture method thereof, the groove being etched back to be formed that can utilize previous metal interconnecting layer increases the growth area of CNT, it is more conducive to the high-density growth of CNT, the high-density carbon nano-tube being consequently formed can as the growth source of regrowth CNT in through-holes, improve the high density of regrowth CNT in through hole, it is possible to ensure that and the density of the CNT grown out in through hole improve the performance of metal interconnection structure。
Accompanying drawing explanation
Figure 1A and Figure 1B is the copper interconnection structure manufacturing process and the device architecture schematic diagram thereof that include CNT in prior art;
Fig. 2 is the manufacture method flow chart of the metal interconnection structure of the specific embodiment of the invention;
Fig. 3 A to 3F is the device architecture schematic diagram in the manufacturing process shown in Fig. 2。
Detailed description of the invention
For making the purpose of the present invention, feature become apparent, below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described, but, the present invention can realize by different forms, it is not considered that be simply confined to described embodiment。
Refer to Fig. 2, the present invention proposes the manufacture method of a kind of metal interconnection structure, comprises the following steps:
S1, it is provided that be formed with previous metal interconnecting layer and the Semiconductor substrate of previous connected medium layer, described metal interconnecting layer is formed in the groove of described previous connected medium layer;
S2, is etched back to described previous metal interconnecting layer;
S3, the preceding layer metal interconnecting layer after being etched back to is formed multiple vertical CNT;
S4, deposition middle dielectric layer on the device surface forming described CNT;
S5, forms the through hole at expose portion CNT top in described middle dielectric layer;
S6, regrowth CNT in described through hole;
S7, forms next connected medium layer at the device surface including regrowth CNT;
S8, forms next metal interconnecting layer after next connected medium layer described is carried out etching groove。
Refer to Fig. 3 A, in step sl, it is provided that Semiconductor substrate include previous metal interconnecting layer 12 and previous connected medium layer 11, described metal interconnecting layer 12 is formed in the groove of described previous connected medium layer 11。In the present embodiment, it is provided that the detailed process of described Semiconductor substrate includes:
First, it is provided that a substrate (not shown);
Then, deposition ultra low-K material forms described previous connected medium layer 11 on the substrate;
Then, photoetching also etches described previous connected medium layer 11, forms the groove (not shown) for metal interconnection;
Then, formed in the trench after stopping inculating crystal layer (not shown), adopt copper plating (ECP) process filling interconnection copper, form described previous metal interconnecting layer 12;
Then, top Chemical Mechanical planarization (CMP), it is thus achieved that described Semiconductor substrate。
Refer to Fig. 3 B, in step s 2, adopt wet-etching technology that described previous metal interconnecting layer 12 is etched back to, form groove 13。The etching liquid that described wet-etching technology adopts can be etching liquid for acid, it is also possible to for ammonia system etching liquid。Described previous metal interconnecting layer be etched back to the degree of depth more than 2nm, namely the degree of depth of groove 13 is more than 2nm。Wherein, much bigger compared to the area of through hole via groove 13, it is more conducive to the high-density growth of CNT CNT。
Refer to Fig. 3 C, in step S3, the preceding layer metal interconnecting layer 12 after being etched back to formed multiple vertical CNT (CNT array) 15, specifically includes:
Adopt and the mask patterned and catalyst granules preceding layer metal interconnecting layer after described being etched back to form growth source (catalystparticle) 14 by physical gas-phase deposition (PVD), wherein, described growth source can be Ferrocene (ferrocene), however it is not limited to Ferrocene;
Utilize described growth source 14 and rely on guide chemical vapour deposition (CVD) (CVD) or the plasma gas-phase deposit (PECVD) on the preceding layer metal interconnecting layer 12 after being etched back to of electric field to form multiple vertical CNT 15, CNT 15 has higher density, forms through hole 16 between adjacent carbon nanotubes 15。
Wherein, in step s3, increase electric field and can control the CNT 15 direction of growth in groove (trench), and, owing under electric field action, electric current is to conduct along the direction of CNT 15, so the CNT 15 of the groove first half is bigger along resistance on the direction of groove, it is impossible to become main conductive layer。
Refer to Fig. 3 D, in step S4, device surface after forming CNT (CNT array) 15 deposits ultralow K dielectric material (ULK), forms middle dielectric layer 17, is wherein filled in the through hole 16 between described CNT in ultralow K dielectric material deposition process。
Please continue to refer to Fig. 3 D, in step S5, adopt the etching method for forming through hole in dual damascene process, described middle dielectric layer 17 is carried out photoetching and via etch, form through hole 18, the width of described through hole 18 can expose the top of part CNT 15, but the degree of depth can not expose described growth source 14。
Refer to Fig. 3 E, in step S6, utilize the CNT 15 exposed in step S5 as growth source, and rely on the guiding of electric field to form multiple regrowth CNT 19 in through hole 18, between adjacent carbon nanotubes 19, form through hole 20。In this step, using the high density CNT that formed as growth source, being more conducive to the growth of CNT, so can form highdensity CNT in through-holes, namely the density of regrowth CNT 19 CNT that middle flow process (b) grows out compared to existing technology wants high a lot。
Refer to Fig. 3 F, in step S7, having grown the device surface after regrowth CNT 19, it is again with ultra low-K material deposition, forming next connected medium layer 21, next connected medium layer 21 covers the top surface of described middle dielectric layer 17 and regrowth CNT 19 and is filled in the through hole 20 between described regrowth CNT 19。
Please continue to refer to Fig. 3 F, in step S8, first, adopting the etching groove step of dual damascene process that next connected medium layer 21 is performed etching formation groove, described groove can expose the top surface of regrowth CNT 19;Then adopt copper electroplating technology to fill interconnection copper in the trench, form next interconnecting metal layer。Stop inculating crystal layer first can also be formed in the trench between copper is electroplated。
Refer to Fig. 3 F, the present invention also provides for a kind of metal interconnection structure, including what sequentially form: have fluted previous connected medium layer 11;It is filled in the groove of described previous connected medium layer 11 and top surface is lower than the previous metal interconnecting layer 12 of the top surface of described previous connected medium layer 11;It is formed on described preceding layer metal interconnecting layer 12 and multiple vertical CNT 15 that top surface and the top surface of described previous connected medium layer 11 maintain an equal level;It is formed at the top surface of described previous connected medium layer 11 and multiple vertical CNT 15 and is filled in the middle dielectric layer 17 between the plurality of vertical CNT 15, described middle dielectric layer 17 is formed with through hole;It is formed at the regrowth CNT 19 in described through hole;The top surface being formed at described middle dielectric layer 17 and regrowth CNT 19 and next the connected medium layer 21 being filled between described regrowth CNT 19, be formed with the groove exposing described regrowth CNT 19 top in next connected medium layer 21 described;And it is filled in next metal interconnecting layer 22 in the groove of next connected medium layer 21 described。
In sum, metal interconnection structure provided by the invention and manufacture method thereof, the groove being etched back to be formed that can utilize previous metal interconnecting layer increases the growth area of CNT, it is more conducive to the high-density growth of CNT, the high-density carbon nano-tube being consequently formed can as the growth source of regrowth CNT in through-holes, improve the high density of regrowth CNT in through hole, it is possible to ensure that and the density of the CNT grown out in through hole improve the performance of metal interconnection structure。
Obviously, invention can be carried out various change and modification without deviating from the spirit and scope of the present invention by those skilled in the art。So, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification。

Claims (10)

1. the manufacture method of a metal interconnection structure, it is characterised in that including:
Thering is provided and be formed with previous metal interconnecting layer and the Semiconductor substrate of previous connected medium layer, described metal interconnecting layer is formed in the groove of described previous connected medium layer;
Described previous metal interconnecting layer is etched back to;
Preceding layer metal interconnecting layer after being etched back to is formed multiple vertical CNT;
Deposition middle dielectric layer on the device surface forming described CNT;
Described middle dielectric layer is formed the through hole at expose portion CNT top;
Regrowth CNT in described through hole;
Next connected medium layer is formed at the device surface including regrowth CNT;
Next metal interconnecting layer is formed after next connected medium layer described is carried out etching groove。
2. the manufacture method of metal interconnection structure as claimed in claim 1, it is characterised in that described previous metal interconnecting layer and next metal interconnecting layer described are copper interconnection layer。
3. the manufacture method of metal interconnection structure as claimed in claim 1, it is characterised in that adopt wet etching that described previous metal interconnecting layer is etched back to。
4. the manufacture method of metal interconnection structure as claimed in claim 3, it is characterised in that the etching liquid that described wet etching adopts is acid is etching liquid or ammonia system etching liquid。
5. the manufacture method of metal interconnection structure as claimed in claim 1, it is characterised in that described previous metal interconnecting layer be etched back to the degree of depth more than 2nm。
6. the manufacture method of metal interconnection structure as claimed in claim 1, it is characterised in that the step forming multiple vertical CNT on the preceding layer metal interconnecting layer after being etched back to includes:
Adopt and the mask and catalyst granules preceding layer metal interconnecting layer after described being etched back to that pattern form growth source;
Utilize described growth source and rely on guiding of electric field that the preceding layer metal interconnecting layer after being etched back to forms multiple vertical CNT。
7. the manufacture method of metal interconnection structure as claimed in claim 6, it is characterised in that described growth source is ferrocene。
8. the manufacture method of metal interconnection structure as claimed in claim 6, it is characterized in that, physical gas-phase deposition is adopted to form described growth source, adopt chemical vapor deposition method or plasma gas-phase deposit technique, the preceding layer metal interconnecting layer after being etched back to is formed multiple vertical CNT。
9. the manufacture method of metal interconnection structure as claimed in claim 6, it is characterised in that the degree of depth of described through hole can not expose described growth source。
10. a metal interconnection structure, it is characterised in that include sequentially forming: have fluted previous connected medium layer;It is filled in the groove of described previous connected medium layer and top surface is lower than the previous metal interconnecting layer of the top surface of described previous connected medium layer;It is formed on described preceding layer metal interconnecting layer and multiple vertical CNT that top surface and the top surface of described previous connected medium layer maintain an equal level;It is formed at the top surface of described previous connected medium layer and multiple vertical CNT and is filled in the middle dielectric layer between the plurality of vertical CNT, described middle dielectric layer is formed with through hole;When described through hole exposes the top of CNT, regrowth CNT;The top surface being formed at described middle dielectric layer and regrowth CNT and next the connected medium layer being filled between described regrowth CNT, be formed with the groove exposing described regrowth CNT top in next connected medium layer described;And it is filled in next metal interconnecting layer in the groove of next connected medium layer described。
CN201410217927.0A 2014-05-21 2014-05-21 Metal interconnection structure and manufacture method thereof Active CN103985669B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1521301A1 (en) * 2003-09-30 2005-04-06 Interuniversitaire Microelectronica Centrum vzw ( IMEC) Method of formation of airgaps around interconnecting line
CN101652873A (en) * 2007-04-05 2010-02-17 美光科技公司 Memory devices having electrodes comprising nanowires, systems including same and methods of forming same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7592248B2 (en) * 2005-12-09 2009-09-22 Freescale Semiconductor, Inc. Method of forming semiconductor device having nanotube structures

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1521301A1 (en) * 2003-09-30 2005-04-06 Interuniversitaire Microelectronica Centrum vzw ( IMEC) Method of formation of airgaps around interconnecting line
CN101652873A (en) * 2007-04-05 2010-02-17 美光科技公司 Memory devices having electrodes comprising nanowires, systems including same and methods of forming same

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