Disclosure of Invention
The application provides a digital automatic gain control structure in a power line carrier communication receiving process, which aims to reduce the influence of narrow-band interference on accurate evaluation of signal energy, improve the anti-interference capability of a receiver by reasonably distributing analog gain and digital gain, and ensure better convergence of automatic gain control.
The technical purpose of the application is realized by the following technical scheme:
a digital automatic gain control structure in the power line carrier communication receiving process comprises an analog front-end module, a software processing module and a digital hardware module which are connected in sequence;
the analog front end module comprises an analog programmable amplifier and an analog-to-digital converter, and the output of the analog programmable amplifier is input to the analog-to-digital converter;
the software processing module comprises an energy saturation preprocessing unit, a narrow-band interference detection suppression unit and a gain distributor; the output of the analog-to-digital converter is input to the energy saturation preprocessing unit, and the output of the energy saturation preprocessing unit is respectively input to the gain divider and the narrow-band interference detection suppression unit;
the digital hardware module comprises a digital amplifier, an energy evaluation and error calculation unit and an exponential sliding averager; the output of the narrow-band interference detection suppression unit is input to the digital amplifier, the output of the digital amplifier is input to the energy evaluation and error calculation unit, and the output of the energy evaluation and error calculation unit is input to the exponential sliding averager;
the exponential sliding averager is connected with the gain divider, and the output of the gain divider is respectively input to the digital amplifier and the analog programmable amplifier.
Further, the energy saturation preprocessing unit comprises an energy saturation depth estimation unit, an impulse interference judger, an impulse interference limiter and a gain control table; the analog-to-digital converter is connected with the energy saturation depth estimation unit, the energy saturation depth estimation unit is connected with the impulse interference judger, the impulse interference judger is connected with both the impulse interference limiter and the gain control table, and the impulse interference limiter is connected with the gain control table; the gain control table is connected with the gain distributor.
Further, the narrowband interference detection suppressing unit includes a narrowband detector, a narrowband trap and a FIR filter, the narrowband detector is connected with both the narrowband trap and the FIR filter; the impulse interference judger is connected with the narrow-band detector, and the FIR filter is connected with the digital amplifier.
Furthermore, the energy evaluation and error calculation unit comprises an energy calculation unit, a logarithmic transformation unit and an energy error calculation unit which are connected in sequence; the digital amplifier is connected with the energy calculating unit, and the energy error calculating unit is connected with the exponential sliding averager.
The beneficial effect of this application lies in: according to the automatic gain control loop realized by the digital automatic gain control structure in the power line carrier communication receiving process, the rapid regulation of large signal saturation and the accurate counting analysis of pulse interference are realized by the energy saturation preprocessing unit; the narrowband interference detection and suppression unit is used for detecting and suppressing narrowband interference signals in band and out of band, so that the accuracy of effective signal energy estimation is improved; the power line carrier signal with continuously changed amplitude is rapidly converged by the exponential sliding averager, and the jitter of gain adjustment is effectively reduced.
Detailed Description
The technical solution of the present application will be described in detail below with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a digital automatic gain control structure in a power line carrier communication receiving process according to the present application, and as shown in fig. 1, the control structure includes an analog front end module, a software processing module, and a digital hardware module, which are connected in sequence.
The analog front end module comprises an analog programmable amplifier and an analog-to-digital converter, and the output of the analog programmable amplifier is input to the analog-to-digital converter. Specifically, the analog programmable amplifier is used for properly amplifying the analog signal amplitude of the power line carrier, and ensuring that the analog signal input is at the optimal operating point position of the analog-to-digital converter ADC. The ADC is used for carrying out analog-to-digital conversion on the power line carrier analog signal, and the output digital signal is 12 bits, so that the maximum signal amplitude is 2^11, namely 2048.
The effective gain interval of the analog programmable amplifier is 18 db-56 db, the actual gain is set by an external gain control word, and if the gain control word exceeds the set range, the maximum gain value or the minimum gain value is selected.
The initial optimum operating point of the ADC is selected to be the ADC input full scale power back-off of 15db, which can be expressed by the following equation: pref=10*logA2-15. The selection of the reference power ensures that the wanted signal does not introduce clipping noise in the ADC part, while the required accuracy of the subsequent digital signal processing is met.
The software processing module comprises an energy saturation preprocessing unit, a narrow-band interference detection suppression unit and a gain distributor; the output of the analog-to-digital converter is input to the energy saturation preprocessing unit, and the output of the energy saturation preprocessing unit is respectively input to the gain divider and the narrow-band interference detection suppression unit. Specifically, the energy saturation preprocessing unit is used for rapidly evaluating the energy saturation degree of the input digital signal and then transmitting the saturation information to the gain divider. The gain distributor is used for processing the signal energy evaluation information, reasonably adjusting the analog gain and the digital gain and finishing the convergence of automatic gain control. The narrow-band interference detection suppression unit is used for detecting the existence information of the narrow-band interference, realizing narrow-band suppression and reserving effective signals.
The schematic structural diagram of the energy saturation preprocessing unit is shown in fig. 2, and the energy saturation preprocessing unit includes an energy saturation depth estimating unit, an impulse interference judger, an impulse interference limiter, and a gain control table. The energy saturation depth estimation unit, namely software, takes an OFDM symbol length sampling point as a section, carries out statistical recording on the number and distribution of digital signal energy saturation points in the section, namely the number of sampling points with signal amplitude equal to 2048, and carries out signal energy saturation depth estimation by combining OFDM signal characteristics. If the energy of the sampling points exceeds 5% of the energy of the sampling points is saturated, a pulse interference judger is started, and the pulse interference judger judges whether interference comes or not by comparing whether the difference between the energy of the saturated sampling points and the average energy of other sampling points exceeds a threshold value or not; and if the pulse interference exceeds the threshold value, the pulse interference mark is positioned high, and the width of the statistical pulse interference is calculated. The pulse interference zone bit enables a pulse interference amplitude limiter, and the pulse interference amplitude limiter dynamically carries out amplitude limiting operation on the pulse interference signal according to the pulse interference width information obtained by the pulse interference judger and the received signal demodulation requirement, so that the saturation condition in the subsequent FFT conversion is prevented. When the signal is saturated and there is no pulse interference, the gain control table reads the energy saturation depth estimation result, and directly searches the gain step value corresponding to the saturation depth, and transmits to the gain distributor. The gain distributor controls the analog programmable amplifier to perform corresponding gain change, so as to realize the quick coarse adjustment of the signal energy.
The schematic structural diagram of the narrow-band interference detection suppression unit is shown in fig. 3, the narrow-band interference detection suppression unit includes a narrow-band detector, a narrow-band wave trap and an FIR filter, and the narrow-band detector is connected with the narrow-band wave trap and the FIR filter; the impulse interference judger is connected with the narrow-band detector, and the FIR filter is connected with the digital amplifier.
The narrow-band detector calculates 1024-point FFT energy of a digital signal output by a pulse interference judger of the energy saturation preprocessing unit, calculates an energy proportional relation between adjacent secondary large energy integer frequency points and maximum energy integer frequency points, determines the accurate frequency of narrow-band noise according to an energy ratio and a direction belonging interval, further evaluates the ratio of narrow-band interference energy to useful signal energy if the narrow-band interference frequency is positioned in a signal passband, and marks the position of the narrow-band interference in the passband high. The narrow-band wave trap enables the narrow-band wave trap according to the narrow-band interference frequency spectrum position and the interference-to-signal ratio result evaluated by the narrow-band detector, dynamically adjusts the wave trapping frequency and the wave trapping depth, carries out wave trapping treatment on the energy on the appointed sub-carrier, furthest retains the effective signal energy, and simultaneously adjusts the optimal working point of the ADC by looking up the table. The FIR filter adopts a 64-order low-pass filtering structure, the interference suppression degree on adjacent channels can reach more than 50db, and the down-sampling function is completed at the same time.
The digital hardware module comprises a digital amplifier, an energy evaluation and error calculation unit and an exponential slip averager; the output of the narrow-band interference detection suppression unit is input to a digital amplifier, the output of the digital amplifier is input to an energy evaluation and error calculation unit, and the output of the energy evaluation and error calculation unit is input to an exponential sliding averager. In particular, the digital amplifier is used to amplify the digital signal amplitude for use by a subsequent synchronization unit. The energy evaluation and error calculation unit is used for calculating the average energy of the signals of a section of length symbols and then carrying out weighting operation on the average energy of the signals and a dynamic energy threshold to obtain an energy error value. The exponential moving averager is used for carrying out exponential moving average operation on the energy error value, and selects an optimal balance point in two aspects of energy error control precision and gain convergence smoothing.
The structural schematic diagram of the energy evaluation and error calculation unit is shown in fig. 4, and the energy evaluation and error calculation unit comprises an energy calculation unit, a logarithmic transformation unit and an energy error calculation unit which are sequentially connected; the digital amplifier is connected with the energy calculating unit, and the energy error calculating unit is connected with the exponential sliding averager.
The existing signal energy calculation method generally adopts the following method:
where x (n) represents a digital signal.
In this application, to save implementation design resources of digital hardware, a signal energy calculation method using approximation is selected, including:
wherein, p (n) represents signal energy, M represents the number of sampling points of the digital signal, I (n) represents the digital signal of the I branch, and Q (n) represents the digital signal of the Q branch;
the logarithmic transformation unit is used for converting the signal energy dimension from linear unit watt to logarithmic unit db milliwatt, and can be represented by the following formula: psig=10*log10P (n). The energy error calculation can be expressed by the following equation: perr=Pref-Psig(ii) a Wherein, PrefRepresenting a preset signal reference threshold energy.
Fig. 5 is a schematic diagram of an exponential sliding averager, which is connected to a gain divider, the outputs of which are input to a digital amplifier and an analog programmable amplifier, respectively.
The exponential sliding averager is used for smoothing the gain correction value, and determines different weighting coefficients (the sum of the two weighting coefficients is 1) by using the last gain calibration value and the currently calculated actual power error value respectively, and can be expressed by the following formula: g(n)=(1-α)G(n-1)+αPerrWherein G is(0)=Gmax,Perr(0)=-PrefAnd α is 0.9. Its transfer function is a low-pass filter, when 0<α<2, the automatic gain control system is in an absolute stable state, so that the condition of rapid change of the amplitude of a received signal can be better overcome, and the consistency of the digital automatic gain control result is improved.
The gain distributor is used for quantizing and coding the gain control digital available for the analog programmable amplifier and the gain coefficient of the digital amplifier by using the nearest integer gain compensation value obtained by the current rounding method. And judging whether the integer gain value is in an effective controllable gain interval of the analog programmable amplifier, if so, giving the integer gain value to the analog programmable amplifier preferentially, and the gain coefficient of the digital amplifier is 1. If the digital amplifier is not in the effective controllable gain interval, the effective controllable gain of the analog programmable amplifier is set to be maximum or minimum preferentially according to the integer gain value, and then the gain coefficient of the digital amplifier is set to be a numerical value exceeding the effective controllable gain interval of the analog programmable amplifier.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CDROM, optical storage, etc.) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable one skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.