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CN114388490A - Packaging structure of intelligent power module and packaging method thereof - Google Patents

Packaging structure of intelligent power module and packaging method thereof Download PDF

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CN114388490A
CN114388490A CN202210042644.1A CN202210042644A CN114388490A CN 114388490 A CN114388490 A CN 114388490A CN 202210042644 A CN202210042644 A CN 202210042644A CN 114388490 A CN114388490 A CN 114388490A
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substrate
chip
power module
intelligent power
lead
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叶永生
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本发明提供了一种智能功率模块的封装结构及其封装方法。通过将驱动芯片和功率芯片分别设置在第一基板和第二基板上,并使第一基板和第二基板以相互面对的方式排布,实现了驱动芯片和功率芯片可以在厚度方向上竖直排布,大大减小了模块的贴装面积,实现模块的小型化。并且,针对相互面对设置的第一基板和第二基板而言,也便于将设置有功率芯片的第一基板的背面暴露出,以提高其散热效果。

Figure 202210042644

The invention provides a packaging structure of an intelligent power module and a packaging method thereof. By arranging the driving chip and the power chip on the first substrate and the second substrate respectively, and arranging the first substrate and the second substrate to face each other, the driving chip and the power chip can be vertically aligned in the thickness direction. The straight arrangement greatly reduces the mounting area of the module and realizes the miniaturization of the module. In addition, for the first substrate and the second substrate arranged facing each other, it is convenient to expose the back surface of the first substrate on which the power chip is arranged, so as to improve the heat dissipation effect.

Figure 202210042644

Description

智能功率模块的封装结构及其封装方法Packaging structure of intelligent power module and packaging method thereof

技术领域technical field

本发明涉及半导体技术领域,特别涉及一种智能功率模块的封装结构及其封装方法。The invention relates to the technical field of semiconductors, in particular to a packaging structure of an intelligent power module and a packaging method thereof.

背景技术Background technique

智能功率模块(IPM,Intelligent Power Module)是将驱动电路和功率器件集于一体,适应了当今功率器件其趋向于模块化、复合化和功率集成的发展方向,尤其在电力电子当中得到越来越广泛的应用。Intelligent Power Module (IPM, Intelligent Power Module) integrates drive circuits and power devices, adapting to the development direction of today's power devices, which tend to be modular, composite and power integration, especially in power electronics. Wide range of applications.

目前,针对智能功率模块的常见封装类型一般有DIP(双列直插式封装技术)、SOP(小外形封装)和QFN(方形扁平无引脚封装)这三种形式。然而,对于DIP和SOP类封装而言,其需要设置较长引脚,会在系统电路板上占用较大的面积,不利于系统和设备的小型化;以及,对于QFN类封装而言,其未设置有金属暴露的结构,使得其散热效果较差,仅适用于小功率应用。At present, the common package types for intelligent power modules generally include DIP (dual in-line package technology), SOP (small outline package) and QFN (square flat no lead package). However, for DIP and SOP type packages, it needs to set longer pins, which will occupy a larger area on the system circuit board, which is not conducive to the miniaturization of systems and equipment; and, for QFN type packages, its No structure with exposed metal is provided, which makes its heat dissipation effect poor, and is only suitable for low-power applications.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于提供一种智能功率模块的封装结构,以解决现有的智能功率模块的封装结构其尺寸较大且散热效果不佳的问题。The purpose of the present invention is to provide a package structure of an intelligent power module, so as to solve the problems of large size and poor heat dissipation effect of the existing package structure of an intelligent power module.

为解决上述技术问题,本发明提供一种智能功率模块的封装结构,包括:设置有功率芯片的第一基板、设置有驱动芯片的第二基板、以及将所述第一基板和所述第二基板封装固定的塑封层。其中,所述第一基板具有所述功率芯片的一面朝向所述第二基板具有所述驱动芯片的一面,并且所述第一基板背离所述功率芯片的一面从所述塑封层暴露出。In order to solve the above technical problems, the present invention provides a package structure of an intelligent power module, comprising: a first substrate provided with a power chip, a second substrate provided with a driver chip, and a combination of the first substrate and the second substrate. The substrate encapsulates the fixed plastic encapsulation layer. Wherein, the side of the first substrate with the power chip faces the side of the second substrate with the driver chip, and the side of the first substrate away from the power chip is exposed from the plastic sealing layer.

可选的,所述第一基板为覆金属陶瓷基板,所述覆金属陶瓷基板背离功率芯片的表面上的金属层从所述塑封层暴露出。Optionally, the first substrate is a metal-clad ceramic substrate, and the metal layer on the surface of the metal-clad ceramic substrate facing away from the power chip is exposed from the plastic sealing layer.

可选的,所述第二基板中形成有多个贯穿所述第二基板的引出端子,所述引出端子从所述第二基板背离所述驱动芯片的一面凸出。Optionally, a plurality of lead-out terminals penetrating through the second substrate are formed in the second substrate, and the lead-out terminals protrude from a side of the second substrate away from the driving chip.

可选的,所述塑封层覆盖所述第二基板背离所述驱动芯片的一面,并使所述引出端子从所述塑封层暴露出。Optionally, the plastic encapsulation layer covers a side of the second substrate away from the driving chip, and exposes the lead terminals from the plastic encapsulation layer.

可选的,所述第二基板为印刷电路板,所述驱动芯片倒装至所述印刷电路板上,并和所述印刷电路板中的线路电气连接。Optionally, the second substrate is a printed circuit board, and the driving chip is flip-chip mounted on the printed circuit board, and is electrically connected to a circuit in the printed circuit board.

可选的,所述第一基板和所述第二基板之间还设置有连接柱,所述第一基板和所述第二基板之间通过所述连接柱电气连接。Optionally, a connecting column is further provided between the first substrate and the second substrate, and the first substrate and the second substrate are electrically connected through the connecting column.

本发明还提供了一种智能功率模块的封装方法,包括:在第一基板上设置功率芯片,在第二基板上设置驱动芯片;以及,以所述第一基板具有功率芯片的一面朝向所述第二基板具有驱动芯片的一面进行注塑封装,形成塑封层,所述第一基板背离所述功率芯片的一面从所述塑封层暴露出。The present invention also provides a packaging method for an intelligent power module, comprising: arranging a power chip on a first substrate, and arranging a driving chip on a second substrate; The side of the second substrate with the driving chip is injection-molded and encapsulated to form a plastic encapsulation layer, and the side of the first substrate facing away from the power chip is exposed from the plastic encapsulation layer.

可选的,所述第二基板为印刷电路板,所述驱动芯片倒装至所述印刷电路板上,并和所述印刷电路板中的线路电气连接。Optionally, the second substrate is a printed circuit board, and the driving chip is flip-chip mounted on the printed circuit board, and is electrically connected to a circuit in the printed circuit board.

可选的,所述第二基板中形成有多个贯穿所述第二基板的引出端子;在注塑封装后,所述引出端子从所述塑封层暴露出。Optionally, a plurality of lead-out terminals penetrating through the second substrate are formed in the second substrate; after injection molding and encapsulation, the lead-out terminals are exposed from the plastic encapsulation layer.

可选的,进行注塑封装之前,在所述第一基板或所述第二基板上设置连接柱,并对所述第一基板和所述第二基板进行装配,以使所述连接柱的两端固定连接所述第一基板和所述第二基板。Optionally, before performing injection molding and encapsulation, a connection post is arranged on the first substrate or the second substrate, and the first substrate and the second substrate are assembled, so that the two parts of the connection post are assembled. The end is fixedly connected to the first substrate and the second substrate.

在本发明提供的智能功率模块的封装结构及其封装方法中,将驱动芯片和功率芯片分别设置在第一基板和第二基板上,并使第一基板和第二基板以相互面对的方式排布,使得驱动芯片和功率芯片可以在厚度方向上竖直排布,大大减小了模块的贴装面积,实现模块的小型化。并且,在达到模块的面积缩减的情况下,也允许设置有功率芯片的第一基板可以暴露出更大的面积,从而可进一步提高模块的散热效果,以满足智能功率模块在大功率应用中的需求。In the packaging structure of the smart power module and the packaging method thereof provided by the present invention, the driver chip and the power chip are respectively arranged on the first substrate and the second substrate, and the first substrate and the second substrate face each other The arrangement enables the driver chip and the power chip to be vertically arranged in the thickness direction, which greatly reduces the mounting area of the module and realizes the miniaturization of the module. In addition, in the case of reducing the area of the module, it is also allowed to expose a larger area of the first substrate provided with the power chip, so that the heat dissipation effect of the module can be further improved to meet the requirements of the intelligent power module in high-power applications. need.

附图说明Description of drawings

图1是一种智能功率模块的封装结构。Figure 1 is a package structure of an intelligent power module.

图2是本发明一实施例中的智能功率模块的封装结构。FIG. 2 is a package structure of an intelligent power module in an embodiment of the present invention.

图3是本发明一实施例中的智能功率模块的封装方法的流程示意图。FIG. 3 is a schematic flowchart of a packaging method of an intelligent power module according to an embodiment of the present invention.

其中,附图标记如下:Among them, the reference numerals are as follows:

100-第一基板;100 - the first substrate;

110-陶瓷层;110 - ceramic layer;

120-金属层;120 - metal layer;

10a/100a-功率芯片;10a/100a-power chip;

200-第二基板;200 - the second substrate;

20a/200a-驱动芯片;20a/200a- driver chip;

30/300-塑封层;30/300-plastic layer;

400-引出端子;400-lead terminal;

410-导电柱;410 - conductive column;

420-接触垫;420 - contact pad;

500-连接柱。500 - connecting column.

具体实施方式Detailed ways

承如背景技术所述,传统工艺中对智能功率模块的封装方式,存在封装后的结构尺寸较大,以及散热效果不佳的问题。As described in the background art, the packaging method of the intelligent power module in the traditional process has the problems that the packaged structure size is large and the heat dissipation effect is not good.

对此,一种智能功率模块的封装结构被提出,例如图1所示的一种智能功率模块的封装结构,其具体将功率芯片10a贴装在一基板上,并使所述基板和框架连接,以及将驱动芯片20a贴装在框架上,所述功率芯片10a通过键合引线和与其并排设置的驱动芯片20a电气连接。以及,由塑封层30将基板、功率芯片10a、驱动芯片20a和框架封装固定,其中具有功率芯片10a的基板的背面从所述塑封层30暴露出,用于实现散热,以及框架的引脚也从所述塑封层30中延伸出,用于与外部电路电气连接。In this regard, a package structure of an intelligent power module is proposed, such as the package structure of an intelligent power module shown in FIG. 1, which specifically mounts the power chip 10a on a substrate, and connects the substrate and the frame , and mount the driver chip 20a on the frame, the power chip 10a is electrically connected with the driver chip 20a arranged side by side with the bonding wire. And, the substrate, the power chip 10a, the driving chip 20a and the frame are packaged and fixed by the plastic packaging layer 30, wherein the backside of the substrate with the power chip 10a is exposed from the plastic packaging layer 30 for heat dissipation, and the pins of the frame are also It extends from the plastic encapsulation layer 30 and is used for electrical connection with external circuits.

图1所示的智能功率模块中,通过暴露出的基板表面以达到散热的效果,然而并排设置的驱动芯片20a和功率芯片10a仍需占用较大的面积,导致模块的体积相对较大,限制了模块的小型化。In the smart power module shown in FIG. 1 , the exposed surface of the substrate is used to achieve the effect of heat dissipation. However, the driver chip 20a and the power chip 10a arranged side by side still need to occupy a large area, resulting in a relatively large volume of the module. miniaturization of the module.

为了更进一步的优化智能功率模块,本发明提供了一种智能功率模块的封装结构,其将功率芯片和驱动芯片分别设置在第一基板和第二基板上,从而可将第一基板和第二基板以面对面的方式排布,实现了驱动芯片和功率芯片可以在厚度方向上竖直排布,有效减小了模块的体积。并且,针对面对面排布的第一基板和第二基板而言,也利于将设置有功率芯片的第一基板的背面暴露出,以提高其散热效果。In order to further optimize the intelligent power module, the present invention provides a package structure of the intelligent power module, wherein the power chip and the driving chip are respectively arranged on the first substrate and the second substrate, so that the first substrate and the second substrate can be assembled together. The substrates are arranged in a face-to-face manner, so that the driving chips and the power chips can be arranged vertically in the thickness direction, which effectively reduces the volume of the module. In addition, for the first substrate and the second substrate arranged face to face, it is also beneficial to expose the back surface of the first substrate provided with the power chip, so as to improve the heat dissipation effect.

以下结合附图和具体实施例对本发明提出的智能功率模块的封装结构及其封装方法作进一步详细说明。根据下面说明,本发明的优点和特征将更清楚。需要说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。以及附图中所示的诸如“上方”,“下方”,“顶部”,“底部”,“上方”和“下方”之类的相对术语可用于描述彼此之间的各种元件的关系。这些相对术语旨在涵盖除附图中描绘的取向之外的元件的不同取向。例如,如果装置相对于附图中的视图是倒置的,则例如描述为在另一元件“上方”的元件现在将在该元件下方。The encapsulation structure and encapsulation method of the intelligent power module proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are all in a very simplified form and in inaccurate scales, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the present invention. As well as relative terms such as "above," "below," "top," "bottom," "over," and "under" as shown in the figures may be used to describe the relationship of various elements to each other. These relative terms are intended to encompass different orientations of the elements in addition to the orientation depicted in the figures. For example, if the device is turned over with respect to the view in the figures, elements described as "above" another element, for example, would now be below the element.

图2为本发明一实施例中的智能功率模块的结构示意图,如图2所示,所述智能功率模块包括:设置有功率芯片100a的第一基板100、设置有驱动芯片200a的第二基板200、以及将所述第一基板100和所述第二基板200封装固定的塑封层300。其中,所述功率芯片100a例如可以是IGBT芯片、FRD芯片或MOSFET芯片等,所述驱动芯片200a例如是MCU控制芯片等。FIG. 2 is a schematic structural diagram of an intelligent power module according to an embodiment of the present invention. As shown in FIG. 2 , the intelligent power module includes: a first substrate 100 provided with a power chip 100 a and a second substrate provided with a driving chip 200 a 200 , and a plastic encapsulation layer 300 for encapsulating and fixing the first substrate 100 and the second substrate 200 . Wherein, the power chip 100a may be, for example, an IGBT chip, a FRD chip, or a MOSFET chip, etc., and the driving chip 200a may be, for example, an MCU control chip or the like.

进一步的,所述第一基板100具有所述功率芯片100a的一面朝向所述第二基板200具有所述驱动芯片200a的一面。即,所述功率芯片100a和所述驱动芯片200a被塑封在第一基板100和第二基板200之间,实现了功率芯片100a和驱动芯片200a在竖直方向上排布。与传统工艺中将驱动芯片和功率芯片以水平向并排布置相比,本实施例中沿着厚度方向竖直排布功率芯片100a和驱动芯片200a,将有利于缩减整个功率模块的尺寸,实现模块的小型化。Further, the side of the first substrate 100 with the power chip 100 a faces the side of the second substrate 200 with the driving chip 200 a. That is, the power chip 100a and the driving chip 200a are plastic-sealed between the first substrate 100 and the second substrate 200, so that the power chip 100a and the driving chip 200a are arranged in a vertical direction. Compared with the horizontal arrangement of the driver chip and the power chip in the traditional process, the vertical arrangement of the power chip 100a and the driver chip 200a along the thickness direction in this embodiment will help reduce the size of the entire power module and realize the module of miniaturization.

继续参考图2所示,所述第一基板100背离所述功率芯片100a的一面从所述塑封层300暴露出,用作模块的主要散热面,使得功率芯片100a在运行过程中所产生的热量可以经由所述第一基板100的背面快速扩散出。需要说明的是,本实施例中通过使功率芯片100a和驱动芯片200a在竖直方向上布置,大大减小了模块的贴装面积,而在此基础上,还有利于进一步增大第一基板100的面积,相应的扩大了模块暴露出的散热面的面积,提高散热效果。即,本实施例提供的智能功率模块的封装结构,其相对于传统的封装结构而言,不仅可以减小模块的体积,还进一步改善了散热效果,从而更适用于大功率应用。Continuing to refer to FIG. 2 , the side of the first substrate 100 facing away from the power chip 100 a is exposed from the plastic encapsulation layer 300 and used as the main heat dissipation surface of the module, so that the heat generated by the power chip 100 a during operation It can be quickly diffused out through the back surface of the first substrate 100 . It should be noted that in this embodiment, by arranging the power chip 100a and the driving chip 200a in the vertical direction, the mounting area of the module is greatly reduced, and on this basis, it is also beneficial to further increase the first substrate The area of 100, correspondingly expands the area of the heat dissipation surface exposed by the module and improves the heat dissipation effect. That is, the package structure of the intelligent power module provided by this embodiment, compared with the traditional package structure, not only can reduce the volume of the module, but also further improves the heat dissipation effect, so that it is more suitable for high-power applications.

具体的方案中,所述第一基板100可以为覆金属陶瓷基板,所述覆金属陶瓷基板背离功率芯片的表面上的金属层即可从所述塑封层300暴露出。由于所述覆金属陶瓷基板具有高导热、低热阻等特性,其能够实现高效的散热效果,并且所述覆金属陶瓷基板的表面上还可以制备出多种线路图形,基板上连接的功率芯片100a即可通过覆金属陶瓷基板表面上的线路与其他芯片实现电性通讯。In a specific solution, the first substrate 100 may be a metal-clad ceramic substrate, and the metal layer on the surface of the metal-clad ceramic substrate facing away from the power chip may be exposed from the plastic sealing layer 300 . Since the metal-clad ceramic substrate has the characteristics of high thermal conductivity and low thermal resistance, it can achieve efficient heat dissipation, and a variety of circuit patterns can be prepared on the surface of the metal-clad ceramic substrate. The power chip 100a connected to the substrate That is, electrical communication can be realized with other chips through the lines on the surface of the metal-clad ceramic substrate.

本实施例中,所述第一基板100具体包括陶瓷层110和覆盖在所述陶瓷层110的相对两个表面上的金属层120。其中,所述第一基板100背离功率芯片100a的表面上的金属层从所述塑封层300暴露出。以及,所述第一基板100设置有功率芯片100a的表面上的金属层可以为图形化后的金属线路,所述功率芯片100a与所述第一基板100上的金属线路电气连接。具体的应用中,所述陶瓷层110的材料例如包括氧化铝(Al2O3)、氮化铝(AlN)和氮化硅(Si3N4)中的至少一种,以及所述金属层120例如包括铜(Cu)和铝(Al)中的至少一种材料。In this embodiment, the first substrate 100 specifically includes a ceramic layer 110 and a metal layer 120 covering two opposite surfaces of the ceramic layer 110 . Wherein, the metal layer on the surface of the first substrate 100 facing away from the power chip 100 a is exposed from the plastic sealing layer 300 . Also, the metal layer on the surface of the first substrate 100 on which the power chip 100 a is disposed may be a patterned metal circuit, and the power chip 100 a is electrically connected to the metal circuit on the first substrate 100 . In a specific application, the material of the ceramic layer 110 includes, for example, at least one of aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN) and silicon nitride (Si 3 N 4 ), and the metal layer 120 includes, for example, at least one material of copper (Cu) and aluminum (Al).

进一步的,所述功率芯片100a例如可通过焊接或烧结的方式设置在所述第一基板100上。以及,所述功率芯片100a远离第一基板的一侧表面可通过键合引线电气连接至所述第一基板100上的金属线路。Further, the power chip 100a may be disposed on the first substrate 100 by welding or sintering, for example. Also, a surface of the power chip 100a on one side away from the first substrate may be electrically connected to metal lines on the first substrate 100 through bonding wires.

继续参考图2所示,本实施例中,可将模块的引出端子400设置在所述第二基板200上,并使所述引出端子400从塑封层300暴露出,以用于与外部电路电气连接。可选的,所述第二基板200背离所述驱动芯片200a的一面也覆盖有所述塑封层300,并使所述引出端子400从塑封层300暴露出。Continuing to refer to FIG. 2 , in this embodiment, the lead-out terminal 400 of the module can be disposed on the second substrate 200 and the lead-out terminal 400 is exposed from the plastic encapsulation layer 300 for electrical connection with external circuits connect. Optionally, the side of the second substrate 200 facing away from the driving chip 200 a is also covered with the plastic encapsulation layer 300 , and the lead-out terminals 400 are exposed from the plastic encapsulation layer 300 .

其中,所述引出端子400包括贯穿第二基板200的导电柱410和接触垫420,所述导电柱410贯穿所述第二基板200而延伸至所述第二基板200背离第一基板100的表面,所述接触垫420形成在所述第二基板200背离所述第一基板100的表面并覆盖所述导电柱410的端部。本实施例中,可通过贯穿所述第二基板200的方式将所述引出端子400引出至所述第二基板200暴露出的表面上,使得引出端子400的长度更短,有利于降低信号的干扰,提高模块的性能。The lead-out terminal 400 includes conductive pillars 410 and contact pads 420 penetrating through the second substrate 200 , and the conductive pillars 410 extend through the second substrate 200 to the surface of the second substrate 200 away from the first substrate 100 . , the contact pads 420 are formed on the surface of the second substrate 200 away from the first substrate 100 and cover the ends of the conductive pillars 410 . In this embodiment, the lead-out terminal 400 can be led out to the exposed surface of the second substrate 200 by penetrating the second substrate 200 , so that the length of the lead-out terminal 400 is shorter, which is beneficial to reduce the signal intensity. interference and improve the performance of the module.

进一步的,所述第二基板200例如可以为印刷电路板(PCB),所述印刷电路板能够实现在更小的体积下实现更复杂的逻辑连接电路,所述驱动芯片200a电气连接所述印刷电路板中的线路。具体的,所述驱动芯片200a例如可倒装在所述印刷电路板上(例如,所述驱动芯片200a可通过粘连或焊接等方式设置在所述第二基板200上),以使所述驱动芯片200a可直接电性连接至所述印刷电路中的线路,因此,驱动芯片200a的信号传输可直接通过印刷电路板内部的走线实现,有效改善了驱动信号受干扰的问题,提高了模块的稳定性。并且,也无需对驱动芯片200a进行外部打线,省略了引线键合的步骤,节省工艺且可降低成本,并有利于实现尺寸的进一步缩减(无需为引线键合预留空间)。Further, the second substrate 200 can be, for example, a printed circuit board (PCB), which can realize a more complex logic connection circuit in a smaller volume, and the driving chip 200a is electrically connected to the printed circuit board. lines in the circuit board. Specifically, the driver chip 200a can be flip-chipped on the printed circuit board, for example (for example, the driver chip 200a can be disposed on the second substrate 200 by means of adhesion or welding), so that the driver The chip 200a can be directly electrically connected to the circuit in the printed circuit. Therefore, the signal transmission of the driving chip 200a can be directly realized through the internal wiring of the printed circuit board, which effectively improves the problem of interference of the driving signal and improves the reliability of the module. stability. In addition, there is no need to perform external wire bonding on the driver chip 200a, the step of wire bonding is omitted, the process is saved, the cost can be reduced, and further size reduction is facilitated (no space for wire bonding is required).

进一步的方案中,所述第一基板100和所述第二基板200之间也相互电性连接,以使得所述驱动芯片200a和所述功率芯片100a之间可第一基板100和第二基板200实现电气连接。In a further solution, the first substrate 100 and the second substrate 200 are also electrically connected to each other, so that the first substrate 100 and the second substrate can be connected between the driving chip 200a and the power chip 100a. 200 for electrical connection.

具体参考图2所示,本实施例中,在所述第一基板100和所述第二基板200之间还设置有连接柱500,所述连接柱500可采用导电材料形成(所述连接柱500的材料例如包括铜、铝、金等),所述第一基板100和所述第二基板200通过所述连接柱500电性连接。其中,所述连接柱500可设置在第一基板100和第二基板200的边缘位置。Referring specifically to FIG. 2 , in this embodiment, a connection post 500 is further provided between the first substrate 100 and the second substrate 200 , and the connection post 500 may be formed of a conductive material (the connection post The material of 500 includes, for example, copper, aluminum, gold, etc.), and the first substrate 100 and the second substrate 200 are electrically connected through the connection posts 500 . Wherein, the connection posts 500 may be disposed at the edge positions of the first substrate 100 and the second substrate 200 .

具体的,在所述第二基板200面向所述第一基板100的表面上可设置有导电连接垫,所述连接柱500的一端即抵触至所述第二基板200的导电连接垫上,所述连接柱500的另一端抵触至第一基板100的金属层120上。其中,所述导电连接垫的材料可以和所述导电柱500的材料相同,也可以不同。Specifically, a conductive connection pad may be provided on the surface of the second substrate 200 facing the first substrate 100 , and one end of the connection post 500 is in contact with the conductive connection pad of the second substrate 200 . The other end of the connection post 500 abuts against the metal layer 120 of the first substrate 100 . The materials of the conductive connection pads may be the same as the materials of the conductive pillars 500 , or may be different.

继续参考图2所示,多个引出端子400中包括与所述连接柱500电性连接的第一引出端子。本实施例中,所述第一引出端子中的导电柱410其靠近连接柱500的一端连接至连接垫的一个表面,所述连接柱500抵触至所述连接垫的另一个表面。以及,多个引出端子400中还包括与所述驱动芯片200a电性连接的第二引出端子,所述第二引出端子中的导电柱410的端部和所述驱动芯片200a电性连接。Continuing to refer to FIG. 2 , the plurality of lead-out terminals 400 include a first lead-out terminal that is electrically connected to the connection post 500 . In this embodiment, one end of the conductive post 410 in the first lead-out terminal close to the connection post 500 is connected to one surface of the connection pad, and the connection post 500 abuts against the other surface of the connection pad. In addition, the plurality of lead-out terminals 400 further include a second lead-out terminal electrically connected to the driving chip 200a, and the ends of the conductive pillars 410 in the second lead-out terminal are electrically connected to the driving chip 200a.

本实施例中,所述塑封层300将所述第一基板100、所述第二基板200和所述连接柱500塑封固定,其中,所述塑封层300的塑封料例如包括树脂材料等。具体的,所述塑封层300将所述第一基板100、所述第二基板200和所述连接柱500的侧壁部分均塑封在内,并使所述第一基板100背离第二基板200的表面从所述塑封层300暴露出,以用于构成主散热面,以及所述第二基板200上的引出端子400也从所述塑封层300暴露出,用于引出模块的电极并与外部电路连接。In this embodiment, the first substrate 100 , the second substrate 200 and the connecting post 500 are fixed by the plastic sealing layer 300 , wherein the plastic sealing material of the plastic sealing layer 300 includes, for example, a resin material or the like. Specifically, the plastic encapsulation layer 300 encapsulates the first substrate 100 , the second substrate 200 and the sidewalls of the connecting posts 500 , and makes the first substrate 100 face away from the second substrate 200 The surface of the second substrate 200 is exposed from the plastic encapsulation layer 300 to form the main heat dissipation surface, and the lead terminals 400 on the second substrate 200 are also exposed from the plastic encapsulation layer 300 to lead out the electrodes of the module and communicate with the outside circuit connection.

可见,本实施例提供的智能功率模块,其主要的散热通路是由功率芯片100a往第一基板100的外侧扩散,而其主要的电气通路则是由第一基板100和第二基板200进一步传输至所述第二基板200外侧的引出端子400,实现了散热通路与电气通路朝向相反方向流通,使得两者通过不同路径行进,相互干扰较小。It can be seen that, in the smart power module provided in this embodiment, the main heat dissipation path is diffused from the power chip 100 a to the outside of the first substrate 100 , and the main electrical path is further transmitted by the first substrate 100 and the second substrate 200 . The lead-out terminal 400 to the outside of the second substrate 200 realizes that the heat dissipation path and the electrical path flow in opposite directions, so that the two travel through different paths, with less mutual interference.

此外,本实施例中,将第一基板100和第二基板200相对设置,还可进一步实现第一基板100上的电流流通路径和第二基板200上的电流流通路径相反或大致相反或者趋势上相反,以使得第一基板100上的电路流经和第二基板200上的电流路径互感,以减少杂散电感并有利于抵消自感。具体的,针对印刷电路板而言,其内部的线路排布具有较大的灵活性,因此可通过对印刷电路板中的线路进行调整,以实现第一基板100上的电流流通路径和第二基板200上的电流流通路径相反或大致相反或者趋势上相反。In addition, in this embodiment, by arranging the first substrate 100 and the second substrate 200 opposite to each other, the current flow path on the first substrate 100 and the current flow path on the second substrate 200 may be opposite or substantially opposite or in a trend. On the contrary, the circuit on the first substrate 100 and the current path on the second substrate 200 are made to have mutual inductance, so as to reduce the stray inductance and help to cancel the self-inductance. Specifically, for the printed circuit board, the internal circuit arrangement has greater flexibility, so the circuit in the printed circuit board can be adjusted to realize the current flow path on the first substrate 100 and the second circuit The current flow paths on the substrate 200 are opposite or substantially opposite or tend to be opposite.

基于如上所述的智能功率模块的封装结构,以下对智能功率模块的封装方法进行说明。具体的,所述封装方法包括:在第一基板上设置功率芯片,在第二基板上设置驱动芯片;接着,以所述第一基板具有功率芯片的一面朝向所述第二基板具有驱动芯片的一面进行注塑封装形成塑封层,所述第一基板背离所述功率芯片的一面从所述塑封层暴露出。Based on the packaging structure of the smart power module as described above, the packaging method of the smart power module will be described below. Specifically, the packaging method includes: arranging a power chip on a first substrate, and arranging a driving chip on a second substrate; then, orienting the side of the first substrate with the power chip toward the second substrate with the driving chip One side is injection-molded and encapsulated to form a plastic encapsulation layer, and the side of the first substrate facing away from the power chip is exposed from the plastic encapsulation layer.

下面结合图2和图3对本实施例中的封装方法进行举例说明。其中,图3为本发明一实施例中的智能功率模块的封装方法的流程示意图。The encapsulation method in this embodiment is illustrated below with reference to FIG. 2 and FIG. 3 . 3 is a schematic flowchart of a packaging method of an intelligent power module according to an embodiment of the present invention.

首先,在第一基板100上设置功率芯片100a。其中,所述第一基板100例如为覆金属陶瓷基板,所述功率芯片100a可通过键合、焊接或烧结的方式设置在所述第一基板100上。First, the power chip 100 a is provided on the first substrate 100 . The first substrate 100 is, for example, a metal-clad ceramic substrate, and the power chip 100a may be disposed on the first substrate 100 by bonding, welding or sintering.

以及,在第二基板200上设置驱动芯片200a,其中,所述第二基板200例如可以为印刷电路板(PCB),所述驱动芯片200a可通过粘连或焊接等方式设置在所述第二基板200上。本实施例中,所述驱动芯片200a倒装在所述第二基板200上,以使所述驱动芯片200a可直接电性连接至所述印刷电路中的线路,进而可直接通过印刷电路板内部的走线实现信号传输,有效改善了驱动信号受干扰的问题,并且也无需对驱动芯片200a进行外部打线,有利于节省工艺且可降低成本。And, the driver chip 200a is disposed on the second substrate 200, wherein the second substrate 200 can be, for example, a printed circuit board (PCB), and the driver chip 200a can be disposed on the second substrate by means of adhesion or welding. 200 on. In this embodiment, the driver chip 200a is flip-chipped on the second substrate 200, so that the driver chip 200a can be directly electrically connected to the circuit in the printed circuit, and then can directly pass through the inside of the printed circuit board. Signal transmission can be realized by using the same wiring, which effectively improves the problem that the driving signal is disturbed, and also does not need to perform external wiring on the driving chip 200a, which is beneficial to save the process and reduce the cost.

进一步的,所述第二基板200上还形成有引出端子400,所述引出端子400暴露于所述第二基板200背离所述驱动芯片200a的表面。具体的,所述引出端子400的形成方法例如包括:在所述第二基板200中形成贯穿孔,在所述贯穿孔内填充导电材料形成导电柱410;以及,在第二基板200背离所述驱动芯片200a的表面上通过膜层图形化以形成接触垫420,所述接触垫420覆盖所述导电柱410的端部。Further, lead-out terminals 400 are formed on the second substrate 200 , and the lead-out terminals 400 are exposed on the surface of the second substrate 200 away from the driving chip 200 a. Specifically, the method for forming the lead-out terminal 400 includes, for example: forming a through hole in the second substrate 200 , filling the through hole with a conductive material to form a conductive column 410 ; and, on the second substrate 200 facing away from the The surface of the driving chip 200 a is patterned by a film layer to form contact pads 420 , and the contact pads 420 cover the ends of the conductive pillars 410 .

接着,在所述第一基板100或第二基板200上设置连接柱500,所述连接柱500例如可焊接至所述第一基板100或所述第二基板200。具体的,所述连接柱500设置在第一基板100具有功率芯片100a的表面上;或者,所述连接柱500设置在第二基板200具有驱动芯片200a的表面上。本实施了中,以所述连接柱500焊接在所述第一基板100上为例进行说明;然而其他实施例中,所述连接柱500也可以优先焊接在所述第二基板200上。Next, connecting posts 500 are disposed on the first substrate 100 or the second substrate 200 , and the connecting posts 500 can be soldered to the first substrate 100 or the second substrate 200 , for example. Specifically, the connection post 500 is disposed on the surface of the first substrate 100 having the power chip 100a; or, the connection post 500 is disposed on the surface of the second substrate 200 having the driving chip 200a. In this embodiment, the connection post 500 is welded on the first substrate 100 as an example for illustration; however, in other embodiments, the connection post 500 may also be preferentially welded on the second substrate 200 .

所述连接柱500不仅可以在装配第一基板100和第二基板200时,用于初步限定第一基板100和第二基板200的间距,并且还用于实现第一基板100和第二基板200之间的电性连接。The connection post 500 can not only be used to preliminarily define the distance between the first substrate 100 and the second substrate 200 when assembling the first substrate 100 and the second substrate 200 , but also be used to realize the first substrate 100 and the second substrate 200 electrical connection between them.

接着,装配第一基板100和第二基板200。具体的,以所述第一基板100具有功率芯片100a的一面朝向所述第二基板200具有驱动芯片200a的一面进行装配,在进行装配时所述连接柱500抵触至未设置有连接柱的基板表面上,并可通过压接或焊接的方式使所述连接柱500的两端固定连接第一基板100和第二基板200。Next, the first substrate 100 and the second substrate 200 are assembled. Specifically, the first substrate 100 having the power chip 100a is assembled with the side facing the second substrate 200 having the driving chip 200a, and the connection post 500 is in contact with the substrate not provided with the connection post during assembly. On the surface, the two ends of the connecting post 500 can be fixedly connected to the first substrate 100 and the second substrate 200 by means of crimping or welding.

接着,注塑封装以形成塑封层300,所述第一基板100背离所述功率芯片100a的一面从所述塑封层300暴露出。以及,所述第二基板200中的引出端子400也从所述塑封层300暴露出。本实施例中,所述塑封层300还覆盖所述第二基板200背离第一基板100的表面,只要使所述引出端子400暴露出即可。Next, injection molding is performed to form a plastic encapsulation layer 300 , and the side of the first substrate 100 facing away from the power chip 100 a is exposed from the plastic encapsulation layer 300 . Also, the lead-out terminals 400 in the second substrate 200 are also exposed from the plastic encapsulation layer 300 . In this embodiment, the plastic sealing layer 300 also covers the surface of the second substrate 200 away from the first substrate 100 , as long as the lead terminals 400 are exposed.

综上所述,在本实施例提供的智能功率模块中,通过将驱动芯片和功率芯片分别设置在第一基板和第二基板上,从而可将第一基板和第二基板以相互面对的方式排布,实现了驱动芯片和功率芯片可以在厚度方向上竖直排布,大大减小了模块的贴装面积,实现模块的小型化(例如在一具体示例中,相对于图2所示的模块而言,本实施例中的模块面积可减少大约30%。)。并且,针对面对面设置的第一基板和第二基板而言,也利于将设置有功率芯片的第一基板的背面暴露出,以提高其散热效果。To sum up, in the intelligent power module provided in this embodiment, by arranging the driver chip and the power chip on the first substrate and the second substrate, respectively, the first substrate and the second substrate can face each other. It is arranged in the same way that the driver chip and the power chip can be arranged vertically in the thickness direction, which greatly reduces the mounting area of the module and realizes the miniaturization of the module (for example, in a specific example, compared with the one shown in FIG. 2 ) In terms of modules, the module area in this embodiment can be reduced by about 30%.). In addition, for the first substrate and the second substrate arranged facing each other, it is also beneficial to expose the back surface of the first substrate on which the power chip is arranged, so as to improve the heat dissipation effect.

进一步的,设置有驱动芯片的第二基板具体可以为印刷电路板,一方面可以在更小的体积下实现更复杂的电路布置,并可使驱动芯片直接倒装在所述印刷电路板上,而无需对驱动芯片进行外部打线;另一方面,还有利于将引出端子由所述第二基板延伸出,使得引出端子的长度更短,有利于降低信号的干扰。Further, the second substrate provided with the driver chip may specifically be a printed circuit board. On the one hand, a more complex circuit arrangement can be realized in a smaller volume, and the driver chip can be directly flipped on the printed circuit board. There is no need to perform external wiring on the driver chip; on the other hand, it is also beneficial to extend the lead-out terminal from the second substrate, so that the length of the lead-out terminal is shorter, which is beneficial to reduce signal interference.

此外,本实施例中通过使第一基板和第二基板相对设置,并使第一基板和第二基板相互背离的表面分别作为主散热面和电性引出面(即,设置有引出端子的表面),从而实现了散热通路与电气通路朝向相反方向流通,降低干扰。同时,还可进一步实现第一基板上的电流流通路径和第二基板上的电流流通路径相反或大致相反或者趋势上相反,以使得第一基板上的电路流经和第二基板上的电流路径互感,以减少杂散电感并有利于抵消自感。In addition, in this embodiment, the first substrate and the second substrate are arranged opposite to each other, and the surfaces of the first substrate and the second substrate that face away from each other are used as the main heat dissipation surface and the electrical lead-out surface (that is, the surface on which the lead-out terminals are arranged). ), so that the heat dissipation path and the electrical path flow in opposite directions, reducing interference. At the same time, the current flow paths on the first substrate and the current flow paths on the second substrate may be opposite or substantially opposite or in opposite trends, so that the circuits on the first substrate flow through the current paths on the second substrate mutual inductance to reduce stray inductance and help to cancel self-inductance.

需要说明的是,虽然本发明已以较佳实施例披露如上,然而上述实施例并非用以限定本发明。对于任何熟悉本领域的技术人员而言,在不脱离本发明技术方案范围情况下,都可利用上述揭示的技术内容对本发明技术方案作出许多可能的变动和修饰,或修改为等同变化的等效实施例。因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰,均仍属于本发明技术方案保护的范围。It should be noted that, although the present invention has been disclosed above with preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, many possible changes and modifications can be made to the technical solution of the present invention by using the technical content disclosed above, or modified into equivalents of equivalent changes. Example. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solutions of the present invention still fall within the protection scope of the technical solutions of the present invention.

此外还应该认识到,此处描述的术语仅仅用来描述特定实施例,而不是用来限制本发明的范围。必须注意的是,此处的以及所附权利要求中使用的单数形式“一个”和“一种”包括复数基准,除非上下文明确表示相反意思。例如,对“一个步骤”或“一个装置”的引述意味着对一个或多个步骤或装置的引述,并且可能包括次级步骤以及次级装置。应该以最广义的含义来理解使用的所有连词。以及,词语“或”应该被理解为具有逻辑“或”的定义,而不是逻辑“异或”的定义,除非上下文明确表示相反意思。此外,本发明实施例中的方法和/或设备的实现可包括手动、自动或组合地执行所选任务。Also, it should be appreciated that the terminology described herein is used to describe particular embodiments only, and not to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a" and "an" include plural references unless the context clearly dictates otherwise. For example, reference to "a step" or "a means" means a reference to one or more steps or means, and may include sub-steps as well as sub-means. All conjunctions used should be understood in their broadest sense. Also, the word "or" should be understood to have the definition of a logical "or" rather than a logical "exclusive or" unless the context clearly dictates otherwise. Furthermore, implementation of methods and/or apparatuses in embodiments of the present invention may include performing selected tasks manually, automatically, or a combination.

Claims (10)

1.一种智能功率模块的封装结构,其特征在于,包括:设置有功率芯片的第一基板、设置有驱动芯片的第二基板、以及将所述第一基板和所述第二基板封装固定的塑封层;1. A package structure of an intelligent power module, comprising: a first substrate provided with a power chip, a second substrate provided with a driver chip, and the first substrate and the second substrate are packaged and fixed the plastic layer; 其中,所述第一基板具有所述功率芯片的一面朝向所述第二基板具有所述驱动芯片的一面,并且所述第一基板背离所述功率芯片的一面从所述塑封层暴露出。Wherein, the side of the first substrate with the power chip faces the side of the second substrate with the driver chip, and the side of the first substrate away from the power chip is exposed from the plastic sealing layer. 2.如权利要求1所述的智能功率模块的封装结构,其特征在于,所述第一基板为覆金属陶瓷基板,所述覆金属陶瓷基板背离功率芯片的表面上的金属层从所述塑封层暴露出。2 . The package structure of an intelligent power module according to claim 1 , wherein the first substrate is a metal-clad ceramic substrate, and the metal layer on the surface of the metal-clad ceramic substrate facing away from the power chip extends from the plastic package. 3 . layer exposed. 3.如权利要求1所述的智能功率模块的封装结构,其特征在于,所述第二基板中形成有多个贯穿所述第二基板的引出端子,所述引出端子从所述第二基板背离所述驱动芯片的一面凸出。3 . The package structure of an intelligent power module according to claim 1 , wherein a plurality of lead-out terminals penetrating through the second substrate are formed in the second substrate, and the lead-out terminals extend from the second substrate. 4 . The side facing away from the driving chip protrudes. 4.如权利要求3所述的智能功率模块的封装结构,其特征在于,所述塑封层覆盖所述第二基板背离所述驱动芯片的一面,并使所述引出端子从所述塑封层暴露出。4 . The package structure of an intelligent power module according to claim 3 , wherein the plastic encapsulation layer covers a side of the second substrate away from the driving chip, and the lead-out terminals are exposed from the plastic encapsulation layer. 5 . out. 5.如权利要求1所述的智能功率模块的封装结构,其特征在于,所述第二基板为印刷电路板,所述驱动芯片倒装至所述印刷电路板上,并和所述印刷电路板中的线路电气连接。5 . The package structure of an intelligent power module according to claim 1 , wherein the second substrate is a printed circuit board, and the driving chip is flip-chip mounted on the printed circuit board, and is connected to the printed circuit board. 6 . The electrical connections of the lines in the board. 6.如权利要求1所述的智能功率模块的封装结构,其特征在于,所述第一基板和所述第二基板之间还设置有连接柱,所述第一基板和所述第二基板之间通过所述连接柱电气连接。6 . The package structure of an intelligent power module according to claim 1 , wherein a connecting column is further provided between the first substrate and the second substrate, and the first substrate and the second substrate They are electrically connected through the connecting posts. 7.一种智能功率模块的封装方法,其特征在于,包括:7. A packaging method for an intelligent power module, comprising: 在第一基板上设置功率芯片,在第二基板上设置驱动芯片;以及,A power chip is provided on the first substrate, and a driving chip is provided on the second substrate; and, 以所述第一基板具有功率芯片的一面朝向所述第二基板具有驱动芯片的一面进行注塑封装,形成塑封层,所述第一基板背离所述功率芯片的一面从所述塑封层暴露出。The side of the first substrate with the power chip faces the side of the second substrate with the drive chip for injection molding to form a plastic encapsulation layer, and the side of the first substrate away from the power chip is exposed from the plastic encapsulation layer. 8.如权利要求7所述的智能功率模块的封装方法,其特征在于,所述第二基板为印刷电路板,所述驱动芯片倒装至所述印刷电路板上,并和所述印刷电路板中的线路电气连接。8 . The packaging method for an intelligent power module according to claim 7 , wherein the second substrate is a printed circuit board, the driving chip is flip-chipped on the printed circuit board, and is connected to the printed circuit board. 9 . The electrical connections of the lines in the board. 9.如权利要求7所述的智能功率模块的封装方法,其特征在于,所述第二基板中形成有多个贯穿所述第二基板的引出端子,在注塑封装后,所述引出端子从所述塑封层暴露出。9 . The packaging method of an intelligent power module according to claim 7 , wherein a plurality of lead-out terminals penetrating through the second substrate are formed in the second substrate, and after injection molding and packaging, the lead-out terminals are formed from the The plastic encapsulation layer is exposed. 10.如权利要求7所述的智能功率模块的封装方法,其特征在于,进行注塑封装之前,在所述第一基板或所述第二基板上设置连接柱,并对所述第一基板和所述第二基板进行装配,以使所述连接柱的两端固定连接所述第一基板和所述第二基板。10 . The packaging method of an intelligent power module according to claim 7 , wherein, before performing injection molding and packaging, a connecting column is arranged on the first substrate or the second substrate, and the first substrate and the second substrate are connected with the connecting column. The second substrate is assembled so that the two ends of the connecting column are fixedly connected to the first substrate and the second substrate.
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